TK13A50D
2013-11-01
1
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π-MOSⅦ)
TK13A50D
Switching Regulator Applications
• Low drain-source ON resistance: RDS (ON) = 0.31 Ω (typ.)
• High forward transfer admittance: ⎪Yfs⎪ = 7.5 S (typ.)
• Low leakage current: IDSS = 10 μA (max) (VDS = 500 V)
• Enhancement-mode: Vth = 2.0 to 4.0 V (VDS = 10 V, ID = 1 mA)
Absolute Maximum Ratings (Ta = 25°C)
Characteristics Symbol Rating Unit
Drain-source voltage VDSS 500 V
Gate-source voltage VGSS ±30 V
DC (Note 1) ID 13
Drain current
Pulse (Note 1) IDP 52
A
Drain power dissipation (Tc = 25°C) PD 45 W
Single pulse avalanche energy
(Note 2)
EAS 390 mJ
Avalanche current IAR 13 A
Repetitive avalanche energy (Note 3) EAR 4.5 mJ
Channel temperature Tch 150 °C
Storage temperature range Tstg −55 to 150 °C
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability
Handbook (“Handling Precautions”/“Derating Concept and Methods’’) and individual reliability data (i.e.
reliability test report and estimated failure rate, etc).
Thermal Characteristics
Characteristics Symbol Max Unit
Thermal resistance, channel to case Rth (ch-c) 2.78 °C/W
Thermal resistance, channel to ambient Rth (ch-a) 62.5 °C/W
Note 1: Please use devices on conditions that the channel temperature is below 150°C.
Note 2: VDD = 90 V, Tch = 25°C (initial), L = 3.92 mH, RG = 25 Ω, IAR = 13 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic sensitive device. Please handle with caution.
Unit: mm
Ф3.2
±
0.2 10 ± 0.3 2.7 ± 0.2
A
1.14 ± 0.15
0.69 ± 0.15
2.54
3.0
3.9
15.0 ± 0.3 13 ± 0.5
2.8 MAX.
2.54
4.5 ± 0.2
1 2 3
0.64 ± 0.15
2.6 ± 0.1
M
Ф0.2
A
JEDEC ⎯
JEITA SC-67
TOSHIBA 2-10U1B
Weight : 1.7 g (typ.)
1: Gate
2: Drain
3: Source
Internal Connection
1
3
2
Start of commercial production
2009-01
TK13A50D
2013-11-01
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Electrical Characteristics (Ta = 25°C)
Characteristics Symbol Test Condition Min Typ. Max Unit
Gate leakage current IGSS V
GS = ±30 V, VDS = 0 V ⎯ ⎯ ±1 μA
Drain cut-off current IDSS V
DS = 500 V, VGS = 0 V ⎯ ⎯ 10 μA
Drain-source breakdown voltage V (BR) DSS ID = 10 mA, VGS = 0 V 500 ⎯ ⎯ V
Gate threshold voltage Vth V
DS = 10 V, ID = 1 mA 2.0 ⎯ 4.0 V
Drain-source ON resistance RDS (ON) V
GS = 10 V, ID = 6.5 A ⎯ 0.31 0.4 Ω
Forward transfer admittance |Yfs| VDS = 10 V, ID = 6.5 A 1.9 7.5 ⎯ S
Input capacitance Ciss ⎯ 1800 ⎯
Reverse transfer capacitance Crss ⎯ 9 ⎯
Output capacitance Coss
VDS = 25 V, VGS = 0 V, f = 1 MHz
⎯ 190 ⎯
pF
Rise time tr ⎯ 40 ⎯
Turn-on time ton ⎯ 80 ⎯
Fall time tf ⎯ 15 ⎯
Switching time
Turn-off time toff
Duty ≤ 1%, tw = 10 μs ⎯ 110 ⎯
ns
Total gate charge Qg ⎯ 38 ⎯
Gate-source charge Qgs ⎯ 24 ⎯
Gate-drain charge Qgd
VDD ≈ 400 V, VGS = 10 V, ID = 13 A
⎯ 14 ⎯
nC
Source-Drain Ratings and Characteristics (Ta = 25°C)
Characteristics Symbol Test Condition Min Typ. Max Unit
Continuous drain reverse current
(Note 1)
IDR ⎯ ⎯ ⎯ 13 A
Pulse drain reverse current (Note 1) IDRP ⎯ ⎯ ⎯ 52 A
Forward voltage (diode) VDSF I
DR = 13 A, VGS = 0 V ⎯ ⎯ −1.7
V
Reverse recovery time trr ⎯ 1200 ⎯ ns
Reverse recovery charge Qrr
IDR = 13 A, VGS = 0 V,
dIDR/dt = 100 A/μs ⎯ 13 ⎯ μC
Marking
Lot No.
K13A50D
Part No.
(or abbreviation code)
Note 4
Note 4 : A line under a Lot No. identifies the indication of product Labels
[[G]]/RoHS COMPATIBLE or [[G]]/RoHS [[Pb]]
Please contact your TOSHIBA sales representative for details as to
environmental matters such as the RoHS compatibility of Product.
The RoHS is Directive 2011/65/EU of the European Parliament and
of the Council of 8 June 2011 on the restriction of the use of certain
hazardous substances in electrical and electronic equipment.
RL = 31 Ω
0 V
10 V
VGS
VDD ≈ 200 V
ID = 6.5 A VOUT
50 Ω
TK13A50D
2013-11-01
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0 4 8 12 16 20
0.1
0.1 10 100
1
10
1
VGS = 10 V
0.1
10
100
0.1 100 10
Tc = −55°C
100
25
1
1
0
6
8
10
4
2
ID = 13 A
6.5
3.3
0
0 2 4 6 8
12
30
18
24
6 25
100
Tc = −55°C
10
24
18
12
6
0
30
0 20 50 40 30 10
6.5
7
8
6
10
VGS = 5.6 V
6.7
15
6
0
12
3
9
0 2 4 8 10
5.6
VGS = 5.4 V
6.5
6
10
6
6.7
8
Common source
Tc = 25°C
Pulse Test
ID – VDS
ID – VDS
ID – VGS
VDS – VGS
Common source
Tc = 25°C
Pulse Test
|Yfs| – ID
RDS (ON) – ID
Drain-source voltage VDS (V)
Drain current ID (A)
Drain-source voltage VDS (V)
Drain current ID (A)
Gate-source voltage VGS (V)
Drain current ID (A)
Gate-source voltage VGS (V)
Drain current ID (A) Drain current ID (A)
Drain-source ON resistance
RDS (ON) (Ω)
Drain-source voltage VDS (V)
Forward transfer admittance ⎪Yfs⎪ (S)
Common source
Tc = 25°C
Pulse Test
Common source
Tc = 25°C
Pulse Test
Common source
VDS = 10 V
Pulse Test
Common source
VDS = 10 V
Pulse Test
6.3
7
TK13A50D
2013-11-01
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0 50 60
500
400
0
30 20
8
4
16
20
0
VDS
VGS
VDD = 100 V
200V
400V 12
300
200
100
0
1
2
3
5
−80 −40 0 40 80 120 160
4
1
0.1
10
1000
10000
1 10 100
Ciss
Coss
Crss
100
0
0.1
1
10
100
-0.8 -1.6 -2 -0.4
5
3
1VGS = 0 V
10
-1.2
160 −40 0 40 80 120 −80
1.2
0.8
0.6
0.4
0.2
0
ID = 3.3 A
13
6.5
1.0
Vth − Tc
RDS (ON) − Tc
IDR − VDS
PD − Tc
Common source
Tc = 25°C
Pulse Test
Common source
VGS = 0 V
f =1MHz
Tc = 25°C
Common source
VDS = 10 V
ID = 1mA
Pulse Test
Case temperature Tc (°C)
Gate threshold voltage Vth (V)
Case temperature Tc (°C)
Total gate charge Qg (nC)
Capacitance C (pF)
Capacitance – VDS
Drain-source voltage VDS (V)
Drain-source ON resistance
RDS (ON) (Ω)
Case temperature Tc (°C)
Drain reverse current IDR (A)
Drain-source voltage VDS (V)
Drain power dissipation PD (W)
Drain-source voltage VDS (V)
Dynamic input / output
characteristics
Gate-source voltage VGS (V)
Common source
ID = 13 A
Tc = 25°C
Pulse Test
Common source
VGS = 10 V
Pulse Test
80
40
0
0 40 80 120 160
20
60
40 10
TK13A50D
2013-11-01
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0.01
1
0.1
10
100
10 1000
100
0.001
1 ms *
100 μs *
1
VDSS max
* Single pulse Tc=25°C
Curves must be derated
linearly with increase in
temperature.
ID max (pulse) *
ID max (continuous)
DC OPERATION
Tc = 25°C
SAFE OPERATING AREA
Drain-source voltage VDS (V)
Drain current ID (A)
RG = 25 Ω
VDD = 90 V, L = 3.92 mH ⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
−
⋅⋅⋅= VDD
BVDSS
BVDSS
2
IL
2
1
ΕAS
Test circuit Wave form
IAR
BVDSS
VDD V
DS
−15 V
15 V
EAS – Tch
Channel temperature (initial) Tch (°C)
Avalanche energy EAS (mJ)
500
400
300
100
0
25 50 75 100 125 150
200
10μ
0.1
1
10
100μ 1m 10m 100m 1 10
0.01
Duty = 0.5
0.2
0.1
0.05
0.02
0.01 T
PDM
t
Duty = t/T
Rth (ch-c) = 2.78°C/W
rth – tw
Pulse width tw (s)
Normalized transient thermal impedance
rth (t)/Rth (ch-c)
SINGLE PULSE
0.001
TK13A50D
2013-11-01
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in this document, and related hardware, software and systems (collectively "Product") without notice.
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responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
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all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
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except in compliance with all applicable export laws and regulations.
• Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product.
Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES
OCCURRING AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
