MMC9-65608EV-30 - Atmel Corporation

Rev. 4151K–AERO–01/06

Features

•Operating Voltage: 5V

•Access Time: 30, 45 ns

•Very Low Power Consumption

– Active: 250 mW (Typ)

– Standby: 1 µW (Typ)

– Data Retention: 0.5 µW (Typ)

•Wide Temperature Range: -55°C to +125°C

•400 Mils Width Packages: FP32 and SB32

•TTL Compatible Inputs and Outputs

•Asynchronous

•Single 5V Supply

•No Single Event Latch-up below a LET Threshold of 80 MeV/mg /cm2

•Tested up to a Total Dose of 30 krads (Si) according to MIL STD 883 Method 1019

•Equal Cycle and Access Time

•Gated Inputs:

– No Pull-up/down

– Resistors Are Required

•QML Q and V with SMD 5962-89598

•ESCC with Specification 9301/047

Description

The M65608E is a very low po wer CMOS static RAM organized as 131072 x 8 bits.

Atmel brings the solution to applications where fast computing is as mandatory as low

consumption, such as aerospace electronics, portable instruments, or embarked

systems.

Utilizing an array of six transistors (6T) memory cells, the M65608E combines an

extremely low standby supply current (Typical value = 0.2 µA) with a fast access time

at 30 ns over the full military temperature range. The high stability of the 6T cell pro-

vides excellent protection against soft errors due to noise.

The M65608E is processed according to the methods of the latest revision of the MIL

STD 883 (class B or S), ESCC 9000 or QML.

Rad. Tolerant

128K x 8

V ery Low Power

5V CMOS SRAM

M65608E

4151K–AERO–01/06

Block Diagram

Pin Configuration 32-lead DIL side-brazed 400 MILS

32-lead Flatpack 400 MILS

3M65608E 4151K–AERO–01/06

Pin Description Table 1. Pin Names

Table 2. Truth Table

Note: L = low, H = high, X = H or L, Z = high impedance.

Names Description

A0 - A16 Address inputs

I/O0 - I/O7 Data Input/Output

CS1 Chip select 1

CS2 Chip select 2

WE Write Enab l e

OE Output Enable

VCC Power

GND Ground

CS1 CS2 W OE Inputs/

Outputs Mode

HXXXZ

Deselect/

Power-down

XLXXZ

Deselect/

power-down

L H H L Data Out Read

L H L X Data In Write

LHHHZ

Output

Disable

M65608E

4151K–AERO–01/06

Electrical Characteristics

Absolute Maximum Ratings

Military Operating Range

Recommended DC Operating

Conditions

Capacitance

Note: 1. Guaranteed but not te sted.

Supply voltage to GND potential:..........................-0.5V + 7.0V

DC input voltage:..............................GND - 0.5V to VCC + 0.5

DC output voltage high Z state:........GND - 0.5V to VCC + 0.5

Storage temperature:..................................... -65°C to +150°C

Output current into outputs (low): .......... ... ................ ..... 20 mA

Electro statics discharge voltage:...............................> 2001V

(MIL STD 883D method 3015.3)

*NOTE: Stresses greater than those listed under Absolute Max-

imum Ratings may cause permanent damage to the

device.This is a stress rating only and functional opera-

tion of the device at these or any other conditions

above those indicated in the operational sections of

this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may

affect reliability.

Operating Voltage Operating Temperature

5V + 10% -55°C to + 125°C

Parameter Description Minimum Typical Maximum Unit

VCC Supply voltage 4.5 5.0 5.5 V

GND Ground 0.0 0.0 0.0 V

VIL Input low voltage GND - 0.5 0.0 0.8 V

VIH Input high voltage 2.2 – VCC + 0.5 V

Parameter Description Minimum Typical Maximum Unit

Cin(1) Input low voltage ––8pF

Cout(1) Output high

voltage ––8pF

5M65608E 4151K–AERO–01/06

DC Parameters

DC Test Conditions

Consumption

Table 3. DC Test Conditions

TA = -55°C to + 125°C; Vss = 0V; VCC = 4.5V to 5.5V

Symbol Description Minimum Typical Maximum Unit

IIX (1) Input leakage

current -1 – 1 µA

IOZ(1) Output leakage

current -1 – 1 µA

VOL (2) Output low voltage ––0.4V

VOH (3) Output high

voltage 2.4 – – V

1. GND < Vin < VCC, GND < Vout < VCC Output Disabled.

2. VCC min. IOL = 8 mA (F version) and IOL = 6mA (FT version).

3. VCC min. IOH = -4 mA.

Symbol Description 65608E-30 65608E-45 Unit Value

ICCSB (1) Standby supply

current 2 2 mA max

ICCSB1 (2) Standby supply

current 300 300 µA max

ICCOP (3) Dynamic operating

current 130 100 mA max

1. CS1 > VIH or CS2 < VIL and CS1 < VIL.

2. CS1 > VCC - 0.3V or, CS2 < GND + 0.3V and CS1 < 0.2V.

3. F = 1/TAVAV, Iout = 0 mA, W = OE = VIH, Vin = GND or VCC, VCC max.

M65608E

4151K–AERO–01/06

AC Parameters

AC Test Conditions

AC Test Loads Waveforms

Data Retention Mode Atmel CMOS RAM’s are designed with battery backup in mind. Data retention voltage

and supply current are guaranteed over temperature . The following rule s ensure data

retention:

1. During data retention chip select CS1 must be held high within VCC to VCC -

0.2V or, chip select CS2 must be held down within GND to GND +0.2V.

2. Output Enable (OE) should be held high to keep the RAM outputs high imped-

ance, minimizing power dissipation.

3. During power up and power-down tran sitions CS1 and OE must be kept between

VCC + 0.3V and 70% of VCC, or with CS2 between GND and GND -0.3V.

4. The RAM can begin operation > TR ns after VCC reaches the minimum opera-

tion voltages (4.5V).

Timing

Input Pulse Levels:............. ... ... ... .... ... ... ... .GND to 3.0V

Input Rise/Fall Times: ...............................5 ns

Input Timing Reference Levels: ................1.5V

Output loading IOL/IOH (see Figure 1 and Figure 2)+30 pF

Figure 1 Figure 2 Figure 3

7M65608E 4151K–AERO–01/06

Data Retention Characteristics

Notes: 1. TAVAV = Read Cycle Time

2. CS1 = VCC or CS2 = CS1 = GND, Vin = GND/VCC, this parameter is only tested at

VCC = 2V.

Write Cycle

Note: 1. Parameters guaranteed, not tested, with output loading 5 pF.

Parameter Description Minimum Typical

TA = 25 °C Maximum Unit

VCCDR VCC for data

retention 2.0 – – V

TCDR

Chip

deselect to

data

retention

time

0.0 – – ns

TR Operation

recovery

time TAVAV(1) ––ns

ICCDR1(2)

Data

retention

current at

2.0V

–0.1150µA

ICCDR2(2)

Data

retention

current at

3.0V

–0.2200µA

Symbol Parameter 65608-30 65608-45 Unit Value

TAVAW Write cycle time 30 45 ns min

TAVWL Address set-up time 00nsmin

TAVWH Address valid to end of

write 22 35 ns min

TDVWH Data set-up time 18 20 ns min

TE1LWH CS1 low to write end 22 35 ns min

TE2HWH CS2 high to write end 22 35 ns min

TWLQZ Write low to high Z(1) 815nsmax

TWLWH Write pulse width 22 35 ns min

TWHAX Address hold from to

end of write 00nsmin

TWHDX Data hold time 00nsmin

TWHQX Write high to low Z(1) 00nsmin

M65608E

4151K–AERO–01/06

Read Cycle

Note: 1. Parameters Guaranteed, not tested, with output loading 5 pF.

Symbol Parameter 65608-30 65608-45 Unit Value

TAVAV Read cycle time 30 45 ns min

TAVQV Address access time 30 45 ns max

TAVQX Address valid to low Z(1) 55 ns min

TE1LQV Chip-select1 access time 30 45 ns max

TE1LQX CS1 low to low Z(1) 33 ns min

TE1HQZ CS1 high to high Z(1) 15 20 ns max

TE2HQV Chip-select2 access time 30 45 ns max

TE2HQX CS2 high to low Z(1) 33 ns min

TE2LQZ CS2 low to high Z(1) 15 20 ns max

TGLQV Output Enable access time 12 15 ns max

TGLQX OE low to low Z(1) 00 ns min

TGHQZ OE high to high Z(1) 815 ns max

9M65608E 4151K–AERO–01/06

Write Cycle 1 WE Controlled,

OE High During Write

Write Cycle 2 WE Controlled,

OE Low

M65608E

4151K–AERO–01/06

Write Cycle 3 CS1 or CS2,

Controlled

Note: The internal write time of the memory is define d by the overlap of CS1 Low an d CS2 HIGH and W LOW. Both signals must be

actived to initiate a write and either signal can terminate a write by going in actived. The data input setup and hold timing should

be referenced to the actived edge of the signal that terminates the write. Data out is high impedance if OE = VIH.

11 M65608E 4151K–AERO–01/06

Read Cycle 1

Read Cycle 2

Read Cycle 3

M65608E

4151K–AERO–01/06

Ordering Information

Note: 1. Contact Atmel for availability.

Part Number Temperature Range Speed Package Flow

MMDJ-65608EV-30 -55° to +125°C 3 0 ns FP32.4 St andard Mil

MMDJ-65608EV-45 -55° to +125°C 4 5 ns FP32.4 St andard Mil

MMC9-65608EV-30 -55° to +125°C 30 ns SB32.4 Standard Mil

MMC9-65608EV-45 -55° to +125°C 45 ns SB32.4 Standard Mil

SMDJ-65608EV-30SB -55° to +125°C 3 0 ns FP32.4 SCC B

SMDJ-65608EV-45SB -55° to +125°C 4 5 ns FP32.4 SCC B

SMC9-65608EV-30SB -55° to +125°C 30 ns SB32.4 SCC B

SMC9-65608EV-45SB -55° to +125°C 45 ns SB32.4 SCC B

5962-8959847QTC -55° to +125°C 3 0 ns FP32.4 QML Q

5962-8959818QTC -55° to +125°C 4 5 ns FP32.4 QML Q

5962-8959847VTC -55° to +125°C 3 0 ns FP32.4 QML V

5962-8959818VTC -55° to +125°C 4 5 ns FP32.4 QML V

5962-8959847QZC -55° to +125°C 30 ns SB32.4 QML Q

5962-8959818QZC -55° to +125°C 45 ns SB32.4 QML Q

5962-8959847VZC -55° to +125°C 30 ns SB32.4 QML V

5962-8959818VZC -55° to +125°C 45 ns SB32.4 QML V

MMDJ-65608EV-30-E 25°C 30 ns FP32.4 Engineering Samples

MMC9-65608EV-30-E(1) 25°C 30 ns SB32.4 Engineering Samples

MM065608EV-30-E 25°C 30 ns Die Engineering Samples

5962-8959847Q6A -55° to +125°C 30 ns Die QML Q

5962-8959847V6A -55° to +125°C 30 ns Die QML V

13 M65608E 4151K–AERO–01/06

Package Drawings

32-lead Flat Pack 400 Mils

M65608E

4151K–AERO–01/06

Package Drawings

32-lead Side Braze 400 Mils

Printed on recycled paper.

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