TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MA Y 2002
ULTRALOW-NOISE, HIGH PSRR, FAST RF 100-mA
LOW-DROPOUT LINEAR REGULATORS
(3,00 mm x 3,00 mm)
Actual Size
(3,00 mm x 3,00 mm)
Actual Size
FEATURES
D100-mA Low-Dropout Regulator With EN
DAvailable in 2.5-V, 2.8-V, 3-V, and Adj.
DHigh PSRR (75 dB at 10 kHz)
DUltralow Noise (27 µV)
DFast Start-Up Time (50 µs)
DStable With Any 1-µF Ceramic Capacitor
DExcellent Load/Line Transient
DVery Low Dropout Voltage
(55 mV at Full Load, TPS79230)
D5-Pin SOT23 (DBV) Package
DTPS791xx Provides EN Options
APPLICATIONS
DCellular and Cordless Telephones
DVCOs
DRF
DBluetooth, Wireless LAN
DHandheld Organizers, PDA
DESCRIPTION
The TPS792xx family of low-dropout (LDO)
low-power linear voltage regulators features high
power supply rejection ratio (PSRR), ultralow
noise, fast start-up, and excellent line and load
transient responses in a small outline, SOT23,
package. Each device in the family is stable, with
a small 1-µF ceramic capacitor on the output. The
family uses an advanced, proprietary BiCMOS
fabrication process to yield extremely low dropout
voltages (e.g., 55 mV at 100 mA, TPS79230).
Each device achieves fast start-up times
(approximately 50 µs with a 0.001 µF bypass
capacitor) while consuming very low quiescent
current (170 µA typical). Moreover, when the
device is placed in standby mode, the supply
current is reduced to less than 1 µA. The
TPS79228 exhibits approximately 27 µVRMS of
output voltage noise with a 0.1 µF bypass
capacitor. Applications with analog components
that are noise sensitive, such as portable RF
electronics, benefit from the high PSRR and low
noise features as well as the fast response time.
10 100 1 k 10 k
20
50
90
100 k 1 M 10 M
Ripple Rejection – dB
f – Frequency – Hz
TPS79228
RIPPLE REJECTION
vs
FREQUENCY
IO = 10 mA
60
0
VI = 3.8 V
Co = 10 µF
C(byp) = 0.01 µF
IO = 100 mA
10
30
40
70
80
f – Frequency – Hz
1k 10k 100k
IO = 1 mA
VI = 3.8 V
Co = 1 µF
C(byp) = 0.1 µF
100
IO = 100 mA
TPS79228
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
0
0.05
0.1
0.15
0.2
0.25
0.3
3
2
4
5
DBV PACKAGE
(T OP VIEW)
1IN
GND
EN
OUT
BYPASS
Fixed Option
3
2
4
6
DBV PACKAGE
(T OP VIEW)
1IN
GND
EN
OUT
BYPASS
5FB
Adjustable Option
V/ HzOutput Spectral Noise Density – µ
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of T exas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
www.ti.com
Copyright 2002, Texas Instruments Incorporated
Bluetooth is a trademark owned by the Bluetooth SIG, Inc.
TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MAY 2002
www.ti.com
2
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TJVOLTAGE PACKAGE P ART NUMBER SYMBOL
1.2 to 5.5 V TPS79201DBVT(1) TPS79201DBVR(2) PEVI
40°Cto125°C
2.5 V SOT23 TPS79225DBVT(1) TPS79225DBVR(2) PEXI
–40°C to 125°C2.8 V
SOT23
(DBV) TPS79228DBVT(1) TPS79228DBVR(2) PEWI
3 V TPS79230DBVT(1) TPS79230DBVR(2) PEYI
(1) The DBVT indicates tape and reel of 250 parts.
(2) The DBVR indicates tape and reel of 3000 parts.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
TPS79201, TPS79225
TPS79228, TPS79230
Input voltage range  –0.3 V to 6 V
V oltage range at EN –0.3 V to VI + 0.3 V
V oltage on OUT –0.3 V to 6 V
Peak output current Internally limited
ESD rating, HBM 2 kV
ESD rating, CDM 500 V
Continuous total power dissipation See Dissipation Rating Table
Operating virtual junction temperature range, TJ–40°C to 150°C
Operating ambient temperature range, TA–40°C to 85°C
Storage temperature range, T stg –65°C to 150°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is
not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
(2) All voltage values are with respect to network ground terminal.
PACKAGE DISSIPATION RATING
BOARD PACKAGE RθJC RθJA DERATING FACTOR
ABOVE T A = 25°CTA ≤ 25°C
POWER RA TING TA = 70°C
POWER RA TING TA = 85°C
POWER RA TING
Low K(1) DBV 63.75°C/W 256°C/W 3.906 mW/°C391 mW 215 mW 156 mW
High K(2) DBV 63.75°C/W 178.3°C/W 5.609 mW/°C561 mW 308 mW 224 mW
(1) The JEDEC low K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top of the board.
(2) The JEDEC high K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and ground
planes and 2 ounce copper traces on top and bottom of the board.
RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT
Input voltage, VI (1) 2.7 5.5 V
Continuous output current, IO (2) 0 100 mA
Operating junction temperature, TJ–40 125 °C
(1) To calculate the minimum input voltage for your maximum output current, use the following formula:
VI(min) = VO(max) + VDO (max load)
(2) Continuous output current and operating junction temperature are limited by internal protection circuitry , but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MAY 2002
www.ti.com
3
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range, (TJ = –40 to 125°C), VI = VO(typ) + 1 V, IO = 1 mA, EN = VI, Co = 10 µF,
C(byp) = 0.01 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TPS79201
TJ = 25°C, 1.22 V ≤ VO ≤ 5.2 VO
TPS79201 0 µA < IO < 100 mA, 1.22 V ≤ VO ≤ 5.2 V (1) 0.98 VO1.02 VO
TPS79225
TJ = 25°C 2.5
Out
p
utvoltage
TPS79225 0 µA < IO < 100 mA, 3.5 V < VI < 5.5 V 2.45 2.55
V
Output voltage
TPS79228
TJ = 25°C 2.8 V
TPS79228 0 µA < IO < 100 mA, 3.8 V < VI < 5.5 V 2.744 2.856
TPS79230
TJ = 25°C 3
TPS79230 0 µA < IO < 100 mA, 4 V < VI < 5.5 V 2.94 3.06
Quiescent current (GND current)
0 µA < IO < 100 mA, TJ = 25°C 170
µA
Quiescent current (GND current) 0 µA < IO < 100 mA 250 µA
Load regulation 0 µA < IO < 100 mA, TJ = 25°C 5 mV
Out
p
utvoltagelineregulation(∆VO/VO)(2)
VO + 1 V < VI ≤ 5.5 V, TJ = 25°C 0.05
%/V
Output voltage line regulation (∆VO/VO)
(2)
VO + 1 V < VI ≤ 5.5 V, 0.12 %/V
C(byp) = 0.001 µF 50
Out
p
utnoisevoltage(TPS79228)
BW = 100 Hz to 100 kHz, C(byp) = 0.0047 µF 33
µVRMS
Output noise voltage (TPS79228)
BW
=
100
Hz
to
100
kHz
,
IO = 100 mA, TJ = 25°CC(byp) = 0.01 µF 31 µVRMS
O,J
C(byp) = 0.1 µF 27
R28ΩC1F
C(byp) = 0.001 µF 50
Time, start-up (TPS79228) RL = 28 Ω, Co = 1 µF,
TJ=25
°
C
C(byp) = 0.0047 µF 70 µs
Time,
start u
(TPS79228)
T
J =
25°C
C(byp) = 0.01 µF 90
µs
Output current limit VO = 0 V (1) 285 600 mA
UVLO threshold VCC rising 2.25 2.65 V
UVLO hysteresis TJ = 25°C VCC rising 100 mV
Standby current EN = 0 V, 2.7 V < VI < 5.5 V 0.7 1 µA
High level enable input voltage 2.7 V < VI < 5.5 V 2 V
Low level enable input voltage 2.7 V < VI < 5.5 V 0.7 V
Input current (EN) EN = 0 V –1 1 µA
f = 100 Hz, TJ = 25°C, IO = 10 mA 70
Powersu
pp
lyri
pp
lerejection
TPS79228
f = 100 Hz, TJ = 25°C, IO = 100 mA 72
dB
Power supply ripple rejection TPS79228 f = 10 kHz, TJ = 25°C, IO = 100 mA 75 dB
f = 100 kHz, TJ = 25°C, IO = 100 mA 47
TPS79228
IO = 100 mA, TJ = 25°C 60
Dtlt
(3)
TPS79228 IO = 100 mA 110
V
Dropout voltag
(3)
TPS79230
IO = 100 mA, TJ = 25°C 55 mV
TPS79230 IO = 100 mA 100
(1) The minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. The maximum IN voltage is 5.5 V . The maximum output current
is 100 mA.
(2) If VO≤ 2.5 V then VImin = 2.7 V, VImax = 5.5 V :
Line regulation (mV) +ǒ%ńVǓ VOǒVImax *2.7 VǓ
100 1000
If VO ≥ 2.5 V then VImin = VO + 1 V, VImax = 5.5 V:
(3) IN voltage equals VO(typ) – 100 mV; The TPS79225 dropout voltage is limited by the input voltage range limitations.
TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MAY 2002
www.ti.com
4
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION
_+
Thermal
Shutdown
Bandgap
Reference
VIN
Current
Sense
R2
VIN
GND
EN
VOUT
SHUTDOWN
Vref
UVLO
ILIM
External to
the Device
FB
R1
UVLO
250 kΩBypass
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION
_+
Thermal
Shutdown
VIN
Current
Sense
R1
R2
VIN
GND
EN
VOUT
SHUTDOWN
Vref
UVLO
ILIM
Bandgap
Reference
UVLO
250 kΩBypass
Terminal Functions
TERMINAL
I/O
NAME ADJ FIXED I/O DESCRIPTION
BYPASS 4 4 An external bypass capacitor , connected to this terminal, in conjunction with an internal resistor , creates a
low-pass filter to further reduce regulator noise.
EN 3 3 I The EN terminal is an input which enables or shuts down the device. When EN goes to a logic high, the device
will be enabled. When the device goes to a logic low , the device will be in shutdown mode.
FB 5 N/A I This terminal is the feedback input voltage for the adjustable device.
GND 2 2 Regulator ground
IN 1 1 I The IN terminal is the input to the device.
OUT 6 5 O The OUT terminal is the regulated output of the device.
TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MAY 2002
www.ti.com
5
TYPICAL CHARACTERISTICS
Figure 1
2.796
2.797
2.799
2.8
2.801
2.802
2.803
0 20406080100
IO – Output Current – mA
TPS79228
OUTPUT VOLT AGE
vs
OUTPUT CURRENT
VI = 3.8 V
Co = 10 µF
TJ = 25°C
– Output Voltage – V
VO
Figure 2
2.76
2.77
2.78
2.79
2.8
2.81
2.82
–40–25 –10 5 20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
TPS79228
OUTPUT VOLT AGE
vs
JUNCTION TEMPERATURE
– Output Voltage – V
VO
IO = 100 mA
IO = 1 mA
VI = 3.8 V
Co = 10 µF
Figure 3
100
120
140
160
180
200
220
240
260
–40 –25–10 5 20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
TPS79228
GROUND CURRENT
vs
JUNCTION TEMPERATURE
Ground Current – Aµ
IO = 1 mA
VI = 3.8 V
Co = 10 µF
IO = 100 mA
Figure 4
f – Frequency – Hz
1k 10k 100k
IO = 1 mA
VI = 3.8 V
Co = 1 µF
C(byp) = 0.1 µF
100
IO = 100 mA
TPS79228
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
0
0.05
0.1
0.15
0.2
0.25
0.3
V/ HzOutput Spectral Noise Density – µ
Figure 5
f – Frequency – Hz
1k 10k 100k
IO = 1 mA
100
IO = 100 mA
Output Spectral Noise Density –
TPS79228
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
VI = 3.8 V
Co = 10 µF
C(byp) = 0.1 µF
0
0.05
0.1
0.15
0.2
0.25
0.3
V/ Hz
µ
Figure 6
f – Frequency – Hz
1k 10k 100k100
V/ HzOutput Spectral Noise Density –
TPS79228
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
VI = 3.8 V
IO = 100 mA
Co= 10 µF
C(byp) = 0.1 µF
C(byp) = 0.001 µF
µ
C(byp) = 0.0047 µF
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
C(byp) = 0.01 µF
0.001 0.01 0.1
RMS – Root Mean Squared Output Noise –
TPS79228
ROOT MEAN SQUARED OUTPUT NOISE
vs
BYPASS CAP ACITANCE
(RMS)
Vµ
C(byp) – Bypass Capacitance – µF
0
10
20
30
40
50
60
Figure 7
VI = 3.8 V
VO = 2.8 V
Io = 100 mA
Co = 10 µF
BW = 100 Hz to 100
kHz
Figure 8
100 1 M10 1 k
f – Frequency – Hz
10 k
– Output Impedance –ZoΩ
TPS79228
OUTPUT IMPEDANCE
vs
FREQUENCY
100 k
IO = 1 mA
0
0.5
1
1.5
2
2.5
0
IO = 100 mA
10 M
VI = 3.8 V
Co = 10 µF
TJ = 25°C
Figure 9
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
–40–25 –10 5 20 35 50 65 80 95 110 125
IO = 100 mA
IO = 10 mA
VI = 2.7 V
Co = 10 µF
TJ – Junction Temperature – °C
– Dropout Voltage – V
VDO
TPS79228
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MAY 2002
www.ti.com
6
TYPICAL CHARACTERISTICS
Figure 10
0
20
40
60
80
100
120
0 0.02 0.04 0.06 0.08 0.1
TJ = 125°C
TJ = 25°C
TJ = –40°C
IO = 100 mA
TPS79228
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
– Dropout Voltage – mV
VDO
IO – Output Current – A
Figure 1 1
0
20
40
60
80
100
120
2.5 3 3.5 4 4.5 5
TJ = 125°C
TJ = 25°C
TJ = –40°C
IO = 100 mA
VI – Input Voltage – V
TPS79201
DROPOUT VOLTAGE
vs
INPUT VOL T AGE
– Dropout Voltage – mV
VDO
Figure 12
2.2
2.7
3.2
3.7
4.2
4.7
1.5 2 2.5 3 3.5 4 4.5 5
TJ = 125°C
TJ =– 40°C
TJ = 25°C
VI = 3.2 V
Co = 10 µF
5.2
Minimum Required Input Voltage – V
MINIMUM REQUIRED INPUT VOLTAGE
vs
OUTPUT VOL T AGE
VO – Output Voltage – V
Figure 13
10 100 1 k 10 k
20
50
90
100 k 1 M 10 M
Ripple Rejection – dB
f – Frequency – Hz
TPS79228
RIPPLE REJECTION
vs
FREQUENCY
IO = 10 mA
60
0
VI = 3.8 V
Co = 10 µF
C(byp) = 0.01 µF
IO = 100 mA
10
30
40
70
80
Figure 14
10 100 1 k 10 k
20
60
100
100 k 1 M 10 M
Ripple Rejection – dB
f – Frequency – Hz
TPS79228
RIPPLE REJECTION
vs
FREQUENCY
VI = 3.8 V
Co = 1 µF
C(byp) = 0.01 µF
IO = 10 mA
IO = 100 mA
40
70
90
30
50
80
Figure 15
10 100 1 k 10 k
20
60
100
100 k 1 M 10 M
Ripple Rejection – dB
f – Frequency – Hz
TPS79228
RIPPLE REJECTION
vs
FREQUENCY
VI = 3.8 V
Co = 1 µF
C(byp) = 0.1 µF
IO = 10 mA
IO = 100 mA
40
70
90
30
50
80
Fi
g
ure 16
3
TPS79228
OUTPUT VOLT AGE, ENABLE VOLTAGE
vs
TIME (ST ART -UP)
VO
t – Time – µs
0604020 80 100 140120 160 180 200
– Output Voltage – V
VI = 3.8 V
VO = 2.8 V
IO = 100 mA
Co = 1 µF
TJ = 25°C
Enable Voltage – V
1
2
0
0
2
C(byp) = 0.001 µF
C(byp) = 0.0047 µF
C(byp) = 0.01 µF
4
Figure 17
20
TPS79228
LINE TRANSIENT RESPONSE
VO
t – Time – µs
01510520253530 40 45 50
– Output Voltage – mV
IO = 100 mA
Co = 1 µF
C(byp) = 0.01 µF
VI– Input Voltage – V
0
4.8
3.8
–20
dv
dt +0.4 V
µs
Figure 18
t – Time – µs
TPS79228
LOAD TRANSIENT RESPONSE
0
0 15010050 200 250 350300 400 450
20
0
–20
VO
Output Voltage – mV
∆ – Change In
100
500
– Output Current – mA
IO
VI = 3.8 V
Co = 10 µF
–40
di
dt +0.04 A
µs
TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MAY 2002
www.ti.com
7
TYPICAL CHARACTERISTICS
Figure 19
0.01
0.1
1
10
100
0 0.02 0.04 0.06 0.08 0.1
IO – Output Current – A
ESR – Equivalent Series Resistance – Ω
TPS79228
TYPICAL REGIONS OF STABILITY
EQUIV ALENT SERIES RESIST ANCE (ESR)
vs
OUTPUT CURRENT
Region of Instability
Co = 0.47 µF
VI = 5.5 V
TJ = –40 °C to 125°C
Region of
Instability
Figure 20
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.1
IO – Output Current – A
ESR – Equivalent Series Resistance – Ω
TPS79228
TYPICAL REGIONS OF STABILITY
EQUIV ALENT SERIES RESIST ANCE (ESR)
vs
OUTPUT CURRENT
1
Region of Instability
Region of Stability
Co = 1 µF
VI = 5.5 V
TJ = –40 °C to 125°C
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.1
IO – Output Current – A
ESR – Equivalent Series Resistance – Ω
TPS79228
TYPICAL REGIONS OF STABILITY
EQUIV ALENT SERIES RESIST ANCE (ESR)
vs
OUTPUT CURRENT
1
Region of Instability
Region of Stability
Figure 21
Co = 10 µF
VI = 5.5 V
TJ = –40 °C to 125°C
TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MAY 2002
www.ti.com
8
APPLICATION INFORMATION
The TPS792xx family of low-dropout (LDO) regulators have been optimized for use in noise-sensitive battery-operated
equipment. The device features extremely low dropout voltages, high PSRR, ultralow output noise, low quiescent current
(170 µA typically), and enable-input to reduce supply currents to less than 1 µA when the regulator is turned off.
A typical application circuit is shown in Figure 22.
0.1 µF
BYPASS
OUT
1
3
IN
EN
GND
2
4
5
VI
VO
1 µF
+
TPS792xx
0.01 µF
Figure 22. Typical Application Circuit
EXTERNAL CAPACITOR REQUIREMENTS
A 0.1-µF or larger ceramic input bypass capacitor , connected between IN and GND and located close to the TPS792xx,
required for stability and to improve transient response, noise rejection, and ripple rejection. A higher-value electrolytic input
capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches
from the power source.
Like all low dropout regulators, the TPS792xx requires an output capacitor connected between OUT and GND to stabilize
the internal control loop. The minimum recommended capacitance is 1 µF. Any 1 µF or larger ceramic capacitor is suitable.
The device is also stable with a 0.47 µF ceramic capacitor with at least 75 mΩ of ESR.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS792xx has a BYPASS pin which is
connected to the voltage reference through a 250-kΩ internal resistor . The 250-kΩ internal resistor , in conjunction with an
external bypass capacitor connected to the BYPASS pin, creates a low pass filter to reduce the voltage reference noise
and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the
BYPASS pin must be at a minimum because any leakage current creates an IR drop across the internal resistor thus
creating an output error . Therefore, the bypass capacitor must have minimal leakage current.
For example, the TPS79228 exhibits only 31 µVRMS of output voltage noise using a 0.1-µF ceramic bypass capacitor and
a 1-µF ceramic output capacitor . Note that the output starts up slower as the bypass capacitance increases due to the RC
time constant at the bypass pin that is created by the internal 250-kΩ resistor and external capacitor.
BOARD LAYOUT RECOMMENDATION TO IMPROVE PSRR AND NOISE PERFORMANCE
To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board be
designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the ground pin of the
device. In addition, the ground connection for the bypass capacitor should connect directly to the ground pin of the device.
TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MAY 2002
www.ti.com
9
POWER DISSIPATION AND JUNCTION TEMPERATURE
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be
restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle
in any given application. T o ensure the junction temperature is within acceptable limits, calculate the maximum allowable
dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
PD(max) +TJmax *TA
RθJA
Where:
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package, see the dissipation rating table.
TA is the ambient temperature.
(1)
The regulator dissipation is calculated using:
PD+ǒVI*VOǓ IO(2)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal protection
circuit.
PROGRAMMING THE TPS79201 ADJUSTABLE LDO REGULATOR
The output voltage of the TPS79201 adjustable regulator is programmed using an external resistor divider as shown in
Figure 23. The output voltage is calculated using:
VO+Vref ǒ1)R1
R2Ǔ(3
)
Where:
Vref = 1.2246 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50- µA divider current. Lower value resistors can be used for
improved noise performance, but the solution consumes more power. Higher resistor values should be avoided as leakage
current into/out of FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and
thus erroneously decreases/increases VO. The recommended design procedure is to choose R2 = 30.1 kΩ to set the
divider current at 50 µA, C1 = 15 pF for stability, and then calculate R1 using:
R1 +ǒVO
Vref *1Ǔ R2 (4)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be placed
between OUT and FB. For voltages <1.8 V, the value of this capacitor should be 100 pF. For voltages >1.8 V, the
approximate value of this capacitor can be calculated as:
C1 +(3 x 10–7)x(R1)R2)
(R1 x R2) (5)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is not used
(such as in a unity-gain configuration) or if an output voltage < 1.8 V is chosen, then the minimum recommended output
capacitor is 2.2 µF instead of 1 µF.
TPS79201, TPS79225
TPS79228, TPS79230
SLVS337B – MARCH 2001 – REVISED MAY 2002
www.ti.com
10
OUTPUT VOL T AGE
PROGRAMMING GUIDE
VO
VI
OUT
FB
R1
R2
GND
EN
IN
≤0.7 V
≥2 V
TPS79201
1 µF
BYPASS
0.01 µF
1 µF
C1 22 pF
15 pF
15 pF
OUTPUT
VOLTAGE R1 R2
2.5 V
3.3 V
3.6 V
C1
33.4 kΩ
53.6 kΩ
59 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
Figure 23. TPS79201 Adjustable LDO Regulator Programming
REGULATOR PROTECTION
The TPS792xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops
below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally
limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate.
The TPS792xx features internal current limiting and thermal protection. During normal operation, the TPS792xx limits
output current to approximately 400 mA. When current limiting engages, the output voltage scales back linearly until the
overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to
exceed the power dissipation ratings of the package or the absolute maximum voltage ratings of the device. If the
temperature of the device exceeds approximately 165°C, thermal-protection circuitry shuts it down. Once the device has
cooled down to below approximately 140°C, regulator operation resumes.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS79201DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79201DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79201DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79201DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79225DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79225DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79225DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79225DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79228DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79228DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79228DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79228DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79230DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79230DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79230DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79230DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 1
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS79201DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS79201DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS79225DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS79225DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS79228DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS79228DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS79230DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS79230DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Jun-2011
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS79201DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0
TPS79201DBVT SOT-23 DBV 6 250 180.0 180.0 18.0
TPS79225DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS79225DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS79228DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS79228DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS79230DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS79230DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Jun-2011
Pack Materials-Page 2
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