MITSUBISHI <CONTROL / DRIVER IC> M56693FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER DESCRIPTION The M56693 is a semiconductor integrated circuit that has a built- in, 32-bit shift register and a latch of CMOS structure with serial input and serial/paraliel output, and a 32-bit totem-pole-type paraliei output driver of high pressure proof DMOS structure. Employed are BI-CMOS and high pressure proof DMOS processing technology. FEATURES @ Serial input-serial/parallel output @ Cascade connections possible through serial output @ Latch circuit included for each stage @ Driver supply voltage: VH=120V @ Operating temperature: -20 75C APPLICATION Vacuum Fluorescent Display ANODE DRIVER FUNCTION The M56693 comprises a 32-bit D type flip-flop with a 32 latches connected to its output. In accordance with truth table 1, inputting data to SIN and clock pulse to CLK allows SIN signal to be put into the internal shift register when the clock changes from H to L, and simultaneously shift register data to be shifted sequentially. Serial output SOUT is used by connecting to the next stage M56693 SIN when more than one M56693 is used to expand bits in the series. In accordance with truth table 2, paratlel output allows the latch to pass data through if LAT input is turned to H, and data to be retained if LAT is turned to L. Driver output HVOn allows data from the latch to be output if BLK input is turned to L, and L to be output if BLK input is turned to H, irrespective of data from the latch. PIN CONFIGURATION (TOP VIEW) HVOzs [34] HVOz4 HVOes [36] HVOes HVOz27 HVOee M56693FP HVOzs HVOso HVOs1 HVOQaz2 PGND Outline 44P6N-A (FP) M56693GP Outline 48P6D-A (GP) HVOn HVOi0 20] HVO 5 19] HVO 8 ie] HVO 7 HVO 5 HVO 5 [15] HVO 4 [14] HVO 3 113] HVO 2 12] HVO 1 [24] N.C (23) HVO1: [22| HVO10 [21] HVO 9 [20 HVO 8s HVO7 N.C HVO 6 116] HVO 5 115] HVO 4 14} HVOs 13} HVO 2 N.C: no connectionMITSUBISHI! <CONTROL / DRIVER IC> M56693FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER BLOCK DIAGRAM (Note : Pin No. in paretheses are of M56693GP) HVO1 HVO2 HVO3 _ .....~-.---- HVO30 HVO31 HVO32 _ 12 13 14 _ _ - ~ - (12) (13) (14) ad ane (48 Output (1) t | protect | f\ PAX enw en ene eens VH circuit /\ /\ (10) (2)(10) VDD 4 po po oR Lee S PGND naceeneuccee (1)(41) BLK | + - - (8) | Q Q Q Q | tpo| jro{| judo) tol leol lio | | LAT | wr rere (7) LGND (5) | | SIN D Qe4p ap ab------------4 D OK4p ofp a SOUT (9) (3) T T Topocrrrrtttese T T T __ | N.C CLK (68) > Ont (18)(24}(25) (6) - _ _ _ _ _ _ _ _ (37)(38) TRUTH TABLE Truth table 1. Shift register section CLK Shift register operation DATA is shifted. Hork No changes. Truth table 2. Latch and driver sections Dn LAT BLK HVOn Dn=nth bit DFF retention data H Output all L HVOn=nth bit driver output =L level L 4 L eve H=H" level L L X=L levet or H level Latchs data output.MITSUBISHI <CONTROL / DRIVER iC> M56693FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER PIN FUNCTION DESCRIPTION Pin name Function Vob Logic stage supply voltage LGND Logic stage ground Vu Output stage supply voltage PGND Output stage ground GLK Clock input for the internal shift resister. The data enter the internal shift resisters and the data in the shift registers will be shifted in order by High to Low change of the clock. SIN Seriai data input SOUT Serial data output LAT Latch input. When the LATCH is set to H, the data in the shift resister will enter the each latch circuit. When the LATCH input is set to L, the data will be held. BLK Enable input for output control. When the BLK input is set to L, data in the latch circuit will appear at outputs. When the BLK input is set to H, all outputs will be set to L. HVO1 - 32 Output driver (push-pull) ABSOLUTE MAXIMUM RATINGS (Ta=25C, uniess otherwise noted) Symbol Parameter Conditions Ratings Unit Vop Logic stage supply voltage 0.3-7 Vv VH Output stage supply voltage -0.3 - 120 Vv vi Logic inputs voltage -0.3 Vop+0.3 Vv Vo Logic outputs voltage Data output -0.3 ~ Vpp+0.3 v Vuvo Outputs voitage High supply voltage output pin -0.3 VH Vv Pd Power dissipation range Tas 25C 940 mw Tstg Storage temperature range ~55 - 150 C RECOMMENDED OPERATING CONDITIONS Voo VH Topr , Operating temperature ELECTRICAL CHARACTERISTICS (Vop=5V, VH=110V and Ta=25C, unless otherwise noted) wa: Limits : Symbol Parameter Test conditions Min, Typ. | Max. Unit lets) Supply current 1 No load 1 2 mA tu Supply current 2 Output ali L, no load 0 50 pA Output ail H, no load 2 4 mA hi H input current Vin=5V Input pin 0 2 wA CLK A Tie L input current Vit = OV SIN, LAT, CLK 0 2 p BLK 20, | -100 | BA VHVOH Driver output voltage InVOH = -0.5MA 100 106 Vv VHVOL lHVOL = 0.5mMA 0.7 2 VOH : loH = -0.1MA 45 4.95 Logic output voltage VoL egieoure 9 io. = 0.1mA 004 | 04 | ~ IHVOH H output current High supply voltage output pin 1 3 mA tHvOL L output current High supply voltage output pin 1 3 mA VTH Output protect operating voltage 3.4 V VTL 3.1 VvMITSUBISHI <CONTROL / DRIVER IC> M56693FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER SWITCHING CHARACTERISTICS (Vpp=5V, VH=110V and Ta=25C, unless otherwise noted) a Limits : Symbol Parameter Test conditions Min. Typ. | Max. Unit fCLK Clock frequency Duty = 45 ~- 55% 8 MHz tPLH{SO) . oar 120 300 ns i output pro tion time CL = 15pF tPHL(SO) Log Pur propaga P 100 300 ns PLH(OUT) . og 1 2 KS it tion t PHL(OUT) | ONVer output propagation time RO = 220KQ 016 [11 us trout CO = 50pF 1. : moe Driver output rise and fall time 8 28 us tfout 0.35 2 Us TEST CIRCUIT input Vop VH (1) Pulse generator characteristics trs20ns ss tf<20ns (2) Capacitance CL includes connection floating capacitance and probe input tO SOUT capacitance. : RO=220KQ PG DUT 4 CL COs50pF HVOn co RO TIMING WAVEFORM 1/fmax ' a CLK NR SIN >< liso + SOUT 9% 50% TS. 10% a . f tPHL(SO) BLK SK 50% HVOn tfOUT 10% > <> tPLH(OUT) Oey 50%! 50% < Pie >) tsu ' th : trso 1 A= 90% 10% 21 50% <> tPLH(SO) trOUT ' : 5K 90% ' 1 AH "50% tPHL(OUT)MITSUBISHI <CONTROL / DRIVER I[C> MS6693FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER TYPICAL CHARACTERISTICS Thermal derating Driver output Von-IOH 1.0 10 0.94 Ta=+75C > < 8 = E Ta=+25C -1 2 3 | N ~ 5 Ta=-20C | = ~ s 3 S 0.5 g 2 o 4 5 a / o 3 = 5 " " py 0 0 0 25 50 75 400 0 2 4 6 8 10 Temperature Ta (C) H output voltage Von (V) Duty cycle vs Permissible Duty cycle vs Permissible output current output current = o 2- 9 > 8 nm, < < E 7 x x 2 6 Q <5 = a 4 3 a? 3 = = Oo 2 Oo 1 0 9 20 40 80 100 0 20 40 60 80 100 Duty cycle (%) Duty cycle (%) Note * Ta=25C Note * Ta=75C * Repeated frequency >100Hz * Repeated frequency >100Hz * Figure in the circle represents the number of Figure in the circle represents the number of concurrently operating output circuits. concurrently operating output circuits. Current value denotes a numerical value per circuit. * Current value denotes a numerical value per circuit. Note 1. Vop=V and VH=110V, unless otherwise noted 2. Thermal derating characteristics represent those of an individual IC unit. 3. Allowable duty cycle output current characteristics represent that when a standard substrate is mounted. (Standard substrate: 70x76x1.6mm glass epoxy)