AS7262 6-Channel Visible Spectral_ID Device with Electronic Shutter and Smart Interface General Description The AS7262 is a cost-effective multi-spectral sensor-on-chip solution designed to address spectral ID applications. This highly integrated device delivers 6-channel multi-spectral sensing in the visible wavelengths from approximately 430nm to 670nm with full-width half-max (FWHM) of 40nm. An integrated LED driver with programmable current is provided for electronic shutter applications. The AS7262 integrates Gaussian filters into standard CMOS silicon via nano-optic deposited interference filter technology and is packaged in an LGA package that provides a built in aperture to control the light entering the sensor array. Control and spectral data access is implemented through either the IC register set, or with a high level AT Spectral Command set via a serial UART. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of AS7262, 6-Channel Visible Spectral_ID Device with Electronic Shutter and Smart Interface are listed below: Figure 1: Added Value of Using AS7262 Benefits Features * Compact 6-channel spectrometry solution * 6 visible channels: 450nm, 500nm, 550nm, 570nm, 600nm and 650nm, each with 40nm FWHM * Simple text-based command interface via UART, or direct register read and write with interrupt on sensor ready option on IC * UART or IC slave digital Interface * Lifetime-calibrated sensing with minimal drift over time or temperature * Visible filter set realized by silicon interference filters * No additional signal conditioning required * 16-bit ADC with digital access * Electronic shutter control/synchronization * Programmable LED drivers * Low voltage operation * 2.7V to 3.6V with IC interface * Small, robust package, with built-in aperture * 20-pin LGA package 4.5mm x 4.7mm x 2.5mm -40C to 85C temperature range ams Datasheet [v1-01] 2017-Mar-17 Page 1 Document Feedback AS7262 - General Description Applications The AS7262 applications include: * Portable spectrometry * Horticulture * Color matching and identification * Authentication and brand protection * Precision color tuning/calibration Block Diagram The system blocks of this device are shown below. Figure 2: AS7262 Visible Spectral_ID System 3V 100nF P 10F VDD1 VDD2 RX / SCL_S TX / SDA_S LED_IND INT LED_DRV AS7262 Flash Memory MOSI MISO SCK CSN_EE GND Page 2 Document Feedback 6-channel Visible Sensor 3V 3V Light Source Light in Reflective Surface ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Pin Assignments Pin Assignments The device pin assignments are described below. Figure 3: Pin Diagram of AS7262 (Top View) 20 16 1 15 5 11 6 10 Figure 4: Pin Description of AS7262 Pin Number Pin Name 1 NF 2 RESN Reset, Active LOW 3 SCK SPI Serial Clock 4 MOSI SPI Master Out Slave In 5 MISO SPI Master In Slave Out 6 CSN_EE Chip Select for external serial Flash memory, Active LOW 7 CSN_SD Chip Select for SD Card Interface, Active LOW 8 IC_ENB Select UART (Low) or IC (High) Operation 9 NF Not Functional. Do not connect. 10 NF Not Functional. Do not connect. 11 RX/SCL_S RX (UART) or SCL_S (IC Slave) Depending on IC_ENB 12 TX/SDA_S TX (UART) or SDA_S (IC Slave) Depending on IC_ENB 13 INT 14 VDD2 ams Datasheet [v1-01] 2017-Mar-17 Description Not Functional. Do not connect. Interrupt, Active LOW Voltage Supply Page 3 Document Feedback AS7262 - Pin Assignments Pin Number Pin Name 15 LED_DRV 16 GND Ground 17 VDD1 Voltage Supply 18 LED_IND 19 NF Not Functional. Do not connect. 20 NF Not Functional. Do not connect. Page 4 Document Feedback Description LED Driver Output for Driving LED, Current Sink LED Driver Output for Indicator LED, Current Sink ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Absolute Maximum Ratings Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The device is not designed for high energy UV (ultraviolet) environments, including upward looking outdoor applications, which could affect long term optical performance. Figure 5: Absolute Maximum Ratings of AS7262 Symbol Parameter Min Max Units Comments Electrical Parameters VDD1_MAX Supply Voltage VDD1 -0.3 5 V Pin VDD1 to GND VDD2_MAX Supply Voltage VDD2 -0.3 5 V Pin VDD2 to GND Input/Output Pin Voltage -0.3 VDD+0.3 V Input/Output Pin to GND VDD_IO ISCR Input Current (latch-up immunity) 100 mA JESD78D Electrostatic Discharge ESDHBM Electrostatic Discharge HBM 1000 V JS-001-2014 ESDCDM Electrostatic Discharge CDM 500 V JSD22-C101F Temperature Ranges and Storage Conditions TSTRG Storage Temperature Range TBODY Package Body Temperature RHNC Relative Humidity (non-condensing) MSL Moisture Sensitivity Level ams Datasheet [v1-01] 2017-Mar-17 -40 85 5 3 C 260 C 85 % IPC/JEDEC J-STD-020 The reflow peak soldering temperature (body temperature) is specified according to IPC/JEDEC J-STD-020 "Moisture/Reflow Sensitivity Classification for Non-hermetic Solid State Surface Mount Devices." Maximum floor life time of 168 hours Page 5 Document Feedback AS7262 - Electrical Characteristics Electrical Characteristics All limits are guaranteed with VDD = VDD1 = VDD2 = 3.3V, TAMB = 25C. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. Figure 6: Electrical Characteristics of AS7262 Symbol Parameter Conditions Min Typ Max Unit General Operating Conditions VDD1 /VDD2 Voltage Operating Supply UART Interface 2.97 3.3 3.6 V VDD1 /VDD2 Voltage Operating Supply IC Interface 2.7 3.3 3.6 V -40 25 85 C 5 mA 16.3 MHz 1.2 ns 8.5 C 8 mA -30 30 % 0.3 VDD V 12.5 100 mA -10 10 % 0.3 VDD V TAMB Operating Temperature IVDD Operating Current Internal RC Oscillator FOSC tJITTER (1) Internal RC Oscillator Frequency 15.7 Internal Clock Jitter 16 @25C Temperature Sensor DTEMP Absolute Accuracy of the Internal Temperature Measurement -8.5 Indicator LED IIND LED Current IACC Accuracy of Current VLED Voltage Range of Connected LED 1 Vds of current sink 4 LED_DRV ILED1 LED Current IACC Accuracy of Current VLED Voltage Range of Connected LED Page 6 Document Feedback 12.5, 25, 50 or 100 Vds of current sink ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Electrical Characteristics Symbol Parameter Conditions Min Typ Max Unit Digital Inputs and Outputs IIH, IIL Logic Input Current Vin=0V or VDD -1 1 A IIL RESN Logic Input Current (RESN pin) Vin=0V -1 -0.2 mA VIH CMOS Logic High Input 0.7* VDD VDD V VIL CMOS Logic Low Input 0 0.3* VDD V VOH CMOS Logic High Output I=1mA VDD-0.4 V VOL CMOS Logic Low Output I=1mA 0.4 V tRISE (1) Current Rise Time C(Pad)=30pF 5 ns tFALL (1) Current Fall Time C(Pad)=30pF 5 ns Note(s): 1. Guaranteed, not tested in production ams Datasheet [v1-01] 2017-Mar-17 Page 7 Document Feedback AS7262 - Timing Characteristics Timing Characteristics Figure 7: AS7262 IC Slave Timing Characteristics Symbol Parameter Conditions Min Typ Max Unit 400 kHz IC Interface fSCLK SCL Clock Frequency tBUF Bus Free Time Between a STOP and START 1.3 s Hold Time (Repeated) START 0.6 s tLOW LOW Period of SCL Clock 1.3 s tHIGH HIGH Period of SCL Clock 0.6 s tSU:STA Setup Time for a Repeated START 0.6 s tHS:DAT Data Hold Time 0 tSU:DAT Data Setup Time 100 tR Rise Time of Both SDA and SCL 20 300 ns tF Fall Time of Both SDA and SCL 20 300 ns tSU:STO Setup Time for STOP Condition 0.6 tHS:STA 0 CB Capacitive Load for Each Bus Line CI/O I/O Capacitance (SDA, SCL) 0.9 CB -- total capacitance of one bus line in pF s ns s 400 pF 10 pF Figure 8: IC Slave Timing Diagram tR tF tLOW SCL P tHIGH S tHD:STA tHD:DAT S tSU:DAT t SU:STA P tSU:STO VIH SDA tBUF Stop VIL Start Page 8 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Timing Characteristics Figure 9: AS7262 SPI Timing Characteristics Symbol Parameter Conditions Min Typ Max Unit 16 MHz SPI Interface fSCK Clock Frequency 0 tSCK_H Clock High Time 40 ns tSCK_L Clock Low Time 40 ns tSCK_RISE SCK Rise Time 5 ns tSCK_FALL SCK Fall Time 5 ns tCSN_S CSN Setup Time Time between CSN high-low transition to first SCK high transition 50 ns tCSN_H CSN Hold Time Time between last SCK falling edge and CSN low-high transition 100 ns tCSN_DIS CSN Disable Time 100 ns tDO_S Data-Out Setup Time 5 ns tDO_H Data-Out Hold Time 5 ns tDI_V Data-In Valid 10 ns Figure 10: SPI Master Write Timing Diagram tCSN_DIS CSN tSCK_RISE tCSN_S tCSN_H tSCK_FALL SCK tDO_S MOSI tDO_H MSB HI-Z LSB HI-Z MISO ams Datasheet [v1-01] 2017-Mar-17 Page 9 Document Feedback AS7262 - Timing Characteristics Figure 11: SPI Master Read Timing Diagram CSN_xx tSCK _H tSCK_L SCK tDI_V Dont care MOSI MISO Page 10 Document Feedback MSB LSB ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Optical Characteristics Optical Characteristics Figure 12: Optical Characteristics of AS7262 (Pass Band) (1) Symbol Parameter Test Conditions Channel (nm) Min Typ Max Unit V Channel V 5700K White LED (2), (4) 450 45 (3), (4) counts/ (W/cm2) B Channel B 5700K White LED (2), (4) 500 45 (3), (4) counts/ (W/cm2) G Channel G 5700K White LED (2), (4) 550 45 (3), (4) counts/ (W/cm2) Y Channel Y 5700K White LED (2), (4) 570 45 (3), (4) counts/ (W/cm2) O Channel O 5700K White LED (2), (4) 600 45 (3), (4) counts/ (W/cm2) R Channel R Incandescent (2), (4) 650 45 (3), (4) counts/ (W/cm2) 40 40 nm 5 nm FWHM Full Width Half Max Wacc Wavelength Accuracy dark Dark Channel Counts PFOV Package Field of View GAIN=64, TAMB=25C 5 20.0 counts deg Note(s): 1. Calibration and measurements are made using diffused light 2. Each channel is tested with GAIN = 16x, Integration Time (INT_T) = 166ms and VDD = VDD1 = VDD2 = 3.3V, TAMB=25C 3. The accuracy of the channel counts/W/cm 2 is 12% 4. The light source is either a 5700K white LED with an irradiance of ~600W/cm 2, or an incandescent light with an irradiance of ~1500 W/cm 2 (300-1000nm). The energy at each channel (V, B, G, Y, O, R) is calculated with a 40nm bandwidth around the center wavelengths (450nm, 500nm, 550nm, 570nm, 600nm, 650nm). ams Datasheet [v1-01] 2017-Mar-17 Page 11 Document Feedback AS7262 - Typical Optical Characteristics Typical Optical Characteristics Figure 13: Spectral Responsivity 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 350 Page 12 Document Feedback 400 450 500 550 600 650 700 750 ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description Detailed Description Figure 14: AS7262 Functional Block Diagram VDD1 VDD2 INT RX / SCL_S TX / SDA_S LED_IND 2 UART / I C LED_DRV I2C_ENB C Spectral_ID Engine SPI Master MISO MOSI SCK CSN_SD Multi Spectral Sensor V B G Y O R RESN RC Osc 16MHz GND 6-Channel Visible Spectral_ID Detector The AS7262 6-channel Spectral_ID is a next-generation digital spectral sensor device. Each channel has a Gaussian filter characteristic with a full width half maximum (FWHM) bandwidth of 40nm. The sensor contains analog-to-digital converters (16-bit resolution ADC), which integrate the current from each channel's photodiode. Upon completion of the conversion cycle, the integrated result is transferred to the corresponding data registers. The transfers are double-buffered to ensure that the integrity of the data is maintained. Interference filters enable high temperature stability and minimal lifetime drift. Filter accuracy will be affected by the angle of incidence which itself is limited by integrated aperture and internal micro-lens structure. The aperture-limited field of view is 20.0 to deliver specified accuracy. ams Datasheet [v1-01] 2017-Mar-17 Page 13 Document Feedback AS7262 - Detailed Description Data Conversion Description AS7262 spectral conversion is implemented via two photodiode banks per device. Bank 1 consists of data from the V, G, B, Y photodiodes. Bank 2 consists of data from the G, Y, O, R photodiodes. Spectral conversion requires the integration time (IT in ms) set to complete. If both photodiode banks are required to complete the conversion, the 2 nd bank requires an additional IT ms. Minimum IT for a single bank conversion is 2.8 ms. If data is required from all 6 photodiodes then the device must perform 2 full conversions (2 x Integration Time). The spectral conversion process is controlled with BANK Mode settings as follows: BANK Mode 0: Data will be available in registers V, B, G & Y (O and R registers will be zero) with conversions occurring continuously. BANK Mode 1: Data will be available in registers G, Y, O & R (V and B registers will be zero) with conversions occurring continuously. BANK Mode 2: Data will be available in registers V, B, G, Y, O & R with conversions occurring continuously. When the bank setting is Mode 0, Mode 1, or Mode 2, the spectral data conversion process operates continuously, with new data available after each IT ms period. In the continuous modes, care should be taken to assure prompt interrupt servicing so that integration values from both banks are all derived from the same spectral conversion cycle. BANK Mode 3: Data will be available in registers V, B, G, Y, O & R in One-Shot mode When the bank setting is set to Mode 3 the device initiates One-Shot operation. The DATA_RDY bit is set to 1 once data is available, indicating spectral conversion is complete. One-Shot mode is intended for use when it is critical to ensure spectral conversion results are obtained contemporaneously. An example use for one-shot mode is when a digitally controlled illumination source is briefly turned on for the purpose of taking a set of filter readings. Page 14 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description Figure 15: Photo Diode Array Photo Diode Array G Y B O V R Figure 16: Bank Mode and Data Conversion BANK Mode 0 One Conversion V, B, G, Y Integration Time BANK Mode 1 One Conversion G, Y, O, R Integration Time BANK Mode 2 1st Conversion Integration Time V, B, G, Y 2nd Conversion G, Y, O, R Integration Time ams Datasheet [v1-01] 2017-Mar-17 Page 15 Document Feedback AS7262 - Detailed Description RC Oscillator The timing generation circuit consists of an on-chip 16MHz, temperature compensated oscillator, which provides the master clock for the AS7262. Temperature Sensor The temperature sensor is constantly measuring the on-chip temperature and enables temperature compensation procedures. Reset Pulling down the RESN pin for longer than 100ms resets the AS7262. Figure 17: Reset Circuit RESN Spectral_ID Engine Reset Push > 100ms AS7262 Indicator LED The LED, connected to pin LED_IND, can be used to indicate programming progress of the device. While programming the AS7262 via the external SD card the indicator LED starts flashing (500ms pulses). When programming is completed the indicator LED is switched off. The LED (LED0) can be turned ON/OFF via AT commands or via IC register control. The LED sink current is programmable from 1mA, 2mA, 4mA and 8mA. Page 16 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description Electronic Shutter with LED_DRV Driver Control There are two LED driver outputs that can be used to control up to 2 LEDs. This will allow different wavelength light sources to be used in the same system. The LED output sink currents are programmable and can drive external LED sources: LED_IND from 1mA, 2mA, 4mA and 8mA and LED_DRV from 12.5mA, 25mA, 50mA and 100mA. The sources can be turned off and on via IC registers control or AT commands and provides the device with an electronic shutter. Interrupt Operation If BANK is set to Mode 0 or Mode 1 then the data is ready after the 1 st integration time. If BANK is set to Mode 2 or Mode 3 then the data is ready after two integration times. If the interrupt is enabled (INT = 1) then when the data is ready, the INT line is pulled low and DATA_RDY is set to 1. The INT line is released (returns high) when the control register is read. DATA_RDY is cleared to 0 when any of the sensor registers V, B, G, Y, O & R are read. For multi-byte sensor data (2 or 4 bytes), after the 1st byte is read the remaining get shadow buffer protected in case an integration cycle completes just after the 1st byte is read. In continuous spectral conversion mode (BANK setting of Mode 0, 1, or 2), the sensors continue to gather information at the rate of the integration time, hence if the sensor registers are not read when the interrupt line goes low, it will stay low and the next cycle's sensor data will be available in the registers at the end of the next integration cycle. When the control register BANK bits are written with a value of Mode 3, One-Shot Spectral Conversion mode is entered. When a single set of contemporaneous sensor readings is desired, writing BANK Mode 3 to the control register immediately triggers exactly two spectral data conversion cycles. At the end of these two conversion cycles, the DATA_RDY bit is set as for the other BANK modes. To perform a new One-Shot sequence, the control register BANK bits should be written with a value of Mode 3 again. This process may continue until the user writes a different value into the BANK bits. IC Slave Interface If selected by the IC_ENB pin setting, interface and control can be accomplished through an IC compatible slave interface to a set of registers that provide access to device control functions and output data. These registers on the AS7262 are, in reality, implemented as virtual registers in software. The actual IC slave hardware registers number only three and are described in the table below. The steps necessary to access the virtual registers defined in the following are explained in pseudocode for external IC master writes and reads below. ams Datasheet [v1-01] 2017-Mar-17 Page 17 Document Feedback AS7262 - Detailed Description IC Feature List * Fast mode (400kHz) and standard mode (100kHz) support. * 7+1-bit addressing mode. * Write format: Byte. * Read format: Byte. * SDA input delay and SCL spike filtering by integrated RC-components. Figure 18: IC Slave Device Address and Physical Registers Entity Description Note 8-bit Slave Address Byte = 1001001x (device address = 49 hex) x= 1 for Master Read (byte = 93 hex) x= 0 for Master Write (byte = 92 hex) STATUS Register IC slave interface STATUS register Read-only Register Address = 0x00 Bit 1: TX_VALID 0 New data may be written to WRITE register 1 WRITE register occupied. Do NOT write. Bit 0: RX_VALID 0 No data is ready to be read in READ register. 1 Data byte available in READ register. WRITE Register IC slave interface WRITE register Write-only Register Address = 0x01 8-Bits of data written by the IC Master intended for receipt by the IC slave. Used for both virtual register addresses and write data. READ Register IC slave interface READ register Read-only Register Address = 0x02 8-Bits of data to be read by the IC Master. Device Slave Address IC Virtual Register Write Access IC Virtual Register Byte Write shows the pseudocode necessary to write virtual registers on the AS7262. Note that, because the actual registers of interest are realized as virtual registers, a means of indicating whether there is a pending read or write operation of a given virtual register is needed. To convey this information, the most significant bit of the virtual register address is used as a marker. If it is 1, then a write is pending, otherwise the slave is expecting a virtual read operation. The pseudocode illustrates the proper technique for polling of the IC slave status register to ensure the slave is ready for each transaction. Page 18 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description IC Virtual Register Byte Write Pseudocode Poll IC slave STATUS register; If TX_VALID bit is 0, a write can be performed on the interface; Send a virtual register address and set the MSB of the register address to 1 to indicate the pending write; Poll IC slave STATUS register; If TX_VALID bit is 0, the virtual register address for the write has been received and the data may now be written; Write the data. Sample Code: #define I2C_AS72XX_SLAVE_STATUS_REG 0x00 #define I2C_AS72XX_SLAVE_WRITE_REG 0x01 #define I2C_AS72XX_SLAVE_READ_REG 0x02 #define I2C_AS72XX_SLAVE_TX_VALID 0x02 #define I2C_AS72XX_SLAVE_RX_VALID 0x01 void i2cm_AS72xx_write(uint8_t virtualReg, uint8_t d) { volatile uint8_t status; while (1) { // Read slave IC status to see if the write buffer is ready. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0) // No inbound TX pending at slave. Okay to write now. break; } // Send the virtual register address (setting bit 7 to indicate a pending write). i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, (virtualReg | 0x80)); while (1) { // Read the slave IC status to see if the write buffer is ready. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0) // No inbound TX pending at slave. Okay to write data now. break; } // Send the data to complete the operation. i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, d); } ams Datasheet [v1-01] 2017-Mar-17 Page 19 Document Feedback AS7262 - Detailed Description IC Virtual Register Read Access IC Virtual Register Byte Read shows the pseudocode necessary to read virtual registers on the AS7262. Note that in this case, reading a virtual register, the register address is not modified. IC Virtual Register Byte Read Pseudocode Poll IC slave STATUS register; If TX_VALID bit is 0, the virtual register address for the read may be written; Send a virtual register address; Poll IC slave STATUS register; If RX_VALID bit is 1, the read data is ready; Read the data. Sample Code: uint8_t i2cm_AS72xx_read(uint8_t virtualReg) { volatile uint8_t status, d; while (1) { // Read slave IC status to see if the read buffer is ready. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0) // No inbound TX pending at slave. Okay to write now. break; } // Send the virtual register address (setting bit 7 to indicate a pending write). i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, virtualReg); while (1) { // Read the slave IC status to see if our read data is available. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); if ((status & I2C_AS72XX_SLAVE_RX_VALID) != 0) // Read data is ready. break; } // Read the data to complete the operation. d = i2cm_read(I2C_AS72XX_SLAVE_READ_REG); return d; s } The details of the i2cm_read() and i2cm_write() functions in previous Figures are dependent upon the nature and implementation of the external IC master device. Page 20 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description 4-Byte Floating-Point (FP) Registers Several 4-byte registers (hex) are used by the AS7262. Here is an example of how these registers are used to represent floating point data (based on the IEEE 754 standard): Figure 19: Example of the IEEE 754 Standard byte 3 byte 2 byte 1 byte 0 3E (hex) 20 (hex) 00 (hex) 00 (hex) 0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31 24 23 16 15 8 7 0 sign exponent (8 bits) fraction (23 bits) 0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 = 0.15625 0 31 30 23 22 The floating point (FP) value assumed by 32 bit binary32 data with a biased exponent e (the 8 bit unsigned integer) and a 23 bit fraction is (for the above example): FP value = ( - 1 ) sign 23 -i ( e - 127 ) 1 + b 23 - i 2 x 2 i=1 23 0 -i ( 124 - 127 ) FP value = ( - 1 ) 1 + b 23 - i 2 x 2 i=1 -2 FP value = 1 x ( 1 + 2 ) x 2 ams Datasheet [v1-01] 2017-Mar-17 -3 = 0.15625 Page 21 Document Feedback AS7262 - Detailed Description IC Virtual Register Set Figure 20 provides a summary of the AS7262 IC register set. Figures after that provide additional register details. All register data is hex, and all multi-byte entities are Big Endian (most significant byte is situated at the lowest register address). Multiple byte registers (2 byte integer, or, 4 byte floating point) must be read in the order of ascending register addresses (low to high). And if capable of being written to, must also be written in the order of ascending register addresses. Figure 20: IC Virtual Register Set Overview Addr Name <D7> <D6> <D5> <D4> <D3> <D2> <D1> <D0> DATA_RDY RSVD Version Registers 0x00:0x01 HW_Version Hardware Version 0x02:0x03 FW_Version Firmware Version Control Registers 0x04 Control_Setup RST INT 0x05 INT_T Integration Time 0x06 Device_Temp Device Temperature 0x07 LED_Control RSVD GAIN Bank ICL_DRV LED_DRV ICL_IND LED_IND Sensor Raw Data Registers 0x08 V_High Channel V High Data Byte 0x09 V_Low Channel V Low Data Byte 0x0A B_High Channel B High Data Byte 0x0B B_Low Channel B Low Data Byte 0x0C G_High Channel G High Data Byte 0x0D G_Low Channel G Low Data Byte 0x0E Y_High Channel Y High Data Byte 0x0F Y_Low Channel Y Low Data Byte 0x10 O_High Channel O High Data Byte 0x11 O_Low Channel O Low Data Byte 0x12 R_High Channel R High Data Byte 0x13 R_Low Channel R Low Data Byte Page 22 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description Addr Name <D7> <D6> <D5> <D4> <D3> <D2> <D1> <D0> Sensor Calibrated Data Registers 0x14:0x17 V_Cal Channel V Calibrated Data (floating point) 0x18:0x1B B_Cal Channel B Calibrated Data (floating point) 0x1C:0x1F G_Cal Channel G Calibrated Data (floating point) 0x20:0x23 Y_Cal Channel Y Calibrated Data (floating point) 0x24:0x27 O_Cal Channel O Calibrated Data (floating point) 0x28:0x2B R_Cal Channel R Calibrated Data (floating point) ams Datasheet [v1-01] 2017-Mar-17 Page 23 Document Feedback AS7262 - Detailed Description Detailed Register Description Figure 21: HW Version Registers Addr: 0x00 HW_Version Bit Bit Name Default Access 7:0 Device Type 01000000 R Addr: 0x01 Bit Description Device type number HW_Version Bit Bit Name Default Access 7:0 HW Version 00111110 R Bit Description Hardware version Figure 22: FW Version Registers Addr: 0x02 FW_Version Bit Bit Name Default Access 7:6 Minor Version R Minor version [1:0] 5:0 Sub Version R Sub version Addr: 0x03 Bit Description FW_Version Bit Bit Name 7:4 Major version R Major version 3:0 Minor version R Minor version [5:2] Page 24 Document Feedback Default Access Bit Description ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description Figure 23: Control Setup Register Addr: 0x04/0x84 Control_Setup Bit Bit Name Default Access Bit Description 7 RST 0 R/W Soft Reset, Set to 1 for soft reset, goes to 0 automatically after the reset 6 INT 0 R/W Enable interrupt pin output (INT), 1: Enable, 0: Disable 5:4 GAIN 0 R/W Sensor Channel Gain Setting (all channels) `b00=1x; `b01=3.7x; `b10=16x; `b11=64x 3:2 BANK 10 R/W Data Conversion Type (continuous) `b00=Mode 0; `b01=Mode 1; `b10=Mode 2; `b11=Mode 3 One-Shot 1 DATA_RDY 0 R/W 1: Data Ready to Read, sets INT active if interrupt is enabled. Can be polled if not using INT. 0 RSVD 0 R Reserved; Unused Figure 24: Integration Time Register Addr: 0x05/0x85 INT_T Bit Bit Name Default Access 7:0 INT_T 0xFF R/W Bit Description Integration time = <value> * 2.8ms Figure 25: Device Temperature Register Addr: 0x06 Bit Bit Name 7:0 Device_Temp ams Datasheet [v1-01] 2017-Mar-17 Device_Temp Default Access R Bit Description Device temperature data byte (C) Page 25 Document Feedback AS7262 - Detailed Description Figure 26: LED Control Register Addr: 0x07/0x87 LED Control Bit Bit Name Default Access 7:6 RSVD 0 R 5:4 ICL_DRV 00 R/W LED_DRV current limit `b00=12.5mA; `b01=25mA; `b10=50mA; `b11=100mA 3 LED_DRV 0 R/W Enable LED_DRV 1: Enabled; 0: Disabled 2:1 ICL_IND 00 R/W LED_IND current limit `b00=1mA; `b01=2mA; `b10=4mA; `b11=8mA 0 LED_IND 0 R/W Enable LED_IND 1: Enabled; 0: Disabled Page 26 Document Feedback Bit Description Reserved ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description Figure 27: Sensor Raw Data Registers Addr: 0x08 Bit Bit Name 7:0 V_High V_High Default Access R Addr: 0x09 Bit Bit Name 7:0 V_Low Bit Name 7:0 B_High Default Access R Bit Name 7:0 B_Low Default Bit Name 7:0 G_High R Bit Name 7:0 G_Low Default Bit Name 7:0 Y_High R Bit Name 7:0 Y_Low ams Datasheet [v1-01] 2017-Mar-17 Bit Description Channel B Low Data Byte G_High Default Access R Bit Description Channel G High Data Byte G_Low Default Access R Bit Description Channel G Low Data Byte Y_High Default Access R Addr: 0x0F Bit Channel B High Data Byte Access Addr: 0x0E Bit Bit Description B_Low Addr: 0x0D Bit Channel V Low Data Byte Access Addr: 0x0C Bit Bit Description B_High Addr: 0x0B Bit Channel V High Data Byte V_Low Addr: 0x0A Bit Bit Description Bit Description Channel Y High Data Byte Y_Low Default Access R Bit Description Channel Y Low Data Byte Page 27 Document Feedback AS7262 - Detailed Description Addr: 0x10 Bit Bit Name 7:0 O_High O_High Default Access R Addr: 0x11 Bit Bit Name 7:0 O_Low Bit Name 7:0 R_High Default Access R Bit Name 7:0 R_Low Page 28 Document Feedback Bit Description Channel O Low Data Byte R_High Default Access R Addr: 0x13 Bit Channel O High Data Byte O_Low Addr: 0x12 Bit Bit Description Bit Description Channel R High Data Byte R_Low Default Access R Bit Description Channel R Low Data Byte ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description Figure 28: Sensor Calibrated Data Registers Addr: 0x14:0x17 Bit Bit Name 31:0 V_Cal V_Cal Default Access R Addr: 0x18:0x1B Bit Bit Name 31:0 B_Cal Bit Name 31:0 G_Cal Default Access R Bit Name 31:0 Y_Cal Default Access R Bit Name 31:0 O_Cal Default Access R Bit Name 31:0 R_Cal ams Datasheet [v1-01] 2017-Mar-17 Bit Description Channel G Calibrated Data (floating point) Bit Description Channel Y Calibrated Data (floating point) O_Cal Default Access R Addr: 0x28:0x2B Bit Channel B Calibrated Data (floating point) Y_Cal Addr: 0x24:0x27 Bit Bit Description G_Cal Addr: 0x20:0x23 Bit Channel V Calibrated Data (floating point) B_Cal Addr: 0x1C:0x1F Bit Bit Description Bit Description Channel O Calibrated Data (floating point) R_Cal Default Access R Bit Description Channel R Calibrated Data (floating point) Page 29 Document Feedback AS7262 - Detailed Description UART Interface If selected by the IC_ENB pin setting, the UART module implements the TX and RX signals as defined in the RS-232 / V.24 standard communication protocol. It has on both, receive and transmit path, a 16 entry deep FIFO. It can generate interrupts as required. UART Feature List 1 * Full Duplex Operation (Independent Serial Receive and Transmit Registers) with FIFO buffer of 8 byte for each. * At a clock rate of 16MHz it supports communication at 115200 Baud. * Supports Serial Frames with 8 Data Bits, no Parity and 1 Stop Bit Theory of Operation Transmission If data is available in the transmit FIFO, it will be moved into the output shift register and the data will be transmitted at the configured Baud Rate, starting with a Start Bit (logic zero) and followed by a Stop Bit (logic one). Reception At any time, with the receiver being idle, if a falling edge of a start bit is detected on the input, a byte will be received and stored in the receive FIFO. The following Stop Bit will be checked to be logic one. Figure 29: UART Protocol Data Bits TX D0 D1 Start Bit D2 D3 D4 D5 D6 D7 Tbit=1/Baude Rate Always Low RX D0 Stop Bit Next Start Always High D0 D1 D2 D3 D4 D5 D6 D7 D0 Start Bit detected After Tbit/2: Sampling of Start Bit After Tbit: Sampling of Data Sample Points 1. With UART operation, min VDD of 2.97V is required as shown in Electrical Characteristics Figures. Page 30 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description AT Command Interface The microprocessor interface to control the Visible Spectral_ID sensor is via the UART, using the AT Commands across the UART interface. The 6-channel Spectral _ID sensor provides a text-based serial command interface borrowed from the "AT Command" model used in early Hayes modems. For example: * Read DATA value: ATDATA <data>OK * Set the gain of the sensor to 1x: ATGAIN =0 OK The "AT Command Interface Block Diagram", shown below between the network interface and the core of the system, provides access to the Spectral_ID engine's control and configuration functions. Figure 30: AT Command Interface Block Diagram RX P AT Commands TX AT Command Interface Spectral_ID Engine Interface AT Command Interface AS726x In Figure 31, numeric values may be specified with no leading prefix, in which case they will be interpreted as decimals, or with a leading "0x" to indicate that they are hexadecimal numbers, or with a leading "`b" to indicate that they are binary numbers. The commands are loosely grouped into functional areas. Texts appearing between angle brackets (`<` and `>`) are commands or response arguments. A carriage return character, a linefeed character, or both may terminate commands and responses. Note that any command that encounters an error will generate the "ERROR" response shown, for example, in the NOP command at the top of the first table, but has been omitted elsewhere in the interest of readability and clarity. ams Datasheet [v1-01] 2017-Mar-17 Page 31 Document Feedback AS7262 - Detailed Description Figure 31: AT Commands Command Response Description/Parameters Spectral Data per Channel ATDATA <V_value>, <B_value>, <G_value>, <Y_value>, <O_value>, <R_value> OK ATCDATA <Cal_V_value>, <Cal_B_value>, <Cal_G_value>, <Cal_Y_value>, <Cal_O_value>, <Cal_R_value> OK Read V, B, G, Y, O & R data. Returns comma-separated 16-bit integers. Read calibrated V, B, G, Y, O & R data. Returns comma-separated 32-bit floating point values. Sensor Configuration Set sensor integration time. Values should be in the range [1..255], with integration time = <value> * 2.8ms ATINTTIME=<value> OK ATINTTIME <value> OK ATGAIN=<value> OK ATGAIN <value>OK Read sensor gain setting, returning 0, 1, 2, or 3 as defined immediately above. ATTEMP <value>OK Read temperature of chip in degree Celsius ATTCSMD=<value> OK ATTCSMD <value> OK ATBURST=<value> OK Page 32 Document Feedback Read sensor integration time, with integration time = <value> * 2.8ms Set sensor gain: 0=1x, 1=3.7x, 2=16x, 3=64x Set Sensor Mode 0 = BANK Mode 0; 1 = BANK Mode 1; 2 = BANK Mode 2; 3 = BANK Mode 3 One-Shot; 4 = Sensors OFF In One-Shot mode, each ATTCSMD=3 command triggers a One-Shot reading Read Sensor Mode, see above <value>= # of samples (ATBURST=1 means run until ATBURST=0 is received (a special case for continuous output) ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Detailed Description Command Response Description/Parameters LED Driver Controls ATLED0=<value> OK ATLED0 <100|0>OK ATLED1=<value> OK ATLED1 <100|0>OK Sets LED_IND: 100=ON, 0=OFF Reads LED_IND setting: 100=ON, 0=OFF Sets LED_DRV: 100=ON, 0=OFF Reads LED_DRV setting: 100=ON, 0=OFF ATLEDC=<value> OK Sets LED_IND and LED_DRV current LED_IND: bits 3:0; LED_DRV: 7:4 bits LED_IND: `b00=1mA; `b01=2mA; `b10=4mA; `b11=8mA LED_DRV: `b00=12.5mA; `b01=25mA; `b10=50mA; `b11=100mA ATLEDC <value>OK Reads LED_IND and LED_DRV current settings as shown above NOP, Version Access, System Reset AT OK Success ERROR Failure ATRST None ATVERSW <SWversion#>OK ERROR Failure Returns the system software version number ATVERHW <HWversion#>OK ERROR Failure Returns the system hardware revision and product ID, with bits 7:4 containing the part ID, and bits 3:0 yielding the chip revision value. NOP Software Reset - no response Firmware Update OK <value>= 16-bit checksum. Initializes the firmware update process. Number of bytes that follow are always 56k bytes ATFW=<value> OK Download new firmware Up to 7 Bytes represented as hex chars with no leading or trailing 0x. Repeat command till all 56k bytes of firmware are downloaded ATFWA OK Causes target address for FW updates to advance. Should be called after every successful "OK" returned after "ATFW=<value>" command usage. ATFWS OK Causes the active image to switch between the two possible current images and then resets the IC ATFWU=<value> ams Datasheet [v1-01] 2017-Mar-17 Page 33 Document Feedback AS7262 - Application Information Application Information Schematic Figure 32: AS7262 Typical Application Circuit 3V3 3V3 CSN_SD 7 14 VDD2 CSN_EE 6 1 /CS 2 RESN MISO 5 2 DO 16 GND MOSI 4 5 SCK 3 6 DI Flash CLKMemory 8 3 /WP 7 /HOLD 3V3 Vled 15 LED_DRV 18 LED_IND AS7262 I2C_ENB TX INT 11 RX/SCL_S 12 TX/SDA_S 13 INT NC NC NC NC NC 19 20 1 10 9 VCC 8 DNP RX 1uF GND 10K RST VDD1 4 100 nF 10uF 17 0R PCB Layout Figure 33: Typical Layout Routing In order to prevent interference, avoid trace routing feedthroughs with exposure directly under the AS7262. An example routing is illustrated in the diagram. Page 34 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Package Drawings & Markings Package Drawings & Markings Figure 34: Package Drawings LGA AS7262 RoHS Green Note(s): 1. XXXXX = tracecode ams Datasheet [v1-01] 2017-Mar-17 Page 35 Document Feedback AS7262 - PCB Pad Layout PCB Pad Layout Suggested PCB pad layout guidelines for the LGA device are shown. Figure 35: Recommended PCB Pad Layout Unit: mm 0.30 1.10 0.65 4.60 1 4.40 Note(s): 1. Unless otherwise specified, all dimensions are in millimeters. 2. Dimensional tolerances are 0.05mm unless otherwise noted. 3. This drawing is subject to change without notice. Page 36 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Mechanical Data Mechanical Data Figure 36: Tape & Reel Information Note(s): 1. Each reel contains 2000 parts. ams Datasheet [v1-01] 2017-Mar-17 Page 37 Document Feedback AS7262 - Soldering & Storage Information Soldering & Storage Information Soldering Information The module has been tested and has demonstrated an ability to be reflow soldered to a PCB substrate. The solder reflow profile describes the expected maximum heat exposure of components during the solder reflow process of product on a PCB. Temperature is measured on top of component. The components should be limited to a maximum of three passes through this solder reflow profile. Figure 37: Solder Reflow Profile Parameter Reference Average temperature gradient in preheating Device 2.5C/s tSOAK 2 to 3 minutes Time above 217C(T1) t1 Max 60s Time above 230C(T2) t2 Max 50s Time above Tpeak - 10C(T3) t3 Max 10s Peak temperature in reflow Tpeak 260C Soak time Temperature gradient in cooling Max -5C/s Figure 38: Solder Reflow Profile Graph Page 38 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Soldering & Storage Information Manufacturing Process Considerations The AS7262 package is compatible with standard reflow no-clean and cleaning processes including aqueous, solvent or ultrasonic techniques. However, as an open-aperture device, precautions must be taken to avoid particulate or solvent contamination as a result of any manufacturing processes, including pick and place, reflow, cleaning, integration assembly and/or testing. Temporary covering of the aperture is allowed. To avoid degradation of accuracy or performance in the end product, care should be taken that any temporary covering and associated sealants/debris are thoroughly removed prior to any optical testing or final packaging. Storage Information Moisture Sensitivity Optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previously absorbed into the package. To ensure the package contains the smallest amount of absorbed moisture possible, each device is baked prior to being dry packed for shipping. Devices are dry packed in a sealed aluminized envelope called a moisture-barrier bag with silica gel to protect them from ambient moisture during shipping, handling, and storage before use. Shelf Life The calculated shelf life of the device in an unopened moisture barrier bag is 12 months from the date code on the bag when stored under the following conditions: * Shelf Life: 12 months * Ambient Temperature: <40C * Relative Humidity: <90% Rebaking of the devices will be required if the devices exceed the 12 month shelf life or the Humidity Indicator Card shows that the devices were exposed to conditions beyond the allowable moisture region. ams Datasheet [v1-01] 2017-Mar-17 Page 39 Document Feedback AS7262 - Soldering & Storage Information Floor Life The module has been assigned a moisture sensitivity level of MSL 3. As a result, the floor life of devices removed from the moisture barrier bag is 168 hours from the time the bag was opened, provided that the devices are stored under the following conditions: * Floor Life: 168 hours * Ambient Temperature: <30C * Relative Humidity: <60% If the floor life or the temperature/humidity conditions have been exceeded, the devices must be rebaked prior to solder reflow or dry packing. Rebaking Instructions When the shelf life or floor life limits have been exceeded, rebake at 50C for 12 hours. Page 40 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Ordering & Contact Information Ordering & Contact Information Figure 39: Ordering Information (1) Ordering Code Package Marking Description Delivery Form Delivery Quantity AS7262-BLGT 20-pin LGA AS7262 6-Channel Visible Spectral_ID Device with Electronic Shutter and Smart Interface Tape & Reel 2000 pcs/reel Note(s): 1. Required companion serial flash memory (must be ams verified) is ordered from the flash memory supplier (e.g. AT25SF041-SSHD-B from Adesto Technologies). 2. AS7262 flash memory software is available from ams. Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/contact Headquarters ams AG Tobelbader Strasse 30 8141 Premstaetten Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com ams Datasheet [v1-01] 2017-Mar-17 Page 41 Document Feedback AS7262 - RoHS Compliant & ams Green Statement RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes. ams Green (RoHS compliant and no Sb/Br): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Page 42 Document Feedback ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Copyrights & Disclaimer Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG "AS IS" and any express or implied warranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of ams AG rendering of technical or other services. ams Datasheet [v1-01] 2017-Mar-17 Page 43 Document Feedback AS7262 - Document Status Document Status Document Status Product Preview Preliminary Datasheet Datasheet Datasheet (discontinued) Page 44 Document Feedback Product Status Definition Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Revision Information Revision Information Changes from 1-00 (2016-Dec-16) to current revision 1-01 (2017-Mar-17) Updated Figure 12 and notes below Page 11 Note(s): 1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision. 2. Correction of typographical errors is not explicitly mentioned. ams Datasheet [v1-01] 2017-Mar-17 Page 45 Document Feedback AS7262 - Content Guide Content Guide Page 46 Document Feedback 1 1 2 2 General Description Key Benefits & Features Applications Block Diagram 3 5 6 8 11 12 Pin Assignments Absolute Maximum Ratings Electrical Characteristics Timing Characteristics Optical Characteristics Typical Optical Characteristics 13 13 14 16 16 16 16 17 17 17 18 18 19 20 20 21 22 24 30 30 30 30 30 31 Detailed Description 6-Channel Visible Spectral_ID Detector Data Conversion Description RC Oscillator Temperature Sensor Reset Indicator LED Electronic Shutter with LED_DRV Driver Control Interrupt Operation IC Slave Interface IC Feature List IC Virtual Register Write Access IC Virtual Register Byte Write IC Virtual Register Read Access IC Virtual Register Byte Read 4-Byte Floating-Point (FP) Registers IC Virtual Register Set Detailed Register Description UART Interface UART Feature List Theory of Operation Transmission Reception AT Command Interface 34 34 34 Application Information Schematic PCB Layout 35 36 37 Package Drawings & Markings PCB Pad Layout Mechanical Data 38 38 39 39 39 39 40 40 Soldering & Storage Information Soldering Information Manufacturing Process Considerations Storage Information Moisture Sensitivity Shelf Life Floor Life Rebaking Instructions ams Datasheet [v1-01] 2017-Mar-17 AS7262 - Content Guide 41 42 43 44 45 ams Datasheet [v1-01] 2017-Mar-17 Ordering & Contact Information RoHS Compliant & ams Green Statement Copyrights & Disclaimer Document Status Revision Information Page 47 Document Feedback