1
File Number
1827.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
IRF450
13A, 500V, 0.400 Ohm, N-Channel
Power MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17435.
Features
13A, 500V
•r
DS(ON) = 0.400
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
JEDEC TO-204AA
Ordering Information
PART NUMBER PACKAGE BRAND
IRF450 TO-204AA IRF450
NOTE: When ordering, include the entire part number.
G
D
S
DRAIN
(FLANGE)
SOURCE (PIN 2)
GATE (PIN 1)
Data Sheet March 1999
2
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
IRF450 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS 500 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 500 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 13 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID8.1 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 52 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD125 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS 860 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
pkg 300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ= 25oC to 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA (Figure 10) 500 - - V
Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V
Gate to Source Leakage IGSS VGS = ±20V - - ±100 nA
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS,V
GS = 0V, TJ= 125oC - - 250 µA
On-State Drain Current (Note 2) ID(ON) VDS >I
D(ON) x rDS(ON)MAX,V
GS = 10V (Figure 7) 13 - - A
Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 7.2A (Figures 8, 9) - 0.3 0.400
Forward Transconductance (Note 2) gfs VDS 50V, ID = 7.2A (Figure 12) 6.0 11 - S
Turn-On Delay Time td(ON) VDD = 250V, ID13A, RG = 6.2, RL = 19
(Figures 17, 18) MOSFET SwitchingTimes are
Essentially Independent of Operating
Temperature
-2027ns
Rise Time tr-4066ns
Turn-Off Delay Time td(OFF) - 72 100 ns
Fall Time tf-3560ns
Total Gate Charge
(Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID= 13A, VDS = 0.8 x Rated BVDSS,
Ig(REF) = 1.5mA (Figures 14, 19, 20) Gate Charge
is Essentially Independent of Operating
Temperature
- 85 130 nC
Gate to Source Charge Qgs -12-nC
Gate to Drain “Miller” Charge Qgd -42-nC
Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 1800 - pF
Output Capacitance COSS - 400 - pF
Reverse Transfer Capacitance CRSS - 100 - pF
Internal Drain Inductance LDMeasured between the
Contact Screw on the
Flange that is Closer to
Source and Gate Pins
and the Center of Die
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
- 5.0 - nH
Internal Source Inductance LSMeasured from the
Source Lead, 6mm
(0.25in)fromthe Flange
to Source Bonding Pad
- 12.5 - nH
Thermal Resistance Junction to Case RθJC - - 0.83 oC/W
Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 30 oC/W
LS
LD
G
D
S
IRF450
3
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Diode
- - 13 A
Pulse Source to Drain Current (Note 3) ISDM - - 52 A
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 13A, VGS = 0V (Figure 13) - - 1.4 V
Reverse Recovery Time trr TJ = 25oC, ISD = 13A, dISD/dt = 100A/µs 280 600 1200 ns
Reverse Recovered Charge QRR TJ = 25oC, ISD = 13A, dISD/dt = 100A/µs 3.2 7.5 14 µC
NOTES:
2. Pulse test: pulse width 300µs, duty cycle 2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, starting TJ = 25oC, L = 9.2mH, RG = 25, peak IAS = 13A. See Figures 14, 15.
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
G
D
S
0 50 100 150
0
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0.2
0.4
0.6
0.8
1.0
1.2
TC, CASE TEMPERATURE (oC)
50 75 10025 150
15
12
9
0
6
ID, DRAIN CURRENT (A)
3
125
ZθJC, TRANSIENT
10
1
0.1
0.001
10-2
10-5 10-4 10-3
t1, RECTANGULAR PULSE DURATION (s)
DUTY FACTOR: D = t1/t2
NOTES:
PEAK TJ= PDM x ZθJC + TC
0.0001
THERMAL IMPEDANCE (oC/W)
0.2
0.1
0.05
0.01
0.02
0.5
0.1 1 10
t2
PDM
t1
SINGLE PULSE
IRF450
4
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves
Unless Otherwise Specified (Continued)
102
10
110
102
0.1
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
10µs
100µs
1ms
DC
10ms
103
TJ = MAX RATED
SINGLE PULSE
TC = 25oC
OPERATION IN THIS
REGION IS LIMITED
BY rDS(ON)
103
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
50 100 150 2000 250
20
16
12
0
8
ID, DRAIN CURRENT (A)
VGS = 5.5V
VGS = 4.5V
VGS = 5.0V
80µs PULSE TEST
4
VGS = 6.0V
VGS = 4.0V
VDS, DRAIN TO SOURCE VOLTAGE (V)
36912015
20
16
12
0
8
ID, DRAIN CURRENT (A)
80µs PULSE TEST
4
VGS = 10V
VGS = 5.5V
VGS = 4.5V
VGS = 5.0V
VGS = 6.0V
VGS = 4.0V
ID, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
10
1
0.1
10-2 0246810
TJ = 150oCTJ = 25oC
2
2
2
2
5
5
5
80µs PULSE TEST
VDS 50V
5
102
48
ID, DRAIN CURRENT (A)
12 24 36
060
2.0
1.6
1.2
0
0.8
DRAIN TO SOURCE ON RESISTANCE
VGS = 20V
0.4
VGS = 10V
80µs PULSE TEST 3.0
1.8
0.6
80-60 TJ, JUNCTION TEMPERATURE (oC)
2.4
1.2
00 60 120 160
NORMALIZED DRAIN TO SOURCE
ID = 13A
-20-40 20 40 100 140
VGS = 10V
ON RESISTANCE
IRF450
5
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves
Unless Otherwise Specified (Continued)
1.25
1.05
0.85
60-60 TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
1.15
0.95
0.75 -20 20 100 160
BREAKDOWN VOLTAGE
0-40 40 80 120 140
ID = 250µA
0 2 10 2 5 102
C, CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
10000
8000
6000
4000
2000
05
CRSS
CISS
COSS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGD
ID, DRAIN CURRENT (A)
4 8 12 16020
20
16
12
0
8
gfs, TRANSCONDUCTANCE (S)
80µs PULSE TEST
4
VDS 50V
TJ = 150oC
TJ = 25oC
ISD, SOURCE TO DRAIN CURRENT (A)
VSD, SOURCE TO DRAIN VOLTAGE (V)
102
10
1
0.10 0.5 1.0 1.5 2.0 2.5
TJ = 25oC
TJ = 150oC
2
5
2
5
2
5
Qg(TOT), TOTAL GATE CHARGE (nC)
25 50 75 1000 125
4
20
8
VGS, GATE TO SOURCE VOLTAGE (V)
16
VDS = 400V
ID = 13A
FOR TEST CIRCUIT, SEE FIGURE 18
VDS = 250V
VDS = 100V
12
0
IRF450
6
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
VGS
0.01
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-VDD
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
0.3µF
12V
BATTERY 50k
VDS
S
DUT
D
G
Ig(REF)
0
(ISOLATED
VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPE
AS DUT Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
IG(REF)
0
IRF450
7
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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IRF450