MMBF2202PT3 - Motorola / Freescale Semiconductor

Motorola Small–Signal Transistors, FETs and Diodes Device Data

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Part of the GreenLine Portfolio of devices with energy–con-

serving traits.

These miniature surface mount MOSFETs utilize Motorola’s

High Cell Density, HDTMOS process. Low rDS(on) assures

minimal power loss and conserves energy, making this device

ideal for use in small power management circuitry. Typical

applications are dc–dc converters, power management in

portable and battery–powered products such as computers,

printers, PCMCIA cards, cellular and cordless telephones.

•Low rDS(on) Provides Higher Efficiency and Extends Battery

Life

•Miniature SC–70/SOT–323 Surface Mount Package Saves

Board Space

MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)

Rating Symbol Value Unit

Drain–to–Source V oltage VDSS 20 Vdc

Gate–to–Source Voltage — Continuous VGS ±20 Vdc

Drain Current — Continuous @ TA = 25°C

Drain Current — Continuous @ TA = 70°C

Drain Current — Pulsed Drain Current (tp ≤ 10 µs)

IDM

300

240

750

mAdc

Total Power Dissipation @ TA = 25°C(1)

Derate above 25°CPD150

1.2 mW

mW/°C

Operating and Storage Temperature Range TJ, Tstg – 55 to 150 °C

Thermal Resistance — Junction–to–Ambient RθJA 833 °C/W

Maximum Lead Temperature for Soldering Purposes, for 10 seconds TL260 °C

DEVICE MARKING

(1) Mounted on G10/FR4 glass epoxy board using minimum recommended footprint.

ORDERING INFORMATION

Device Reel Size Tape Width Quantity

MMBF2202PT1 7″8 mm embossed tape 3000

MMBF2202PT3 13″8 mm embossed tape 10,000

GreenLine is a trademark of Motorola, Inc.

HDTMOS is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.

Thermal Clad is a registered trademark of the Berquist Company.

Preferred devices are Motorola recommended choices for future use and best overall value.

Order this document

by MMBF2202PT1/D



SEMICONDUCTOR TECHNICAL DATA



P–CHANNEL

ENHANCEMENT–MODE

TMOS MOSFET

rDS(on) = 2.2 OHM

Motorola Preferred Device

CASE 419–02, STYLE 8

SC–70/SOT–323

 Motorola, Inc. 1998



3 DRAIN

GATE

2 SOURCE

REV 2

MMBF2202PT1

2Motorola Small–Signal Transistors, FETs and Diodes Device Data

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Drain–to–Source Breakdown Voltage

(VGS = 0 Vdc, ID = 10 µA) V(BR)DSS 20 — — Vdc

Zero Gate Voltage Drain Current

(VDS = 16 Vdc, VGS = 0 Vdc)

(VDS = 16 Vdc, VGS = 0 Vdc, TJ = 125°C)

IDSS —

——

—1.0

µAdc

Gate–Body Leakage Current (VGS = ±20 Vdc, VDS = 0) IGSS — — ±100 nAdc

ON CHARACTERISTICS(1)

Gate Threshold Voltage

(VDS = VGS, ID = 250 µAdc) VGS(th) 1.0 1.7 2.4 Vdc

Static Drain–to–Source On–Resistance

(VGS = 10 Vdc, ID = 200 mAdc)

(VGS = 4.5 Vdc, ID = 50 mAdc)

rDS(on) —

—1.5

2.0 2.2

3.5

Ohms

Forward T ransconductance (VDS = 10 Vdc, ID = 200 mAdc) gFS —600 — mMhos

DYNAMIC CHARACTERISTICS

Input Capacitance (VDS = 5.0 V) Ciss —50 — pF

Output Capacitance (VDS = 5.0 V) Coss —45 —

T ransfer Capacitance (VDG = 5.0 V) Crss —20 —

SWITCHING CHARACTERISTICS(2)

T urn–On Delay Time

(V 15 Vd

td(on) —2.5 — ns

Rise T ime (VDD = –15 Vdc,

RL=75ΩI

D= 200 mAdc

tr— 1.0 —

T urn–Off Delay T ime

L =

Ω

D =

200

VGEN = –10 V, RG = 6.0 Ω)td(off) —16 —

Fall T ime

GEN ,G)

tf— 8.0 —

Gate Charge (See Figure 5) (VDS = 16 V, VGS = 10 V,

ID = 200 mA) QT— 2700 — pC

SOURCE–DRAIN DIODE CHARACTERISTICS

Continuous Current IS— — 0.3 A

Pulsed Current ISM — — 0.75

Forward Voltage(2) VSD —1.5 — V

(1) Pulse Test: Pulse Width ≤300 µs, Duty Cycle ≤ 2%.

(2) Switching characteristics are independent of operating junction temperature.

TYPICAL CHARACTERISTICS

Figure 1. On Resistance versus Gate–Source Voltage

0VGS, GATE–SOURCE VOLTAGE (VOLTS)

ID = 200 mA8

012345678910

DS(on), ON RESISTANCE (OHMS)

Figure 2. On Resistance versus Temperature

4.0

–40 TEMPERATURE (

VGS = 10 V

ID = 200 mA

3.5

3.0

2.5

2.0

0–20 0 20 40 60 80 100 120 140 160

rDS(on), ON RESISTANCE (OHMS)

1.5

1.0

0.5

VGS = 4.5 V

ID = 50 mA

MMBF2202PT1

Motorola Small–Signal Transistors, FETs and Diodes Device Data

Figure 3. On Resistance versus Drain Current

0ID, DRAIN CURRENT (AMPS)

VGS = 10 V

00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8

rDS(on), ON RESISTANCE (OHMS)

VGS = 4.5 V

Figure 4. Transfer Characteristics

1.0

0VGS, GATE–SOURCE VOLTAGE (VOLTS)

0.9

0.8

0.7

0.6

00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

ID, DRAIN CURRENT (AMPS)

0.5

0.4

0.3

Figure 5. Source–Drain Forward Voltage

VSD, SOURCE–DRAIN FORWARD VOLTAGE (VOLTS)

0.1

0.01

0.001 0 0.5 1.0 1.5 2.0 2.5

IS, SOURCE CURRENT (AMPS)

Figure 6. On Region Characteristics

0.8

0VDS, DRAIN–SOURCE VOLTAGE (VOLTS)

VGS = 5 V

0.7

0.6

0.5

0.4

012345678910

D(on), DRAIN CURRENT (AMPS)

0.3

0.2

0.1

VGS = 4.5 V

Figure 7. Capacitance Variation

0VDS, DRAIN–SOURCE VOLTAGE (VOLTS)

02 4 6 8 10 12 14 16 18 20

C, CAPACITANCE (pF)

0.2

0.1

5.5 6.0

–55

150

VGS = 3.5 V

VGS = 4 V

VGS = 3 V

Ciss

Coss

Crss

VGS = 0 V

f = 1 MHz

MMBF2202PT1

4Motorola Small–Signal Transistors, FETs and Diodes Device Data

INFORMATION FOR USING THE SC–70/SOT–323 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total

design. The footprint for the semiconductor packages must

be the correct size to insure proper solder connection

interface between the board and the package. With the

correct pad geometry, the packages will self align when

subjected to a solder reflow process.

inches

0.035

0.9

0.075

0.7

1.9

0.028

0.65

0.025

0.65

0.025

SC–70/SOT–323

SC–70/SOT–323 POWER DISSIPATION

The power dissipation of the SC–70/SOT–323 is a function

of the drain pad size. This can vary from the minimum pad

size for soldering to a pad size given for maximum power

dissipation. Power dissipation for a surface mount device is

determined by TJ(max), the maximum rated junction tempera-

ture of the die, RθJA, the thermal resistance from the device

junction to ambient, and the operating temperature, TA.

Using the values provided on the data sheet for the

SC–70/SOT–323 package, PD can be calculated as follows:

PD = TJ(max) – TA

RθJA

The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values into

the equation for an ambient temperature T A of 25°C, one can

calculate the power dissipation of the device which in this

case is 150 milliwatts.

PD = 150°C – 25°C

833°C/W = 150 milliwatts

The 833°C/W for the SC–70/SOT–323 package assumes

the use of the recommended footprint on a glass epoxy

printed circuit board to achieve a power dissipation of 150

milliwatts. There are other alternatives to achieving higher

power dissipation from the SC–70/SOT–323 package.

Another alternative would be to use a ceramic substrate or

an aluminum core board such as Thermal Clad. Using a

board material such as Thermal Clad, an aluminum core

board, the power dissipation can be doubled using the same

footprint.

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated

temperature of the device. When the entire device is heated

to a high temperature, failure to complete soldering within a

short time could result in device failure. Therefore, the

following items should always be observed in order to

minimize the thermal stress to which the devices are

subjected.

•Always preheat the device.

•The delta temperature between the preheat and

soldering should be 100°C or less.*

•When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum

temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering method,

the difference should be a maximum of 10°C.

•The soldering temperature and time should not exceed

260°C for more than 10 seconds.

•When shifting from preheating to soldering, the

maximum temperature gradient should be 5°C or less.

•After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.

Gradual cooling should be used as the use of forced

cooling will increase the temperature gradient and result

in latent failure due to mechanical stress.

•Mechanical stress or shock should not be applied during

cooling

* Soldering a device without preheating can cause excessive

thermal shock and stress which can result in damage to the

device.

MMBF2202PT1

Motorola Small–Signal Transistors, FETs and Diodes Device Data

PACKAGE DIMENSIONS

CASE 419–02

SC–70/SOT–323

ISSUE J

CRN

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.071 0.087 1.80 2.20

B0.045 0.053 1.15 1.35

C0.035 0.049 0.90 1.25

D0.012 0.016 0.30 0.40

G0.047 0.055 1.20 1.40

H0.000 0.004 0.00 0.10

J0.004 0.010 0.10 0.25

K0.017 REF 0.425 REF

L0.026 BSC 0.650 BSC

N0.028 REF 0.700 REF

R0.031 0.039 0.80 1.00

S0.079 0.087 2.00 2.20

V0.012 0.016 0.30 0.40

0.05 (0.002) STYLE 8:

PIN 1. GATE

2. SOURCE

3. DRAIN

MMBF2202PT1

6Motorola Small–Signal Transistors, FETs and Diodes Device Data

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and

specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola

data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”

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Mfax is a trademark of Motorola, Inc.

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MMBF2202PT1/D

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