HSDL-3602-007 - Agilent / Hewlett-Packard

Agilent HSDL-3602

IrDA® Data 1.4 Compliant

4 Mb/s 3V Infrared Transceiver

Data Sheet

Features

• Fully compliant to IrDA

1.1 specifications:

— 9.6 kb/s to 4 Mb/s operation

— Excellent nose-to-nose

operation

• Typical link distance > 1.5 m

• IEC825-Class 1 eye safe

• Wide operating voltage range

— 2.7 V to 3.6 V

• Small module size

— 4.0 x 12.2 x 4.9 mm (H x W x D)

• Complete shutdown

— TXD, RXD, PIN diode

• Low shutdown current

— 10 nA typical

• Adjustable optical power

management

— Adjustable LED drive-current

to maintain link integrity

• Single Rx data output

— FIR select pin switch to FIR

• Integrated EMI shield

— Excellent noise immunity

• Edge detection input

— Prevents the LED from long

turn-on time

• Interface to various super I/O and

controller devices

• Designed to accommodate light

loss with cosmetic window

• Only 2 external components are

required

Description

The HSDL-3602 is a low profile

infrared transceiver module that

provides interface between logic

and IR signals for through-air,

serial, half-duplex IR data link.

The module is compliant to IrDA

Data Physical Layer Specifica-

tions 1.4 and IEC825-Class 1 Eye

Safety Standard.

Applications

• Digital imaging

— Digital still cameras

— Photo-imaging printers

• Data communication

— Notebook computers

— Desktop PCs

— Win CE handheld products

— Personal Digital Assistants

(PDAs)

— Printers

— Fax machines, photocopiers

— Screen projectors

— Auto PCs

— Dongles

— Set-top box

• Telecommunication products

— Cellular phones

— Pagers

• Small industrial and medical

instrumentation

— General data collection

devices

— Patient and pharmaceutical

data collection devices

• IR LANs

TXD (9)

MD0 (4)

MD1 (5)

RXD (8)

FIR_SEL (3)

GND (7)

AGND (2)

VCC (1)

VCC

HSDL-3602

CX1

CX2

LEDA (10)

HSDL-3602 Functional block diagram

I/O Pins Configuration Table

Pin Description Symbol

1 Supply Voltage VCC

2 Analog Ground AGND

3 FIR Select FIR_SEL

4 Mode 0 MD0

5 Mode 1 MD1

6 No Connection NC

7 Ground GND

8 Receiver Data Output RXD

9 Transmitter Data Output TXD

10 LED Anode LEDA

The HSDL-3602 contains a high-

speed and high-efficiency 870 nm

LED, a silicon PIN diode, and

an integrated circuit. The IC

contains an LED driver and a

receiver providing a single

output (RXD) for all data rates

supported.

The HSDL-3602 can be com-

pletely shut down to achieve very

low power consumption. In the

shut down mode, the PIN diode is

inactive, thus producing very

little photo-current even under

very bright ambient light. The

HSDL-3602 also incorporates the

capability for adjustable optical

power. With two programming

pins; MODE 0 and MODE 1, the

optical power output can be ad-

justed lower when the nominal

desired link distance is one-third

or two-third of the full IrDA link.

The HSDL-3602 comes with a

front view packaging option

(HSDL-3602-007/-037) and a top

view packaging option (HSDL-

3602-008/-038). It has an inte-

grated shield that helps to ensure

low EMI emission and high immu-

nity to EMI field, thus enhancing

reliable performance.

Application Support Information

The Application Engineering

group in Agilent Technologies is

available to assist you with the

Technical understanding associ-

ated with HSDL-3602 infrared

transceiver module. You can

contact them through your local

Agilent sales representatives for

additional details.

87654321910

Back view (HSDL-3602-007/-037)

87654321910

Bottom view (HSDL-3602-008/-038)

Ordering Information

Package Option Package Part Number Standard Package Increment

Front View HSDL-3602-007 400

Front View HSDL-3602-037 1800

Top View HSDL-3602-008 400

Top View HSDL-3602-038 1800

Transceiver Control Truth Table

Mode 0 Mode 1 FIR_SEL RX Function TX Function

1 0 X Shutdown Shutdown

0 0 0 SIR Full Distance Power

0 1 0 SIR 2/3 Distance Power

1 1 0 SIR 1/3 Distance Power

0 0 1 MIR/FIR Full Distance Power

0 1 1 MIR/FIR 2/3 Distance Power

1 1 1 MIR/FIR 1/3 Distance Power

X = Don't Care

Recommended Application Circuit Components

Component Recommended Value

R1 2.2 Ω ± 5%, 0.5 Watt, for 2.7 ≤ VCC ≤ 3.3 V operation

2.7 Ω ± 5%, 0.5 Watt, for 3.0 ≤ VCC ≤ 3.6 V operation

CX1[5] 0.47 µF ± 20%, X7R Ceramic

CX2[6] 6.8 µF ± 20%, Tantalum

Notes:

5. CX1 must be placed within 0.7 cm of the HSDL-3602 to obtain optimum noise immunity.

6. In "HSDL-3602 Functional Block Diagram" on page 1 it is assumed that Vled and VCC share the

same supply voltage and filter capacitors. In case the 2 pins are powered by different supplies

CX2 is applicable for Vled and CX1 for VCC. In environments with noisy power supplies,

including CX2 on the VCC line can enhance supply rejection performance.

Transceiver I/O Truth Table

Inputs Outputs

Transceiver Mode FIR_SEL TXD EI LED RXD

Active X 1 X On Not Valid

Active 0 0 High[1] Off Low[3]

Active 1 0 High[2] Off Low[3]

Active X 0 Low Off High

Shutdown X X[4] Low Not Valid Not Valid

X = Don't Care EI = In-Band Infrared Intensity at detector

Notes:

1. In-Band EI ≤ 115.2 kb/s and FIR_SEL = 0.

2. In-Band EI ≥ 0.576 Mb/s and FIR_SEL = 1.

3. Logic Low is a pulsed response. The condition is maintained for duration dependent on the

pattern and strength of the incident intensity.

4. To maintain low shutdown current, TXD needs to be driven high or low and not left floating.

Caution: The BiCMOS inherent to the design of this component increases the component’s suscepti-

bility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be

taken in handling and assembly of this component to prevent damage and/or degradation, which

may be induced by ESD.

Marking Information

The HSDL-3602-007/-037 is marked ‘3602YYWW’ on the shield where ‘YY’ indicates the unit’s manufactur-

ing year, and ‘WW’ refers to the work week in which the unit is tested.

Absolute Maximum Ratings[7]

Parameter Symbol Minimum Maximum Unit Conditions

Storage Temperature TS–40 +100 ˚C

Operating Temperature TA–20 +70 ˚C

DC LED Current ILED (DC) 165 mA

Peak LED Current ILED (PK) 650 mA ≤ 90 µs pulse width,

≤ 25% duty cycle

750 mA ≤ 2 µs pulse width,

≤ 10% duty cycle

LED Anode Voltage VLEDA –0.5 7 V

Supply Voltage VCC 07 V

Transmitter Data Input Current ITXD (DC) –12 12 mA

Receiver Data Output Voltage VO–0.5 VCC + 0.5 V |IO(RXD)| = 20 µA

Note:

7. For implementations where case to ambient thermal resistance ≤ 50˚C/W.

ILED (A)

0.7

LEDA VOLTAGE (V)

0.3

1.7 2.1

0.1

1.3 2.3

0.5

1.5 1.9

0.6

0.4

0.2

ILED vs LEDA

LOP (mW/sr)

450

ILED (A)

200

0.3 0.6

0 0.7

350

0.1 0.4

400

300

100

250

150

0.2 0.5

LIGHT OUTPUT POWER (LOP) vs ILED

Recommended Operating Conditions

Parameter Symbol Minimum Maximum Unit Conditions

Operating Temperature TA–20 +70 ˚C

Supply Voltage VCC 2.7 3.6 V

Logic High Input Voltage VIH 2 VCC/3 VCC V

for TXD, MD0, MD1, and

FIR_SEL

Logic Low Transmitter VIL 0V

CC/3 V

Input Voltage

LED (Logic High) Current ILEDA 400 650 mA

Pulse Amplitude

Receiver Signal Rate 0.0024 4 Mb/s

Electrical & Optical Specifications

Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions

can be anywhere in their operating range. All typical values are at 25˚C and 3.3 V unless otherwise noted.

Parameter Symbol Min. Typ. Max. Units Conditions

Transceiver

Supply Current Shutdown ICC1 10 200 nA VSD ≥ VCC – 0.5

Idle ICC2 2.5 5 mA VI(TXD) ≤ VIL, EI = 0

Digital Input Logic IL/IH–1 1 µA0 ≤ VI ≤ VCC

Current Low/High

Transmitter

Transmitter Logic High EIH100 250 400 mW/sr VIH = 3.0 V

Radiant Intensity ILEDA = 400 mA

Intensity θ1/2 ≤ 15˚

Peak λp875 nm

Wavelength

Spectral Line ∆λ1/2 35 nm

Half Width

Viewing Angle 2θ1/2 30 60

Optical tpw (EI) 1.5 1.6 1.8 µs tpw(TXD) = 1.6 µs at 115.2 kb/s

Pulse Width

148 217 260 ns tpw(TXD) = 217 ns at 1.15 Mb/s

115 125 135 ns tpw(TXD) = 125 ns at 4.0 Mb/s

Rise and tr (EI), 40 ns tpw(TXD) = 125 ns at 4.0 Mb/s

Fall Times tf (EI) tr/f(TXD) = 10 ns

Maximum tpw (max) 20 50 µs TXD pin stuck high

Optical

Pulse Width

LED Anode On State Voltage VON(LEDA) 2.4 V ILEDA = 400 mA, VI(TXD) ≥ VIH

LED Anode Off State Leakage ILK(LEDA) 1 100 nA VLEDA = VCC = 3.6 V,

Current VI(TXD) ≤ VIL

Electrical & Optical Specifications

Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions

can be anywhere in their operating range. All typical values are at 25˚C and 3.3 V unless otherwise noted.

Parameter Symbol Min. Typ. Max. Units Conditions

Receiver

Receiver Data Logic Low VOL 0 — 0.4 V IOL = 1.0 mA,

Output Voltage EI ≥ 3.6 µW/cm2,

θ1/2 ≤ 15˚

Logic High VOH VCC – 0.2 — VCC VI

OH = –20 µA,

EI ≤ 0.3 µW/cm2,

θ1/2 ≤ 15˚

Viewing 2θ1/2 30

Angle

Logic High Receiver Input EIH0.0036 500 mW/cm2For in-band signals

Irradiance ≤ 115.2 kb/s[8]

0.0090 500 mW/cm20.576 Mb/s ≤ in-band

signals ≤ 4 Mb/s[8]

Logic Low Receiver Input EIL0.3 µW/cm2For in-band signals[8]

Irradiance

Receiver Peak Sensitivity λP880 nm

Wavelength

Receiver SIR Pulse Width tpw (SIR) 1 4.0 µsθ1/2 ≤ 15˚[10], CL = 10 pF

Receiver MIR Pulse Width tpw (MIR) 100 500 ns θ1/2 ≤ 15˚[11], CL = 10 pF

Receiver FIR Pulse Width tpw (FIR) 85 165 ns θ1/2 ≤ 15˚[12], CL = 10 pF,

VCC = 3 to 3.6 V

190 ns θ1/2 ≤ 15˚[12], CL = 10 pF,

VCC = 2.7 V

Receiver ASK Pulse Width tpw (ASK) 1 µs 500 kHz/50% duty cycle

carrier ASK[13]

Receiver Latency Time for FIR tL (FIR) 40 50 µs

Receiver Latency Time for SIR tL (SIR) 20 50 µs

Receiver Rise/Fall Times tr/f (RXD) 25 ns

Receiver Wake Up Time tW100 µs[14]

Notes:

8. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 ≤ λp ≤ 900 nm, and the pulse characteristics

are compliant with the IrDA Serial Infrared Physical Layer Link Specification.

9. Logic Low is a pulsed response. The condition is maintained for duration dependent on pattern and strength of the incident intensity.

10. For in-band signals ≤ 115.2 kb/s where 3.6 µW/cm2 ≤ EI ≤ 500 mW/cm2.

11. For in-band signals at 1.15 Mb/s where 9.0 µW/cm2 ≤ EI ≤ 500 mW/cm2.

12. For in-band signals of 125 ns pulse width, 4 Mb/s, 4 PPM at recommended 400 mA drive current.

13. Pulse width specified is the pulse width of the second 500 kHz carrier pulse received in a data bit. The first 500 kHz carrier pulse may exceed

2 µs in width, which will not affect correct demodulation of the data stream. An ASK or DASK system using the HSDL-3602 has been shown to

correctly receive all data bits for 9 µW/cm2 ≤ EI ≤ 500 mW/cm2 incoming signal strength. ASK or DASK should use the FIR channel enabled.

14. The wake up time is the time between the transition from a shutdown state to an active state, and the time when the receiver is active and

ready to receive infrared signals.

TXD "Stuck ON" Protection RXD Output Waveform

LED Optical Waveform Receiver Wake Up Time Definition

(when MD0 ≠ 1 and MD1 ≠ 0)

RX

LIGHT

RXD VALID DATA

LED OFF

90%

50%

10%

LED ON

90%

50%

10%

pw (MAX.)

TXD

LED

PIN 1

MOUNTING

CENTER

6.10

4.18

4.00

12.20

3.84

R 1.77

R 2.00

4.05

4.95

10 CASTELLATION:

PITCH 1.1 ± 0.1

CUMULATIVE 9.90 ± 0.1

0.70

0.80 1.70

PIN 10

0.45

1.20 0.80

2.45

1.90

3.24

1.90

4.98

MID OF LAND

1.05

2.40

2.35

2.84

2.08

0.70 0.43 PIN 10PIN 1

MOUNTING CENTER

TOP VIEW

FRONT VIEW

LAND PATTERNBACK VIEW

SIDE VIEW

ALL DIMENSIONS IN MILLIMETERS (mm).

DIMENSION TOLERANCE IS 0.20 mm

UNLESS OTHERWISE SPECIFIED.

1.17

PIN

1PIN

HSDL-3602-007 and HSDL-3602-037 Package Outline with Dimension and Recommended PC Board Pad Layout

HSDL-3602-008 and HSDL-3602-038 Package Outline with Dimension and Recommended PC Board Pad Layout

3.85

0.47

0.36

0.83

0.42

0.94

0.31

0.84

0.53

0.31

0.28 1.77

2.15+0.05

-0.00

12.2+0.10

-0.00

4.16+0.05

-0.00

11.7+0.05

-0.00

2.5

11.7

0.85

0.3

2.08

1.46 2.57

3.843.24

2.08

R2.3

R2.1

0.1 0.1

4.65

R1.77

0.8 0.73

0.94 1.95

Tape and Reel Dimensions (HSDL-3602-007, -037)

12.50 ± 0.10

8.00 ± 0.10

4.00 ± 0.10

24.00 ± 0.30

1.75 ± 0.10

0.40 ± 0.10

4.25 ± 0.10

∅1.55 ± 0.05

11.50 ± 0.10

2.00 ± 0.10 B

5° (MAX.)



5° (MAX.)

5.20 ± 0.10







SECTION A-A

SECTION B-B

10°

3.8

∅1.5 ± 0.1 10



4 5 6

4.4



ALL DIMENSIONS IN MILLIMETERS (mm)

R 1.00

2.00 ± 0.50

LABEL

EMPTY PARTS

MOUNTED LEADER

EMPTY

(400 mm MIN.)

(40 mm MIN.)

DIRECTION OF PULLING

(40 mm MIN.)

CONFIGURATION OF TAPE

13.00 ± 0.50

SHAPE AND DIMENSIONS OF REELS

QUANTITY = 400 PIECES PER REEL (HSDL-3602-007)

1800 PIECES PER TAPE (HSDL-3602-037)

21.00 ± 0.80

Tape and Reel Dimensions (HSDL-3602-008, -038)

ALL DIMENSIONS IN MILLIMETERS (mm)

R 1.00

2.00 ± 0.50

LABEL

EMPTY PARTS

MOUNTED LEADER

EMPTY

(400 mm MIN.)

(40 mm MIN.)

DIRECTION OF PULLING

(40 mm MIN.)

CONFIGURATION OF TAPE

13.00 ± 0.50

SHAPE AND DIMENSIONS OF REELS

QUANTITY = 400 PIECES PER REEL (HSDL-3602-008)

1800 PIECES PER TAPE (HSDL-3602-038)

21.00 ± 0.80

Do P2 D1Po

5.4 ± 0.15

SYMBOL

SPEC

SYMBOL

SPEC

Ao

4.4 ± 0.10

Bo

12.50 ± 0.10

Ko

4.85 ± 0.10

Po

4.0 ±0.10

P1

8.0 ± 0.10

P2

2.0 ± 0.10

T

0.35 ± 0.10

E

1.75 ± 0.10

F

11.5 ± 0.10

Do

1.55 ± 0.10

D1

1.5 ± 0.10

W

24.0 ± 0.3

10Po

40.0 ± 0.20

5° (MAX.)



5° (MAX.)



SECTION A-A

NOTES:

1. I.D. sprocket hole pitch cumulative tolerance is ± 0.2 mm.

2. Corner camber shall be not more than 1 mm per 100 mm through a length of 250 mm.

3. Ao and Bo measured on a place 0.3 mm above the bottom of the pocket.

4. Ko measured from a place on the inside bottom of the pocket to top surface of carrier.

5. Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole.

SECTION B-B

8 ± 0.10

Moisture Proof Packaging

All HSDL-3602 options are shipped in moisture proof package. Once

opened, moisture absorption begins.

Baking Conditions

If the parts are not stored in dry

conditions, they must be baked

before reflow to prevent damage

to the parts.

Package Temp. Time

In reels 60°C≥ 48 hours

In bulk 100°C≥ 4 hours

125°C≥ 2 hours

150°C≥ 1 hour

Baking should be done only once.

Recommended Storage Conditions

Storage 10°C to 30°C

Temperature

Relative below 60% RH

Humidity

Time from Unsealing to Soldering

After removal from the bag, the

parts should be soldered within 3

days if stored at the recom-

mended storage conditions. If

times longer than 72 hours are

needed, the parts must be stored

in a dry box.

UNITS IN A SEALED

MOISTURE-PROOF

PACKAGE

PACKAGE IS

OPENED (UNSEALED)

ENVIRONMENT

LESS THAN 30°C,

AND LESS THAN

60% RH

PACKAGE IS

OPENED LESS

THAN 72 HOURS

PERFORM RECOMMENDED

BAKING CONDITIONS

NO BAKING

IS NECESSARY YES

YES

Reflow Profile

The reflow profile is a straight-

line representation of a nominal

temperature profile for a convec-

tive reflow solder process. The

temperature profile is divided

into four process zones, each

with different ∆T/∆time tempera-

ture change rates. The ∆T/∆time

rates are detailed in the following

table. The temperatures are mea-

sured at the component to

printed circuit board connections.

In process zone P1, the PC

board and HSDL-3602

castellation I/O pins are heated

to a temperature of 125°C to

activate the flux in the solder

paste. The temperature ramp up

rate, R1, is limited to 4°C per

second to allow for even heating

of both the PC board and

HSDL-3602 castellation I/O pins.

Process zone P2 should be of

sufficient time duration (> 60

seconds) to dry the solder paste.

The temperature is raised to a

level just below the liquidus point

of the solder, usually 170°C

(338°F).

Process zone P3 is the solder

reflow zone. In zone P3, the

temperature is quickly raised

above the liquidus point of solder

to 230°C (446°F) for optimum

results. The dwell time above the

liquidus point of solder should be

between 15 and 90 seconds. It

usually takes about 15 seconds to

assure proper coalescing of the

solder balls into liquid solder and

the formation of good solder

connections. Beyond a dwell time

t-TIME (SECONDS)

T – TEMPERATURE – (°C)

200

170

125

100

50 150100 200 250 300

150

183

230

P1

HEAT

P2

SOLDER PASTE DRY P3

SOLDER

REFLOW

P4

COOL

DOWN

R3 R4

90 sec. 

MAX.

ABOVE

183°C

MAX. 245°C

Maximum

Process Zone Symbol ∆T∆T/∆time

Heat Up P1, R1 25˚C to 125˚C 4˚C/s

Solder Paste Dry P2, R2 125˚C to 170˚C 0.5˚C/s

Solder Reflow P3, R3 170˚C to 230˚C 4˚C/s

(245˚C at 10 seconds max.)

P3, R4 230˚C to 170˚C –4˚C/s

Cool Down P4, R5 170˚C to 25˚C –3˚C/s

of 90 seconds, the intermetallic

growth within the solder connec-

tions becomes excessive,

resulting in the formation of weak

and unreliable connections. The

temperature is then rapidly

reduced to a point below the

solidus temperature of the solder,

usually 170°C (338°F), to allow

the solder within the connections

to freeze solid.

Process zone P4 is the cool

down after solder freeze. The

cool down rate, R5, from the

liquidus point of the solder to

25°C (77°F) should not exceed

-3°C per second maximum. This

limitation is necessary to allow

the PC board and HSDL-3602

castellation I/O pins to change

dimensions evenly, putting

minimal stresses on the

HSDL-3602 transceiver.

Dim. mm inches

a 2.40 0.095

b 0.70 0.028

c (pitch) 1.10 0.043

d 2.35 0.093

e 2.80 0.110

f 3.13 0.123

g 4.31 0.170

Appendix A: HSDL-3602-007/-037 SMT Assembly Application Note

1.0. Solder Pad, Mask, and Metal Solder Stencil Aperture

METAL STENCIL

FOR SOLDER PASTE

PRINTING

LAND PATTERN

PCBA

STENCIL

APERTURE

SOLDER

MASK

Figure 1. Stencil and PCBA.

1.1. Recommended Land Pattern for HSDL-3602-007/-037

SHIELD SOLDER PAD

theta

10x PAD

Rx LENSTx LENS

FIDUCIAL

cFIDUCIAL

Figure 2. Top view of land pattern.

• Adjacent land keep-out is the

maximum space occupied by

the unit relative to the land

pattern. There should be no

other SMD components within

this area.

•“h” is the minimum solder

resist strip width required to

1.2. Adjacent Land Keep-out and

Solder Mask Areas

Dim. mm inches

h min. 0.2 min. 0.008

j 13.4 0.528

k 4.7 0.185

l 3.2 0.126

Rx LENSTx LENS

SOLDER

MASK

LAND k

avoid solder bridging adjacent

pads.

• It is recommended that

2 fiducial cross be placed at

mid-length of the pads for unit

alignment.

Note : Wet/Liquid Photo-Imagineable solder resist/mask is recommended.

Figure 3. HSDL-3602-007/-037 PCBA-Adjacent land keep-out and solder mask.

Figure 4. Solder paste stencil aperture.

See Figure 4

t, nominal stencil thickness l, length of aperture

mm inches mm inches

0.152 0.006 2.8 ± 0.05 0.110 ± 0.002

0.127 0.005 3.4 ± 0.05 0.134 ± 0.002

w, the width of aperture is fixed at 0.70 mm (0.028 inches)

Aperture opening for shield pad is 2.8 mm x 2.35 mm as per land dimension.

2.0. Recommended solder paste/

cream volume for castellation joints

Based on calculation and experi-

ment, the printed solder paste

volume required per castellation

pad is 0.30 cubic mm (based on

either no-clean or aqueous solder

cream types with typically 60 to

65% solid content by volume).

2.1. Recommended Metal Solder

Stencil Aperture

It is recommended that only

0.152 mm (0.006 inches) or

0.127 mm (0.005 inches) thick

stencil be used for solder paste

printing. This is to ensure ad-

equate printed solder paste vol-

ume and no shorting. The

following combination of metal

stencil aperture and metal stencil

thickness should be used:

3.0. Pick and Place Misalignment

Tolerance and Product Self-Align-

ment after Solder Reflow

If the printed solder paste volume

is adequate, the unit will self-

align in the X-direction after sol-

der reflow. Units should be

properly reflowed in IR Hot Air

convection oven using the recom-

mended reflow profile. The di-

rection of board travel does not

matter.

APERTURE AS PER

LAND

SOLDER

PASTE

t (STENCIL THICKNESS)

Allowable Misalignment Tolerance

X-direction ≤ 0.2 mm (0.008 inches)

Theta-direction ± 2 degrees

3.1. Tolerance for X-axis Alignment of Castellation

Misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of

the castellation during placement of the unit. The castellations will completely self-align to the pads during

solder reflow as seen in the pictures below.

3.2. Tolerance for Rotational (Theta) Misalignment

Units when mounted should not be rotated more than ± 2 degrees with reference to center X-Y as specified

in Figure 2. Pictures 3 and 4 show units before and after reflow. Units with a Theta misalignment of more

than 2 degrees do not completely self-align after reflow. Units with ± 2 degree rotational or Theta

misalignment self-aligned completely after solder reflow.

Picture 1. Castellation misaligned to land pads in X-axis before

reflow. Picture 2. Castellation self-align to land pads after reflow.

Picture 3. Unit is rotated before reflow. Picture 4. Unit self-aligns after reflow.

4.0. Solder Volume Evaluation and Calculation

Geometery of an HSDL-3602-007/-037 solder fillet.

0.8 1.2 0.70

0.45 0.20

0.7

0.4

3.3. Y-axis Misalignment of Castellation

In the Y-direction, the unit does not self-align after solder reflow. It is

recommended that the unit be placed in line with the fiducial mark

(mid-length of land pad). This will enable sufficient land length

(minimum of 1/2 land length) to form a good joint. See Figure 5.

3.4. Example of Good HSDL-3602-007/

-037 Castellation Solder Joints

This joint is formed when the

printed solder paste volume is

adequate, i.e., 0.30 cubic mm and

reflowed properly. It should be

reflowed in IR Hot-air convection

reflow oven. Direction of board

travel does not matter.

MINIMUM 1/2 THE LENGTH

OF THE LAND PAD

LENS

EDGE

FIDUCIAL

Figure 5. Section of a castellation in Y-axis.

Picture 5. Good solder joint.

Dim. mm inches

a 1.95 0.077

b 0.60 0.024

c (pitch) 1.10 0.043

d 1.60 0.063

e 5.70 0.224

f 3.80 0.123

g 2.40 0.170

Appendix B: HSDL-3602-008/-038 SMT Assembly Application Note

1.0. Solder Pad, Mask, and Metal Solder Stencil Aperture

METAL STENCIL

FOR SOLDER PASTE

PRINTING

LAND PATTERN

PCBA

STENCIL

APERTURE

SOLDER

MASK

Figure 1. Stencil and PCBA.

1.1. Recommended Land Pattern for HSDL-3602-008/-038

SHIELD SOLDER PAD

btheta

10x PAD

Tx LENSRx LENS

FIDUCIAL

cFIDUCIAL

2.0 Y-axis Misalignment of Castellation

In the Y-direction, the unit does not self-align after solder reflow. It is

recommended that the unit be placed in line with the fiducial mark

(mid-length of land pad). This will enable sufficient land length

(minimum of 1/2 land length) to form a good joint. See Figure 2.

Figure 2. Section of a castellation in Y-axis.

1/2 THE LENGTH OF THE

CASTELLATION PAD

FIDUCIAL

Appendix C: General Application

Guide for the HSDL-3602 Infrared

IrDA® Compliant 4 Mb/s Transceiver

Description

The HSDL-3602 wide voltage

operating range infrared trans-

ceiver is a low-cost and small

form factor that is designed to

address the mobile computing

market such as notebooks, print-

ers and LAN access as well as

small embedded mobile products

such as digital cameras, cellular

phones, and PDAs. It is fully com-

pliant to IrDA 1.1 specification

up to 4 Mb/s, and supports HP-

SIR, Sharp ASK, and TV Remote

modes. The design of the HSDL-

3602 also includes the following

unique features:

• Low passive component count.

• Adjustable Optical Power Man-

agement (full, 2/3, 1/3 power).

• Shutdown mode for low power

consumption requirement.

• Single-receive output for all

data rates.

Adjustable Optical Power Management

The HSDL-3602 transmitter of-

fers user-adjustable optical power

levels. The use of two logic-level

mode-select input pins, MODE 0

and MODE 1, offers shutdown

mode as well as three transmit

power levels as shown in the fol-

lowing Table. The power levels

are setup to correspond nomi-

nally to maximum, two-third, and

one-third of the transmission

distance. This unique feature

allows lower optical power to be

transmitted at shorter link dis-

tances to reduce power consump-

tion.

MODE MODE 1 Transmitter

1 0 Shutdown

0 0 Full Power

0 1 2/3 Power

1 1 1/3 Power

Selection of Resistor R1

Resistor R1 should be selected to

provide the appropriate peak

pulse LED current over different

ranges of Vcc. The recommended

R1 for the voltage range of 2.7 V

to 3.3 V is 2.2 Ω while for 3.0 V

to 3.6 V is 2.7 Ω. The HSDL-3602

typically provides 250 mW/sr of

intensity at the recommended

minimum peak pulse LED current

of 400 mA.

Interface to Recommended I/O chips

The HSDL-3602’s TXD data input

is buffered to allow for CMOS

drive levels. No peaking circuit or

capacitor is required.

Data rate from 9.6 kb/s up to 4

Mb/s is available at the RXD pin.

The FIR_SEL pin selects the data

rate that is receivable through

RXD. Data rates up to 115.2 kb/s

can be received if FIR_SEL is set

to logic low. Data rates up to 4

Mb/s can be received if FIR_SEL

is set to logic high. Software

driver is necessary to program

the FIR_SEL to low or high at a

given data rate.

4 Mb/s IR link distance of greater

than 1.5 meters have been

demonstrated using typical

HSDL-3602 units with National

Semiconductor’s PC87109 3 V

Endec and Super I/Os, and the

SMC Super I/O chips.

There are 2 basic means to

adjust the optical power of the

HSDL-3602:

Dynamic: This implementation

enables the transceiver pair to

adjust their transmitter power

according to the link distance.

However, this requires the IrDA

protocol stack (mainly the IrLAP

layer) to be modified. Please con-

tact Agilent Application group for

further details.

Static: Pre-program the ROM

BIOS of the system (e.g. note-

book PC, digital camera, cell

phones, or PDA) to allow the end

user to select the desired optical

power during the system setup

stage.

IRTX IRRX1 IRSL0

PC97/87338VJG 63 65 66

PC87308VUL 81 80 79

PC87108AVHG 39 38 37

PC87109VBE 15 16 14

Please refer to the National Semiconductor data sheets and application notes for updated

information.

(A) National Semiconductor Super

I/O and Infrared Controller

For National Semiconductor

Super I/O and Infrared Controller

chips, IR link can be realized with

the following connections:

• Connect IRTX of the National

Super I/O or IR Controller to

TXD (pin 9) of the HSDL-3602.

• Connect IRRX1 of the National

Super I/O or IR Controller to

RXD (pin 8) of the HSDL-3602.

• Connect IRSL0 of the National

Super I/O or IR Controller to

FIR_SEL (pin 3) of the HSDL-

3602.

Please refer to the table below for

the IR pin assignments for the

National Super I/O and IR Con-

trollers that support IrDA 1.1 up

to 4 Mb/s:

TXD (9)

MD0 (4)

MD1 (5)

RXD (8)

FIR_SEL (3)

GND (7)

AGND (2)

(1)

LEDA (10)

HSDL-3602

CX1

CX2

NATIONAL

SEMICONDUCTOR

SUPER I/O

OR

IR CONTROLLER

IRTX

IRRX1

IRSL0

* MODE GROUND FOR

FULL POWER OPERATION

(B) HSDL-3602 Interoperability with

National Semiconductor

PC97338VJG SIO Evaluation Report

Introduction

The objective of this report is to

demonstrate the interoperability

of the HSDL-3602 IR transceiver

IR module as wireless communi-

cation ports at the speed of 2.4

kb/s - 4 Mb/s with NS’s

PC97338VJG Super I/O under

typical operating conditions.

Test Procedures

(1) Two PC97338VJG evalua-

tion boards were connected

to the ISA Bus of two PCs

(Pentium 200 MHz) running

TXD (9)

MD0 (4)

MD1 (5)

RXD (8)

FIR_SEL (3)

GND (7)

AGND (2)

(1)

LEDA (10)

HSDL-3602

CX1

CX2

NATIONAL

SEMICONDUCTOR

PC97338VJG

SUPER I/O



IRTX (63)

IRRX1 (65)

IRSL0 (66)

* MODE GROUND FOR

FULL POWER OPERATION

A0 - A3

RD, WR, CS

D0 - D7

DRQ

DACK, TC

IRQ

SYSTEM BUS

HSDL 3602

14.314 MHz

CLOCK

Microsoft’s DOS operating

system. One system with an

HSDL-3602 IR transceiver

connected to the

PC97338VJG evaluation

board will act as the master

device. Another system with

an HSDL-3602 IR trans-

ceiver connected to the

PC97338VJG will act as the

slave device (i.e. Device

Under Test).

(2) The test software used in

this interoperability test is

provided by National Semi-

conductor. A file size of

1.7M byte from the master

device, with the

PC97338VJG performing

the framing, encoding is

transmitted to the slave

device. The slave device,

with the PC97338VJG per-

forming the decoding, and

CRC checksum, will receive

the file. The file is then

checked for error by com-

paring the received file with

the original file using the

DOS “fc” command.

(3) The link distance is mea-

sured by adjusting the dis-

tance between the master

and slave for errorless data

communications.

HSDL-3602 Interoperability with NS

PC97338 Report

(i) Test Conditions

VCC = 3.0 – 3.6 V

RLED = 2.7 Ω

Optical transmitter pulse

width = 125 ns

Mode set to full power

(ii) Test Result

The interoperability test results

show that HSDL-3602 IR trans-

ceiver can operate ≥ 1.5 meter

link distance from 3 V to 3.6 V

with NS’s PC97338 at any IrDA

1.1 data rate without error.

HSDL-3602 Interoperability with SMC's Super I/O or IR Controller

TXD (9)

MD0 MD1

RXD (8)

FIR_SEL (3)

GND (7)

AGND (2)

VCC (1)

LEDA (10)

VCC

HSDL-3602

CX1

CX2

4 5

STANDARD

MICROSYSTEM

CORPORATION

SUPER I/O

OR

IR CONTROLLER

IRRX

IRMODE

IRTX

MODE GROUND

FOR FULL POWER

OPERATION

Corporation (SMC) Super and Ultra

I/O Controllers

For SMC Super and Ultra I/O

Controller chips, IR link can be

realized with the following con-

nections:

• Connect IRTX of the SMC

Super or Ultra I/O Controller to

TXD (pin 9) of the HSDL-3602.

IRTX IRRX IRMODE

FDC37C669FR 89 88 23

FDC37N769 87 86 21

FDC37C957/8FR 204 203 145 or 190

• Connect IRRX of the SMC

Super or Ultra I/O Controller to

RXD (pin 8) of the HSDL-3602.

• Connect IRMODE of the Super

or Ultra I/O Controller to

FIR_SEL (pin 3) of the

HSDL-3602.

Please refer to the table below for

the IR pin assignments for the SMC

Super or Ultra I/O Controllers that

support IrDA 1.1 up to 4Mb/s:

HSDL-3602 Interoperability with

SMC 669/769 Report

(i) Test Conditions

Vcc = 3.0 – 3.6 V

RLED = 2.2 Ω

Optical transmitter

pulse width = 125 ns

Mode set to full power

(ii) Test Result

The interoperability test results

show that HSDL-3602 IR

transceiver can operate ≥ 1.5

meter link distance from 3 V to

3.6 V with SMC 669/769 at any

IrDA 1.1 data rate without error.

To ensure IrDA compliance,

some constraints on the height

and width of the window exist.

The minimum dimensions ensure

that the IrDA cone angles are met

without vignetting. The maximum

dimensions minimize the effects

of stray light. The minimum size

corresponds to a cone angle of

300 and the maximum size corre-

sponds to a cone angle of 60º.

In the figure below, X is the

width of the window, Y is the

height of the window and Z is the

distance from the HSDL-3602 to

the back of the window. The dis-

tance from the center of the LED

lens to the center of the photo-

diode lens, K, is 7.08mm. The

equations for computing the win-

dow dimensions are as follows:

X = K + 2*(Z+D)*tanA

Y = 2*(Z+D)*tanA

The above equations assume that

the thickness of the window is

negligible compared to the dis-

tance of the module from the back

of the window (Z). If they are com-

parable, Z' replaces Z in the above

equation. Z' is defined as

Z'=Z+t/n

where ‘t’ is the thickness of the

window and ‘n’ is the refractive

index of the window material.

The depth of the LED image in-

side the HSDL-3602, D, is 8mm.

‘A’ is the required half angle for

viewing. For IrDA compliance,

the minimum is 150 and the

maximum is 300. Assuming the

thickness of the window to be

negligible, the equations result in

the following tables and graphs:

Appendix D: Optical Port

Dimensions for HSDL-3602:

















IR TRANSPARENT

WINDOW OPAQUE

MATERIAL

OPAQUE

MATERIAL IR TRANSPARENT WINDOW



Section of a castellation in Y-axis.

Aperture Width Aperture height

(x, mm) (y, mm)

Module Depth, (z) mm max. min. max. min.

0 16.318 11.367 9.238 4.287

1 17.472 11.903 10.392 4.823

2 18.627 12.439 11.547 5.359

3 19.782 12.975 12.702 5.895

4 20.936 13.511 13.856 6.431

5 22.091 14.047 15.011 6.967

6 23.246 14.583 16.166 7.503

7 24.401 15.118 17.321 8.038

8 25.555 15.654 18.475 8.574

9 26.710 16.190 19.630 9.110

APERTURE WIDTH (X) – mm

MODULE

DEPTH (Z) – mm

X MAX.

X MIN.

135 8

APERTURE WIDTH (X) vs MODULE

DEPTH

APERTURE HEIGHT (Y) – mm

MODULE

DEPTH (Z) – mm

Y MAX.

Y MIN.

135 8

APERTURE HEIGHT (Y) vs MODULE

DEPTH

Window Material

Almost any plastic material will

work as a window material.

Polycarbonate is recommended.

The surface finish of the plastic

should be smooth, without any

texture. An IR filter dye may be

used in the window to make it

look black to the eye, but the

total optical loss of the window

should be 10 percent or less for

best optical performance. Light

loss should be measured at 875

nm.

Shape of the Window

From an optics standpoint, the

window should be flat. This

Flat Window

(First choice)

ensures that the window will not

alter either the radiation pattern

of the LED, or the receive pattern

of the photodiode.

If the window must be curved for

mechanical or industrial design

reasons, place the same curve on

the back side of the window that

has an identical radius as the

front side. While this will not

completely eliminate the lens

effect of the front curved surface,

it will significantly reduce the

effects. The amount of change in

the radiation pattern is dependent

upon the material chosen for the

window, the radius of the front

and back curves, and the distance

from the back surface to the

transceiver. Once these items are

known, a lens design can be

made which will eliminate the

effect of the front surface curve.

The following drawings show the

effects of a curved window on the

radiation pattern. In all cases,

the center thickness of the

window is 1.5 mm, the window is

made of polycarbonate plastic,

and the distance from the

transceiver to the back surface of

the window is 3 mm.

Curved Front and Back

(Second choice)

Curved Front, Flat Back

(Do not use)

www.agilent.com/semiconductors

For product information and a complete list of

distributors, please go to our web site.

For technical assistance call:

Americas/Canada: +1 (800) 235-0312 or

(408) 654-8675

Europe: +49 (0) 6441 92460

China: 10800 650 0017

Hong Kong: (+65) 6756 2394

India, Australia, New Zealand: (+65) 6755 1939

Japan: (+81 3) 3335-8152(Domestic/Interna-

tional), or 0120-61-1280(Domestic Only)

Korea: (+65) 6755 1989

Singapore, Malaysia, Vietnam, Thailand,

Philippines, Indonesia: (+65) 6755 2044

Taiwan: (+65) 6755 1843

Data subject to change.

Obsoletes 5988-8422EN

May 1, 2003

5988-9347EN