PAD/JPAD/SSTPAD Series
Vishay Siliconix
Document Number: 70339
S-04029—Rev. H, 04-Jun-01 www.vishay.com
4-1
Low-Leakage Pico-Amp Diodes
PAD1 JPAD5 SSTPAD5
PAD5 JPAD50 SSTPAD100
PAD50
PRODUCT SUMMARY
Part Number IR Max (pA)
PAD1 –1
PAD5/JPAD5/SSTPAD5 –5
PAD50/JPAD50 –50
SSTPAD100 –100
FEATURES BENEFITS APPLICATIONS
DUltralow Leakage: PAD1 <1 pA
DUltralow Capacitance: PAD1
<0.8 pF
DTwo-Leaded Package
DNegligible Circuit Leakage Contribution
DCircuit “Transparent” Except to Shunt
High-Frequency Spikes
DSimplicity of Operation
DOp Amp Input Protection
DMultiplexer Overvoltage Protection
DESCRIPTION
The PAD/JPAD/SSTPAD series of extremely low-leakage
diodes provides a superior alternative to conventional diode
technology when reverse current (leakage) must be
minimized. They feature leakage currents ranging from –1 pA
(PAD1) to –100 pA (SSTPAD100) to support a wide range of
applications. These devices are well suited for use in
applications such as input protection for operational
amplifiers.
The hermetically sealed TO-206AF (TO-72) package allows
full military processing per MIL-S-19500 (see Military
Information). The TO-226A (TO-92) plastic package provides
a low-cost option. The TO-236 (SOT-23) package provides
surface-mount capability. Both J and SST series are available
in tape-and-reel for automated assembly. (See Packaging
Information.)
TO-206AF (TO-72)
Modified
Top View
PAD1
PAD5
A
C
13
2
Top View
PAD50
TO-226AA (TO-92)
Modified
Top View
JPAD5
JPAD50
C
A
1
2
C
C
A
TO-236
(SOT-23)
2
3
1
Top View
SSTPAD5 (05)*
SSTPAD100 (01)
Case
TO-206AA (TO-18)
Modified
A and Case
C
1
2
*Marking Code for TO-236
PAD/JPAD/SSTPAD Series
Vishay Siliconix
www.vishay.com
4-2 Document Number: 70339
S-04029Rev. H, 04-Jun-01
ABSOLUTE MAXIMUM RATINGSa
Forward Current: (PAD 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(JPAD/SSTPAD ) 10 mA. . . . . . . . . . . . . . . . . . .
Total Device Dissipation: (PAD)b300 mW. . . . . . . . . . . . . . . . . . . . . . . . . .
(JPAD/SSTPAD)b350 mW. . . . . . . . . . . . . . . .
Operation Junction Temp: (PAD) 55 to 175_C. . . . . . . . . . . . . . . . . . . . . . .
(JPAD/SSTPAD )c55 to 150_C. . . . . . . . . . . .
Lead Temperature (1/16 from case for 10 sec.) 300_C. . . . . . . . . . . . . . . . . . .
Notes:
a. TA = 25_C unless otherwise noted.
b. Derate 2 mW/_C above 25_C.
c. Derate 2.8 mW/_C above 25_C.
SPECIFICATIONS SPECIFICATIONS (TA = 25_C UNLESS OTHERWISE NOTED)
Limits
Parameter Symbol Test Conditions Min TypaMax Unit
Static
PAD1 0.3 1
PAD5/JPAD5/SSTPAD5 15
Reverse Current IRVR = 20 V PAD50/JPAD50 550 pA
SSTPAD100 10 100
PAD1/PAD5 45 60
Reverse Breakdown Voltage BVRIR = 1 mASSTPAD5/100 30 55
All Others 35 55 V
Forward Voltage Drop VFIF = 1 mA 0.8 1.5
Dynamic
PAD1/PAD5 0.5 0.8
Reverse Capacitance CRVR = 5V, f = 1 MHz All Others 1.5 2 pF
Notes:
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
TYPICAL CHARACTERISTICS (TA = 25_C UNLESS OTHERWISE NOTED)
Reverse Current vs. Reverse Voltage
0
I R @ 125_C
IR @ 25_C
Reverse Current vs. Temperature
1000
100
10
1
0.1 612 18 24 30 55 35 125
100
10
0.01
1
0.1
15 5 25 45 65 85 105
VR (V) TA Temperature (_C)
VR = 20 V
PAD/JPAD/SSTPAD5
PAD1
PAD1
PAD/JPAD/SSTPAD5
PAD1/5
All Others
IR (pA)
IR (pA)