DataSheeT - enpirion(R) power solutions EN6310QI 1A PowerSoC Step-Down DC-DC Switching Converter with Integrated Inductor DESCRIPTION FEATURES The EN6310QI is an Intel(R) Enpirion(R) Power System on a Chip (PowerSoC) DC-DC converter. It integrates the inductor, MOSFET switches, small-signal circuits and compensation in an advanced 4mm x 5mm x 1.85mm 30-pin QFN package. The EN6310QI is specifically designed to meet the precise voltage and fast transient requirements of present and future high-performance, low-power processor, DSP, FPGA, memory boards and system level applications in distributed power architectures. The device's advanced circuit techniques, high switching frequency, and proprietary integrated inductor technology deliver high-quality, ultra compact, non-isolated DC-DC conversion. Integrated inductor, MOSFET and Controller Small 4mm x 5mm x 1.85mm QFN High Efficiency up to 96% Solution Footprint Less than 65mm2 1A Continuous Output Current VIN Range of 2.7V to 5.5V VOUT Range from 0.6V to 3.3V Programmable Soft Start and Power OK Flag Fast Transient Response and Recovery Time Low Noise and Low Output Ripple; 4mV Typical 2.2MHz Switching Frequency Under Voltage Lock-out (UVLO), Short Circuit, Over Current and Thermal Protection Intel Enpirion Power Solutions significantly help in system design and productivity by offering greatly simplified board design, layout and manufacturing requirements. In addition, a reduction in the number of components required for the complete power solution helps to enable an overall system cost saving. Altera FPGAs (MAX, ARRIA, CYCLONE, STRATIX) Low Power FPGA Applications All SERDES and IO Supplies Requiring Low Noise Applications Requiring High Efficiency All Enpirion products are RoHS compliant and leadfree manufacturing environment compatible. Enterprise Grade Solid State Drive (SSD) Noise Sensitive Wireless and RF Application APPLICATIONS Efficiency vs. Output Current EN6310QI CIN2 4.7F RAVIN CIN1 100pF 20 ON OFF VOUT COUT 47F 0805 ENABLE AVIN CAVIN 0.47F RA CA RCA VFB SS CSS AGND 90 85 80 75 70 VOUT = 2.5V 65 PGND PGND 10nF 95 VOUT PVIN EFFICIENCY (%) VIN 100 CONDITIONS VIN = 3.3V VOUT = 1.0V 60 RB 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 OUTPUT CURRENT (A) Figure 1: Simplified Applications Circuit Figure 2: Efficiency at VIN = 5V Page 1 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI ORDERING INFORMATION Part Number Package Markings TJ Rating Package Description EN6310QI N6310QI -40C to +125C 30-pin (4mm x 5mm x 1.85mm) QFN EVB-EN6310QI N6310QI QFN Evaluation Board Packing and Marking Information: https://www.altera.com/support/quality-and-reliability/packing.html NC(SW) NC(SW) NC(SW) NC(SW) NC(SW) NC(SW) NC(SW) NC(SW) PVIN PVIN PIN FUNCTIONS 30 29 28 27 26 25 24 23 22 1 21 PGND 20 PGND 19 AVIN 18 ENABLE 17 POK 16 CSS Keep out NC(SW) 2 PGND 3 PGND 4 VOUT 5 VOUT 6 31 PGND Bottom Pad Keep out Keep out 13 14 15 NC VOUT 12 AGND VOUT 11 VFB VOUT 10 VOUT 9 VOUT 8 VOUT 7 Figure 3: Pin Diagram (Top View) NOTE A: NC pins are not to be electrically connected to each other or to any external signal, ground or voltage. However, they must be soldered to the PCB. Failure to follow this guideline may result in part malfunction or damage. NOTE B: White `dot' on top left is pin 1 indicator on top of the device package. NOTE C: Keep-Out are No Connect pads that should not to be electrically connected to each other or to any external signal, ground or voltage. They do not need to be soldered to the PCB. Page 2 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI PIN DESCRIPTIONS PIN NAME TYPE FUNCTION - No Connect. These pins are internally connected to the common switching node of the internal MOSFETs. They must be soldered to PCB but not be electrically connected to any external signal, ground, or voltage. Failure to follow this guideline may result in device damage. 3, 4, 20, PGND 21 Ground Input/Output power ground. Connect to the ground electrode of the input and output filter capacitors. See VOUT and PVIN pin descriptions for more details. 5-12 Power Regulated converter output. Connect to the load and place output filter capacitor(s) between these pins and PGND pins. Refer to the Layout Recommendation section. 1, 2, NC(SW) 24-30 VOUT 13 VFB Analog External feedback input pin. A resistor divider connects from the output to AGND. The mid-point of the resistor divider is connected to VFB. A feedforward capacitor (CA) and resistor (RC) are required in parallel to the upper feedback resistor (RA). The output voltage regulation is based on the VFB node voltage being equal to 0.6V. 14 AGND Power Ground for internal control circuits. Connect to the power ground plane with a via right next to the pin. - No Connect. These pins must be soldered to PCB but not electrically connected to each other or to any external signal, voltage, or ground. These pins may be connected internally. Failure to follow this guideline may result in device damage. Analog A soft-start capacitor is connected between this pin and AGND. The value of the capacitor controls the soft-start interval. Refer to Soft-Start Operation in the Functional Description section for more details. 15 16 NC SS 17 POK Digital Power OK is an open drain transistor (pulled up to AVIN or similar voltage) used for power system state indication. POK is logic high when VOUT is above 90% of VOUT nominal. Leave this pin floating if not used. 18 ENABLE Analog Input Enable. Applying logic high will enable the device and initiate a softstart. Applying logic low disables the output and switching stops. 19 AVIN Power Input power supply for the controller. Connect to input voltage at a quiet point. Refer to the Layout Recommendation section. 22, 23 PVIN Power Input power supply. Connect to input power supply. Decouple with input capacitor to PGND pin. Refer to the Layout Recommendation section. 31 PGND Ground Power ground thermal pad. Not a perimeter pin. Connect thermal pad to the system GND plane for heat-sinking purposes. Refer to the Layout Recommendation section. Page 3 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI ABSOLUTE MAXIMUM RATINGS CAUTION: Absolute Maximum ratings are stress ratings only. Functional operation beyond the recommended operating conditions is not implied. Stress beyond the absolute maximum ratings may impair device life. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. Absolute Maximum Pin Ratings PARAMETER SYMBOL MIN MAX UNITS PVIN, AVIN, VOUT -0.3 6.6 V ENABLE, POK -0.3 VIN+0.3 V VFB, SS -0.3 2.7 V MIN MAX UNITS +150 C +150 C +260 C MAX UNITS Absolute Maximum Thermal Ratings PARAMETER CONDITION Maximum Operating Junction Temperature Storage Temperature Range -65 Reflow Peak Body Temperature (10 Sec) MSL3 JEDEC J-STD-020A Absolute Maximum ESD Ratings PARAMETER CONDITION MIN HBM (Human Body Model) 2000 V CDM (Charged Device Model) 500 V Page 4 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN MAX UNITS VIN 2.7 5.5 V Output Voltage Range VOUT 0.6 3.3 V Output Current Range IOUT 1 A Operating Ambient Temperature Range TA -40 +85 C Operating Junction Temperature TJ -40 +125 C Input Voltage Range THERMAL CHARACTERISTICS PARAMETER SYMBOL TYPICAL UNITS TSD 140 C TSDHYS 20 C Thermal Resistance: Junction to Ambient (0 LFM) (1) JA 60 C/W Thermal Resistance: Junction to Case (0 LFM) JC 3 C/W Thermal Shutdown Thermal Shutdown Hysteresis (1) Based on 2oz. external copper layers and proper thermal design in line with EIJ/JEDEC JESD51-7 standard for high thermal conductivity boards. Page 5 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI ELECTRICAL CHARACTERISTICS NOTE: VIN = PVIN = AVIN = 5V, Minimum and Maximum values are over operating ambient temperature range unless otherwise noted. Typical values are at TA = 25C. PARAMETER SYMBOL TEST CONDITIONS MIN PVIN = AVIN 2.7 TYP MAX UNITS 5.5 V Operating Input Voltage VIN Under Voltage Lock-Out - VIN Rising VUVLOR Voltage above which UVLO is not asserted 2.3 V Under Voltage Lock-Out - VIN Falling VUVLOF Voltage below which UVLO is asserted 1.9 V Output Voltage Range VOUT Maximum Duty Cycle DMAX Feedback Pin Voltage Intial Accuracy (2) VFB 0.6 3.3 85 TA = 25C, VIN = 5.0V, 0.591 0.6 V % 0.609 V -2.0 +2.25 % -2.0 +2.0 % -3.0 +2.0 % ILOAD = 100mA VIN = 3.3V; 0A IOUT 1.0A; -40C TA +85C VIN = 5.0V; 0A IOUT 1.0A; Output Voltage DC Accuracy -20C TA +85C VIN = 5.0V; 0A IOUT 1.0A; -40C TA +85C Feedback pin Input Leakage Current (3) IFB Continuous Output Current IOUT Over Current Trip Level IOCP OCP Threshold IOCP 2.7 VIN 5.5V AVIN Shut-Down Current ISD ENABLE = Low 175 A PVIN Shut-Down Current ISD ENABLE = Low 175 A ENABLE Pin Logic Threshold ENABLE Pin Input Current VFB pin current input leakage 100 nA 1 1.2 1.8 A A 1.2 A ENLOW Pin = Low 0.0 0.4 V ENHIGH Pin = High 1.8 VIN V IENABLE ENABLE = High 5 A Page 6 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI PARAMETER ENABLE Lock-out SYMBOL ENLO TEST CONDITIONS MIN Time before enable will reassert internally after being pulled low Switching Frequency fSW Soft Start Time(2) (3) TSS CSS = 10nF (Note 2 and 3) 5.2 Allowable Soft Start Capacitor Range(3) CSS (Note 3) 0.47 TYP MAX UNITS 12.5 ms 2.2 MHz 6.5 7.8 ms 10 nF (2) Parameter not production tested but is guaranteed by design. (3) Soft Start Time range does not include capacitor tolerances. Page 7 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI TYPICAL PERFORMANCE CURVES Efficiency vs. Output Current Efficiency vs. Output Current 95 90 90 85 85 EFFICIENCY (%) 95 EFFICIENCY (%) 100 100 80 75 VOUT = 3.3V 70 VOUT = 2.5V 65 VOUT = 1.8V 60 VOUT = 1.5V VOUT = 1.2V 55 VOUT = 1.0V 50 0 80 75 VOUT = 2.5V 70 VOUT = 1.8V 65 VOUT = 1.5V 60 CONDITIONS VIN = 5.0V VOUT = 1.2V 55 50 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 1 0.1 Output Voltage vs. Output Current OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 1.010 1.000 0.990 CONDITIONS VOUT = 1.0V 0.970 0 0.5 0.6 0.7 0.8 0.9 1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VIN = 3.3V 1.210 VIN = 5.0V 1.200 1.190 1.180 CONDITIONS VOUT = 1.2V 1.170 1 0 OUTPUT CURRENT (A) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 OUTPUT CURRENT (A) Output Voltage vs. Output Current Output Voltage vs. Output Current 1.820 1.520 1.510 OUTPUT VOLTAGE (V) VIN = 3.3V OUTPUT VOLTAGE (V) 0.4 1.220 VIN = 5V 0.980 0.3 Output Voltage vs. Output Current VIN = 3.3V 1.020 0.2 OUTPUT CURRENT (A) OUTPUT CURRENT (A) 1.030 CONDITIONS VIN = 3.3V VOUT = 1.0V VIN = 5.0V 1.500 1.490 1.480 CONDITIONS VOUT = 1.5V 1.470 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VIN = 3.3V 1.810 VIN = 5.0V 1.800 1.790 1.780 1.770 CONDITIONS VOUT = 1.8V 1.760 1.750 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 OUTPUT CURRENT (A) OUTPUT CURRENT (A) Page 8 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI TYPICAL PERFORMANCE CURVES (CONTINUED) Output Voltage vs. Output Current Output Voltage vs. Output Current 3.320 VIN = 5.0V VIN = 3.3V 2.530 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 2.540 VIN = 5.0V 2.520 2.510 2.500 2.490 CONDITIONS VOUT = 2.5V 2.480 2.470 0 3.310 3.300 3.290 3.280 CONDITIONS VOUT = 3.3V 3.270 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 OUTPUT CURRENT (A) OUTPUT CURRENT (A) Output Voltage vs. Temperature Output Voltage vs. Temperature 1.020 CONDITIONS VIN = 3.3V VOUT_NOM = 1.0V 1.015 1.010 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 1.020 1.005 1.000 LOAD = 0.05A 0.995 LOAD = 0.2A 0.990 LOAD = 0.4A 0.985 LOAD = 0.8A LOAD = 1A 0.980 -40 -15 10 35 CONDITIONS VIN = 5.0V VOUT_NOM = 1.0V 1.015 1.010 1.005 1.000 LOAD = 0.05A 0.995 LOAD = 0.2A 0.990 LOAD = 0.4A 0.985 LOAD = 0.8A LOAD = 1A 0.980 60 -40 85 AMBIENT TEMPERATURE (C) -15 10 35 60 85 AMBIENT TEMPERATURE (C) Output Voltage vs. Temperature Output Voltage vs. Temperature 2.560 3.360 CONDITIONS VIN = 3.3V VOUT_NOM = 2.5V 2.540 2.520 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 1 2.500 2.480 LOAD = 0.05A 2.460 LOAD = 0.2A 2.440 LOAD = 0.4A 2.420 LOAD = 0.8A 2.400 LOAD = 1A -40 -15 10 35 60 CONDITIONS VIN = 5.0V VOUT_NOM = 3.3V 3.340 3.320 3.300 3.280 LOAD = 0.05A LOAD = 0.2A 3.260 LOAD = 0.4A 3.240 LOAD = 0.8A LOAD = 1A 3.220 85 AMBIENT TEMPERATURE (C) -40 -15 10 35 60 85 AMBIENT TEMPERATURE (C) Page 9 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI TYPICAL PERFORMANCE CURVES (CONTINUED) OUTPUT VOLTAGE (V) Output Voltage vs. Input Voltage 1.820 1.815 1.810 1.805 1.800 1.795 1.790 LOAD = 0A LOAD = 0.05A LOAD = 0.25A LOAD = 0.5A LOAD = 1A 1.785 1.780 1.775 1.770 2.5 3 3.5 CONDITIONS VOUT_NOM = 1.8V TA = 25C 4 4.5 5 5.5 INPUT VOLTAGE (V) Page 10 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI TYPICAL PERFORMANCE CHARACTERISTICS Page 11 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI TYPICAL PERFORMANCE CHARACTERISTICS (CONTINUED) Page 12 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI TYPICAL PERFORMANCE CHARACTERISTICS (CONTINUED) Page 13 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI FUNCTIONAL BLOCK DIAGRAM PVIN UVLO Thermal Limit Current Limit NC(SW) P-Drive (-) PWM Comp (+) Logic VOUT N-Drive PGND PLL/ Sawtooth Generator Compensation Network VFB (-) Error Amp Power OK (+) POK ENABLE CSS Soft Start Internal Reference Internal Regulator AGND AVIN Figure 4: Functional Block Diagram Page 14 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI FUNCTIONAL DESCRIPTION Synchronous DC-DC Step-Down PowerSoC The EN6310QI is a synchronous buck converter with integrated MOSFET switches and Inductor. The device can deliver up to 1A of continuous load current. The EN6310QI has a programmable soft start rise time and a power OK (POK) signal. The device operates in a fixed 2.2MHz PWM mode to eliminate noise associated with pulse frequency modulation schemes. The control topology is a low complexity type IV voltage mode providing high noise immunity and stability over the entire operating range. Output voltage is set with a simple resistor divider. The high switching frequency enables the use of small MLCC input and output filter capacitors. Figure 4 shows the EN6310QI block diagram. Operational Features: The EN6310QI has the following protection features. Over-current protection (to protect the IC from excessive load current) Short-Circuit protection Thermal shutdown with hysteresis Under-voltage lockout circuit to disable the converter output when the input voltage is below a predefined level Protection Features: Soft-start circuit, limiting the in-rush current when the converter is initially powered up. The soft start time is programmable with appropriate choice of soft start capacitor value. High Efficiency Technology The key enabler of this revolutionary integration is Enpirion's proprietary power MOSFET technology. The advanced MOSFET switches are implemented in deep-submicron CMOS to supply very low switching loss at high switching frequencies and to allow a high level of integration. The semiconductor process allows seamless integration of all switching, control, and compensation circuitry. The proprietary magnetics design provides high-density/high-value magnetics in a very small footprint. Enpirion magnetics are carefully matched to the control and compensation circuitry yielding an optimal solution with assured performance over the entire operating range. Integration for Low-Noise Low-EMI The EN6310QI utilizes a proprietary low loss integrated inductor. The integration of the inductor greatly simplifies the power supply design process. The inherent shielding and compact construction of the integrated inductor reduces the conducted and radiated noise that can couple into the traces of the printed circuit board. Furthermore, the package layout is optimized to reduce the electrical path length for the high di/dt input AC ripple currents that are a major source of radiated emissions from DC-DC converters. Careful package and IC design minimize common mode noise that can be difficult to mitigate otherwise. The integrated inductor provides the optimal solution to the complexity, output ripple, and noise that plague low power DCDC converter design. Page 15 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI Control Topology The EN6310QI utilizes an internal type IV voltage mode compensation scheme. Voltage mode control provides a high degree of noise immunity at light load currents so that low ripple and high accuracy are maintained over the entire load range. The high switching frequency allows for a very wide control loop bandwidth and hence excellent transient performance. The EN6310QI is optimized for fast transient recovery for applications with demanding transient performance. Voltage mode control enables a high degree of stability over the entire operating range. Enable The EN6310QI ENABLE pin enables and disables operation of the device. A logic low will disable the converter and cause it to shut down. A logic high will enable the converter and initiate a normal soft start operation. When ENABLE is pulled low, the Power MOSFETs stop switching and the output is discharged in a controlled manner with a soft pull down MOSFET. Once the enable pin is pulled low, there is a lockout period before the device can be re-enabled. The lock out period can be found in the Electrical Characteristics Table. Do not leave ENABLE pin floating or it will be in an unknown random state. The EN6310QI supports startup into a pre-biased output of up to 1.5V. The output of the EN6310QI can be pre-biased with a voltage up to 1.5V when it is first enabled. POK Operation The POK signal is an open drain signal (requires a pull up resistor to AVIN or similar voltage) from the converter indicating the output voltage is within the specified range. Typically, a 100k or lower resistance is used as the pull-up resistor. The POK signal will be logic high (AVIN) when the output voltage is above 90% of the programmed voltage level. If the output voltage is below this point, the POK signal will be a logic low. The POK will also be a logic low if the input voltage is in UVLO or if the ENABLE is pulled low. The POK signal can be used to sequence down-stream converters by tying to their enable pins. Programmable Soft Start Operation Soft start is externally programmable by adjusting the value of the CSS capacitor, which is placed between the respective CSS pin and AGND pin. When the enable pin is pulled high, the output will ramp up monotonically at a rate determined by the CSS capacitor. Soft start ramp time is programmable over a range of 0.5ms to 10ms. The longer ramp times allow startup into very large bulk capacitors that may be present in applications such as wireless broadband or solid state storage, without triggering an Over Current condition. The rise time is given as: TRISE [ms] = CSS [nF] x 0.65 25% NOTE: Rise time does not include capacitor tolerances. If a 10nF soft-start capacitor is used, then the output voltage rise time will be around 6.5ms. The rise time is measured from when VIN VUVLOR and ENABLE pin voltage crosses its logic high threshold to when VOUT reaches its programmed value. Page 16 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI Over Current/Short Circuit Protection The current limit and short-circuit protection is achieved by sensing the current flowing through a sense PFET. When the sensed current exceeds the current limit, both NFET and PFET switches are turned off and the output is discharged. After 1.6ms the device will be re-enabled and will then go through a normal soft-start cycle. If the over current condition persists, the device will enter a hiccup mode. Under Voltage Lockout During initial power up an under voltage lockout circuit will hold-off the switching circuitry until the input voltage reaches a sufficient level to insure proper operation. If the voltage drops below the UVLO threshold, the lockout circuitry will again disable the switching. Hysteresis is included to prevent chattering between states. Thermal Shutdown When excess power is dissipated in the EN6310QI the junction temperature will rise. Once the junction temperature exceeds the thermal shutdown temperature the thermal shutdown circuit turns off the converter output voltage thus allowing the device to cool. When the junction temperature decreases to a safe operating level, the part will go through the normal startup process. The thermal shutdown temperature and hysteresis values can be found in The electrical characteristics table. Page 17 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI APPLICATION INFORMATION Output Voltage Setting The EN6310QI output voltage is programmed using a simple resistor divider network (RA and RB). The feedback voltage at VFB is nominally 0.6V. RA is fixed at 200k and RB can be calculated based on Figure 5. The values recommended for COUT, CA, and RCA make up the external compensation of the EN6310QI. It will vary with each VIN and VOUT combination to optimize on performance. Please see Table 1 for a list of recommended RA, CA, RCA, and COUT values for each solution. Since VFB is a sensitive node, do not touch the VFB node while the device is in operation as doing so may introduce parasitic capacitance into the control loop that causes the device to behave abnormally and damage may occur. VOUT VOUT COUT RA CA RCA VFB VFB = 0.6V PGND RB = EN6310QI VFB x RA VOUT - VFB Figure 5: VOUT Resistor Divider & Compensation Capacitor The output voltage is set by the following formula: = 1+ Rearranging to solve for RB: = - Where: RA = 200k, VREF = 0.60V Then RB is given as: = 120 - 0.6 RA is chosen as 200k to provide constant loop gain. The output voltage can be programmed over the range of 0.6V to 3.3V. Page 18 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI Table 1: Compensation values. For output voltages in between, use the values from the higher output voltage CIN = 4.7F/0603 + 100pF CAVIN = 20 + 0.47F COUT = 47F/0805 or 2x22F/0603 RA = 200k, RCA = 1k, RB = 0.6RA/(VOUT - 0.6) VIN VOUT CA VIN VOUT CA 5.5V 5.5V 27pF 5.0V 3.3V 15pF 4.5V 5.0V 4.5V 1.2V 33pF 3.3V 5.5V 2.7V 5.0V 2.5V 4.5V 5.5V 3.3V 5.0V 5.5V 4.5V 5.0V 4.5V 39pF 15pF 15pF 39pF 1.0V 3.3V 47pF 1.8V 2.7V 5.5V 3.3V 22pF 39pF 2.7V 5.0V 5.5V 4.5V 22pF 5.0V 0.6V 47F 3.3V 56pF 4.5V 2.7V 1.5V 3.3V 27pF 2.7V 33pF Page 19 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI Input Filter Capacitor The EN6310QI requires at least a 4.7F/0603 and a 100pF input capacitor near the PVIN pins. Low-cost, lowESR ceramic capacitors should be used as input capacitors for this converter. The dielectric must be X5R or X7R rated. Y5V or equivalent dielectric formulations must not be used as these lose too much capacitance with frequency, temperature and bias voltage. In some applications, lower value capacitors are needed in parallel with the larger capacitors in order to provide high frequency decoupling. Table 2 contains a list of recommended input capacitors. Table 2: Recommended Input Capacitors DESCRIPTION 4.7F, 10V, X5R, 10%, 0603 4.7F, 10V, X5R, 10%, 0603 MFG Murata Taiyo Yuden P/N GRM185R61A475KE11# LMK107BJ475KA-T Output Capacitor Selection The EN6310QI requires at least a 47F/0805 or two 22F/0603 output filter capacitors. Low ESR ceramic capacitors are required with X5R or X7R rated dielectric formulation. Y5V or equivalent dielectric formulations must not be used as these lose too much capacitance with frequency, temperature and bias voltage. Table 3 contains a list of recommended output capacitors. Table 3: Recommended Output Capacitors DESCRIPTION 47F, 6.3V, X5R, 20%, 0805 MFG Murata P/N GRM21BR60J476ME15# 47F, 6.3V, X5R, 20%, 0805 Taiyo Yuden JMK212BBJ476MG-T 22F, 10V, X5R, 20%, 0603 Murata GRM188R60J226MEA0# 22F, 10V, X5R, 20%, 0603 Taiyo Yuden JMK107BBJ226MA-T Page 20 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI THERMAL CONSIDERATIONS Thermal considerations are important power supply design facts that cannot be avoided in the real world. Whenever there are power losses in a system, the heat that is generated by the power dissipation needs to be accounted for. The Enpirion PowerSoC helps alleviate some of those concerns. The Enpirion EN6310QI DC-DC converter is packaged in a 4x5x1.85mm 30-pin QFN package. The QFN package is constructed with copper lead frames that have exposed thermal pads. The exposed thermal pad on the package should be soldered directly on to a copper ground pad on the printed circuit board (PCB) to act as a heat sink. The recommended maximum junction temperature for continuous operation is 125C. Continuous operation above 125C may reduce long-term reliability. The device has a thermal overload protection circuit designed to turn off the device at an approximate junction temperature value of 140C. The following example and calculations illustrate the thermal performance of the EN6310QI. Example: VIN = 5V VOUT = 3.3V IOUT = 1A First calculate the output power. POUT = 3.3V x 1A = 3.3W Next, determine the input power based on the efficiency () shown in Figure 6. Efficiency vs. Output Current 100 95 EFFICIENCY (%) 90 85 80 75 70 65 60 55 VOUT = 3.3V 50 0 CONDITIONS VIN = 5.0V 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 OUTPUT CURRENT (A) Figure 6: Efficiency vs. Output Current Page 21 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI For VIN = 5V, VOUT = 3.3V at 1A, 91% = POUT / PIN = 91% = 0.91 PIN = POUT / PIN 3.3W / 0.91 3.63W The power dissipation (PD) is the power loss in the system and can be calculated by subtracting the output power from the input power. PD = PIN - POUT 3.63W - 3.3W 0.33W With the power dissipation known, the temperature rise in the device may be estimated based on the theta JA value (JA). The JA parameter estimates how much the temperature will rise in the device for every watt of power dissipation. The EN6310QI has a JA value of 60 C/W without airflow. Determine the change in temperature (T) based on PD and JA. T = PD x JA T 0.33W x 60C/W 19.8C 20C The junction temperature (TJ) of the device is approximately the ambient temperature (TA) plus the change in temperature. We assume the initial ambient temperature to be 25C. TJ = TA + T TJ 25C + 20C 45C The maximum operating junction temperature (TJMAX) of the device is 125C, so the device can operate at a higher ambient temperature. The maximum ambient temperature (TAMAX) allowed can be calculated. TAMAX = TJMAX - PD x JA 125C - 20C 105C The maximum ambient temperature the device can reach is 105C given the input and output conditions. Note that the efficiency will be slightly lower at higher temperatures and this calculation is an estimate. Page 22 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI APPLICATION CIRCUITS VOUT VIN VOUT PVIN CIN2 4.7 F EN6310QI RAVIN CIN1 20 100pF ON OFF COUT 47F 0805 ENABLE AVIN RA CAVIN F CA RCA VFB SS PGND PGND CSS 10nF AGND RB Figure 7: Typical Engineering Schematic Page 23 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI LAYOUT RECOMMENDATIONS Figure 8: Drop-In Board Layout Recommendations Recommendation 1: Input and output filter capacitors should be placed on the same side of the PCB, and as close to the EN6310QI package as possible. They should be connected to the device with very short and wide traces. Do not use thermal reliefs or spokes when connecting the capacitor pads to the respective nodes. The Voltage and GND traces between the capacitors and the EN6310QI should be as close to each other as possible so that the gap between the two nodes is minimized, even under the capacitors. Recommendation 2: The system ground plane should be the first layer immediately below the surface layer. This ground plane should be continuous and un-interrupted below the converter and the input/output capacitors. Please see the Gerber files on EN6310QI's product page at www.altera.com/enpirion. Page 24 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI Recommendation 3: The large thermal pad underneath the component must be connected to the system ground plane through as many vias as possible. The drill diameter of the vias should be 0.33mm, and the vias must have at least 1 oz. copper plating on the inside wall, making the finished hole size around 0.20-0.26mm. Do not use thermal reliefs or spokes to connect the vias to the ground plane. This connection provides the path for heat dissipation from the converter. See Figure 8. Recommendation 4: Multiple small vias (the same size as the thermal vias discussed in recommendation 3 should be used to connect ground terminal of the input capacitor and output capacitors to the system ground plane. It is preferred to put these vias under the capacitors along the edge of the GND copper closest to the +V copper. Please see Figure 8. These vias connect the input/output filter capacitors to the GND plane, and help reduce parasitic inductances in the input and output current loops. If the vias cannot be placed under CIN and COUT, then put them just outside the capacitors along the GND slit separating the two components. Do not use thermal reliefs or spokes to connect these vias to the ground plane. AVIN is the power supply for the internal small-signal control circuits. It should be connected to the input voltage at a quiet point. A good location is to place the AVIN connection on the source side of the input capacitor, away from the PVIN pins. Recommendation 6: The layer 1 metal under the device must not be more than shown in Figure 8. See the section regarding exposed metal on bottom of package. As with any switch-mode DC/DC converter, try not to run sensitive signal or control lines underneath the converter package on other layers. Recommendation 7: The VOUT sense point should be just after the last output filter capacitor. Keep the sense trace as short as possible in order to avoid noise coupling into the control loop. Recommendation 8: Keep RA, CA, and RB close to the VFB pin (see Figures 6 and 7). The VFB pin is a highimpedance, sensitive node. Keep the trace to this pin as short as possible. Whenever possible, connect RB directly to the AGND pin instead of going through the GND plane. Page 25 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI RECOMMENDED PCB FOOTPRINT Figure 9: EN6310QI PCB Footprint (Top View) Note: Don't use the layer underneath the device keep out area as it contains the exposed metal below the package that is not to be mechanically or electrically connected to the PCB. Page 26 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI PACKAGE AND MECHANICAL Figure 10: EN6310QI Package Dimensions Packing and Marking Information: https://www.altera.com/support/quality-and-reliability/packing.html Page 27 09644 May 15, 2018 Rev G Datasheet | Intel(R) Enpirion(R) Power Solutions: EN6310QI REVISION HISTORY Rev Date Change(s) A March 2014 Introductory production datasheet. B March 2015 Pin 12 changed to VOUT instead of NC. C June 2015 Updated the pre-bias section adding the capability of pre-biasing to voltage up to 1.5V. D Feb 2016 Changed Feedback Pin Voltage Initial Accuracy on Electrical Characteristics Table. Corrected thermal hysteresis value in thermal shutdown section. Added section on "Design considerations for lead-frame based modules" i.e. keepout area. Modified PCB Footprint and package drawings. Formatting changes. E June 2016 Added EMI scan data. Clarified location of Gerber files in layout recommendation section. F Feb 2017 Updating the device package drawings with the keep-out area drawing. Drawing the Keep-out Pins in figure 3. G April 2018 Changed datasheet into Intel format. WHERE TO GET MORE INFORMATION For more information about Intel(R) and Enpirion(R) PowerSoCs, visit: www.altera.com/enpirion (c) 2017 Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS, and STRATIX words and logos are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. Other marks and brands may be claimed as the property of others. Intel reserves the right to make changes to any products and services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. * Other marks and brands may be claimed as the property of others. Page 28 09644 May 15, 2018 Rev G