74LV132
Quad 2-input NAND Schmitt-trigger
Product specification
Supersedes data of 1997 Feb 04
IC24 Data Handbook
1998 Apr 28
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74LV132Quad 2-input NAND Schmitt-trigger
2
1998 Apr 28 853–1912 19290
FEATURES
•Wide operating voltage: 1.0 to 5.5V
•Optimized for Low V oltage applications: 1.0 to 3.6V
•Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
•Typical VOLP (output ground bounce) 0.8V @ VCC = 3.3V,
Tamb = 25°C
•Typical VOHV (output VOH undershoot) 2V @ VCC = 3.3V,
Tamb = 25°C
•Output capability: standard
•ICC category: SSI
APPLICATIONS
•W ave and pulse shapers
•Astable multivibrators
•Monostable multivibrators
DESCRIPTION
The 74LV132 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT132.
The 74LV132 contains four 2-input NAND gates which accept
standard input signals. They are capable of transforming slowly
changing input signals into sharply defined, jitter-free output signals.
The gate switches at different points for positive and negative-going
signals. The difference between the positive voltage VT+ and the
negative voltage VT– is defined as the hysteresis voltage VH.
QUICK REFERENCE DATA
GND = 0V ; Tamb = 25°C; tr = tf 2.5 ns
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tPHL/tPLH Propagation delay
nA, nB to nY CL = 15pF
VCC = 3.3V 10 ns
CIInput capacitance 3.5 pF
CPD Power dissipation capacitance per gate Notes 1 and 2 24 pF
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD VCC2 fi (CL VCC2 fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V ;
(CL VCC2 fo) = sum of the outputs.
2. The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
14-Pin Plastic DIL –40°C to +125°C74LV132 N 74LV132 N SOT27-1
14-Pin Plastic SO –40°C to +125°C74LV132 D 74LV132 D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +125°C74LV132 DB 74LV132 DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +125°C74LV132 PW 74LV132PW DH SOT402-1
PIN DESCRIPTION
PIN
NUMBER SYMBOL FUNCTION
1, 4, 9, 12 1A to 4A Data inputs
2, 5, 10, 13 1B to 4B Data inputs
3, 6, 8, 11 1Y to 4Y Data outputs
7 GND Ground (0V)
14 VCC Positive supply voltage
FUNCTION TABLE
INPUTS OUTPUT
nA nB nY
L L H
L H H
H L H
H H L
NOTES:
H = HIGH voltage level
L = LOW voltage level
Philips Semiconductors Product specification
74LV132Quad 2-input NAND Schmitt-trigger
1998 Apr 28 3
PIN CONFIGURATION
14
13
12
11
10
9
7
6
5
4
3
2
1
GND
1A
1B
1Y
2A
2B
2Y
VCC
4B
4A
4Y
3B
3A
SV00213
8 3Y
LOGIC SYMBOL (IEEE/IEC)
3
&
&
&
&
6
8
11
1
2
4
5
9
10
12
13
SV00216
LOGIC SYMBOL
3
1
2
SV00215
1A
1B
4
5
2A
2B
9
10
3A
3B
12
13
4A
4B
1Y
2Y 6
3Y 8
4Y 11
LOGIC DIAGRAM
Y
A
B
SV00217
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
VCC DC supply voltage See Note1 1.0 3.3 5.5 V
VIInput voltage 0 – VCC V
VOOutput voltage 0 – VCC V
Tamb Operating ambient temperature range in free
air See DC and AC
characteristics –40
–40 +85
+125 °C
tr, tfInput rise and fall times except for
Schmitt-trigger inputs
VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V
VCC = 3.6V to 5.5V
–
–
–
–
–
–
–
–
500
200
100
50 ns/V
NOTE:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
Philips Semiconductors Product specification
74LV132Quad 2-input NAND Schmitt-trigger
1998 Apr 28 4
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage –0.5 to +7.0 V
±IIK DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA
±IOK DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA
±IODC output source or sink current
– standard outputs –0.5V < VO < VCC + 0.5V 25 mA
±IGND,
±ICC
DC VCC or GND current for types with
– standard outputs 50 mA
Tstg Storage temperature range –65 to +150 °C
PTOT
Power dissipation per package
– plastic DIL
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400 mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V). LIMITS
SYMBOL PARAMETER TEST CONDITIONS -40°C to +85°C -40°C to +125°CUNIT
MIN TYP1MAX MIN MAX
VCC = 1.2V 0.9 0.9
V
HIGH level Input VCC = 2.0V 1.4 1.4
V
V
IH voltage VCC = 2.7 to 3.6V 2.0 2.0
V
VCC = 4.5 to 5.5V 0.7*VCC 0.7*VCC
VCC = 1.2V 0.3 0.3
V
LOW level Input VCC = 2.0V 0.6 0.6
V
V
IL voltage VCC = 2.7 to 3.6V 0.8 0.8
V
VCC = 4.5 to 5.5 0.3*VCC 0.3*VCC
VCC = 1.2V ; V I = VIH or VIL; –IO = 100µA 1.2
HIGH l l t t
VCC = 2.0V ; V I = VIH or VIL; –IO = 100µA 1.8 2.0 1.8
VOH HIGH level output
voltage
;
all out
p
uts
VCC = 2.7V ; V I = VIH or VIL; –IO = 100µA 2.5 2.7 2.5 V
voltage
all
out uts
VCC = 3.0V ; V I = VIH or VIL; –IO = 100µA 2.8 3.0 2.8
VCC = 4.5V ; V I = VIH or VIL; –IO = 100µA 4.3 4.5 4.3
VO
HIGH level output
volta
g
e; VCC = 3.0V ; V I = VIH or VIL; –IO = 6mA 2.40 2.82 2.20
V
V
OH
g
STANDARD
outputs VCC = 4.5V ; V I = VIH or VIL; –IO = 12mA 3.60 4.20 3.50
V
VCC = 1.2V ; V I = VIH or VIL; IO = 100µA 0
LOW l l t t
VCC = 2.0V ; V I = VIH or VIL; IO = 100µA 0 0.2 0.2
VOL LOW level output
voltage
;
all out
p
uts
VCC = 2.7V ; V I = VIH or VIL; IO = 100µA 0 0.2 0.2 V
voltage
all
out uts
VCC = 3.0V ; V I = VIH or VIL; IO = 100µA 0 0.2 0.2
VCC = 4.5V ; V I = VIH or VIL; IO = 100µA 0 0.2 0.2
Philips Semiconductors Product specification
74LV132Quad 2-input NAND Schmitt-trigger
1998 Apr 28 5
DC CHARACTERISTICS (Continued)
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
TEST
CONDITIONS
-40°C to +85°C -40°C to +125°C
UNIT
VO
LOW level output
volta
g
e; VCC = 3.0V ; V I = VIH or VIL; IO = 6mA 0.25 0.40 0.50
V
V
OL
g
STANDARD
outputs VCC = 4.5V ; V I = VIH or VIL; IO = 12mA 0.35 0.55 0.65
V
IIInput leakage
current VCC = 5.5V ; V I = VCC or GND 1.0 1.0 µA
ICC Quiescent supply
current; SSI VCC = 5.5V ; V I = VCC or GND; IO = 0 20.0 40 µA
∆ICC Additional
quiescent supply
current per input VCC = 2.7V to 3.6V ; VI = VCC – 0.6V 500 850 µA
NOTE:
1. All typical values are measured at Tamb = 25°C.
TRANSFER CHARACTERISTICS
Voltages are referenced to GND = 0V.
CONDITION
LIMITS
SYMBOL PARAMETER WAVEFORM
CONDITION
–40 to +85°C–40 to +125°CUNIT
VCC(V) MIN TYP1MAX MIN MAX
1.2 – 0.70 – –
2.0 0.8 1.10 1.4 0.8 1.4
2.7 1.0 1.45 2.0 1.0 2.0
VT+ Positive going
threshold
Figures
1 and 2
3.0 1.2 1.60 2.2 1.2 2.2 V
threshold
1
and
2
3.6 1.5 1.95 2.4 1.5 2.4
4.5 1.7 2.50 3.2 1.7 3.2
5.5 2.1 3.00 3.9 2.1 3.9
1.2 – 0.34 – – –
2.0 0.3 0.65 0.9 0.3 0.9
2.7 0.4 0.90 1.4 0.4 1.4
VT– Negative going
threshold
Figures
1 and 2
3.0 0.6 1.05 1.5 0.6 1.5 V
threshold
1
and
2
3.6 0.8 1.30 1.8 0.8 1.8
4.5 0.9 1.60 2.0 0.9 2.0
5.5 1.2 2.00 2.6 1.2 2.6
1.2 – 0.30 – – –
2.0 0.2 0.55 0.8 0.2 0.8
2.7 0.3 0.60 1.1 0.3 1.1
VHHysteresis
(VT+
–
VT)
Figures
1 and 2
3.0 0.4 0.65 1.2 0.4 1.2 V
(VT+
VT
–
)
1
and
2
3.6 0.4 0.70 1.2 0.4 1.2
4.5 0.4 0.80 1.4 0.4 1.4
5.5 0.6 1.00 1.5 0.6 1.5
NOTE:
1. Unless otherwise stated, all typical values are at Tamb = 25°C.
Philips Semiconductors Product specification
74LV132Quad 2-input NAND Schmitt-trigger
1998 Apr 28 6
AC CHARACTERISTICS
GND = 0V ; tr = tf = 2.5ns; CL = 50pF
CONDITION
LIMITS
SYMBOL PARAMETER WAVEFORM
CONDITION
–40 to +85°C–40 to +125°CUNIT
VCC(V) MIN TYP1MAX MIN MAX
1.2 – 65 – – –
2.0 – 18 34 – 43
tPHL/tPLH Propagation delay
nA, nB, to nY
Figure 6 2.7 – 15 24 – 30 ns
nA
,
nB
,
to
nY
3.0 to 3.6 – 12220 – 25
4.5 to 5.5 – 9.0214 – 17
NOTES:
1. Unless otherwise stated, all typical values are at Tamb = 25°C.
2. Typical value measured at VCC = 3.3V.
3. Typical value measured at VCC = 5.0V.
TRANSFER CHARACTERISTIC WAVEFORMS
VH
VT– VT+
VO
SV00218
Figure 1. Transfer characteristic.
VT+ VM
VT–
VI
VO
SV00220
Figure 2. Definition of VT+, VT– and VH; where VT+ and VT– are
between limits of 20% and 70%.
10
8
6
4
00 0.3 0.6 0.9 1.2
VIN (V)
ICC
(µA)
SV00222
2
Figure 3. Typical LV132 transfer characteristics; VCC = 1.2V.
100
80
60
40
000.4 0.8 1.2 1.6
VIN (V)
ICC
(µA)
SV00224
20
2.0
Figure 4. Typical LV132 transfer characteristics; VCC = 2.0V.
Philips Semiconductors Product specification
74LV132Quad 2-input NAND Schmitt-trigger
1998 Apr 28 7
TRANSFER CHARACTERISTIC WAVEFORMS
(Continued)
200
150
100
50
00 0.6 1.2 1.8 3.0
VIN (V)
ICC
(µA)
SV00225
250
2.4
Figure 5. Typical LV132 transfer characteristics; VCC = 3.0V.
AC WAVEFORMS
VM = 1.5V at VCC 2.7V 3.6V
VM = 0.5V * VCC at VCC 2.7V and 4.5V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VM
tPLH
tPHL
VM
VM
VCC
nA, nB INPUT
GND
VOH
nY OUTPUT
VOL
SV00219
Figure 6. Input (nA, nB) to output (nY) propagation delays.
TEST CIRCUIT
PULSE
GENERATOR
RT
Vl
D.U.T.
VO
CLRL= 1k
Vcc
Test Circuit for Outputs
DEFINITIONS
VCC VI
< 2.7V
2.7–3.6V
VCC
2.7V
TEST
tPLH/tPHL
≥4.5 V VCC
RL = Load resistor
CL = Load capacitance includes jig and probe capacitiance
50pF
RT = Termination resistance should be equal to ZOUT of pulse generators.
SV00902
Figure 7.Load circuitry for switching times.
Philips Semiconductors Product specification
74LV132
Quad 2-input NAND Schmitt-trigger
1998 Apr 28 8
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
Philips Semiconductors Product specification
74LV132
Quad 2-input NAND Schmitt-trigger
1998 Apr 28 9
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
Philips Semiconductors Product specification
74LV132
Quad 2-input NAND Schmitt-trigger
1998 Apr 28 10
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
Philips Semiconductors Product specification
74LV132
Quad 2-input NAND Schmitt-trigger
1998 Apr 28 11
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
Philips Semiconductors Product specification
74LV132Quad 2-input NAND Schmitt-trigger
yyyy mmm dd 12
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may af fect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 08-98
Document order number: 9397-750-04422
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition [1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.
