Low Cost CMOS, High Speed,
Rail-to-Rail Amplifiers
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F Document Feedback
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FEATURES
Qualified for automotive applications
High speed and fast settling
−3 dB bandwidth: 220 MHz (G = +1)
Slew rate: 170 V/μs
Settling time to 0.1%: 28 ns
Video specifications (G = +2, RL = 150 Ω)
0.1 dB gain flatness: 25 MHz
Differential gain error: 0.05%
Differential phase error: 0.25°
Single-supply operation
Wide supply range: 2.7 V to 5.5 V
Output swings to within 50 mV of supply rails
Low distortion: 79 dBc SFDR at 1 MHz
Linear output current: 125 mA at −40 dBc
Low power: 4.4 mA per amplifier
APPLICATIONS
Automotive infotainment systems
Automotive driver assistance systems
Imaging
Consumer video
Active filters
Coaxial cable drivers
Clock buffers
Photodiode preamp
Contact image sensor and buffers
GENERAL DESCRIPTION
The ADA4891-1 (single), ADA4891-2 (dual), ADA4891-3 (triple),
and ADA4891-4 (quad) are CMOS, high speed amplifiers that
offer high performance at a low cost. The amplifiers feature true
single-supply capability, with an input voltage range that extends
300 mV below the negative rail.
In spite of their low cost, the ADA4891-1/ADA4891-2/ADA4891-3/
ADA4891-4 family provides high performance and versatility.
The rail-to-rail output stage enables the output to swing to within
50 mV of each rail, enabling maximum dynamic range.
The ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 family of
amplifiers is ideal for imaging applications, such as consumer
video, CCD buffers, and contact image sensor and buffers. Low
distortion and fast settling time also make them ideal for active
filter applications.
The ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 are avail-
able in a wide variety of packages. The ADA4891-1 is available
in 8-lead SOIC and 5-lead SOT-23 packages. The ADA4891-2
is available in 8-lead SOIC and 8-lead MSOP packages. The
ADA4891-3 and ADA4891-4 are available in 14-lead SOIC and
CONNECTION DIAGRAMS
08054-026
NC
1
–IN
2
+IN
3
–V
S4
NC
8
+V
S
7
OUT
6
NC
5
A
DA4891-1
NC = NO CONNECT
Figure 1. 8-Lead SOIC_N (R-8)
0
8054-001
OUT
1
+IN
3
–V
S2
+V
S
5
–IN
4
ADA4891-1
Figure 2. 5-Lead SOT-23 (RJ-5)
08054-027
ADA4891-2
OUT1
1
–IN1
2
+IN1
3
–V
S4
+V
S
8
OUT2
7
–IN2
6
+IN2
5
NC = NO CONNECT
Figure 3. 8-Lead SOIC_N (R-8) and 8-Lead MSOP (RM-8)
PD1 1OUT214
PD2 2–IN213
PD3 3+IN212
+VS4–VS
11
+IN1 5+IN310
–IN1 6–IN39
OUT1 7OUT38
08054-073
ADA4891-3
Figure 4. 14-Lead SOIC_N (R-14) and 14-Lead TSSOP (RU-14)
+V
S
+IN2
OUT2
OUT4
+IN4
–V
S
+IN3
OUT3
+IN1
OUT1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
–IN1
–IN2
–IN4
–IN3
0
8054-074
ADA4891-4
Figure 5. 14-Lead SOIC_N (R-14) and 14-Lead TSSOP (RU-14)
14-lead TSSOP packages. The amplifiers are specified to operate
over the extended temperature range of −40°C to +125°C.
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 2 of 24
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Connection Diagrams ...................................................................... 1
Revision History ............................................................................... 3
Specifications ..................................................................................... 4
5 V Operation ............................................................................... 4
3 V Operation ............................................................................... 5
Absolute Maximum Ratings ............................................................ 7
Maximum Power Dissipation ..................................................... 7
ESD Caution .................................................................................. 7
Typical Performance Characteristics ............................................. 8
Applications Information .............................................................. 16
Using the ADA4891-1/ADA4891-2/ADA4891-3/
ADA4891-4 ................................................................................. 16
Wideband, Noninverting Gain Operation .............................. 16
Wideband, Inverting Gain Operation ..................................... 16
Recommended Values ................................................................ 16
Effect of RF on 0.1 dB Gain Flatness ........................................ 17
Driving Capacitive Loads .......................................................... 18
Terminating Unused Amplifiers .............................................. 19
Disable Feature (ADA4891-3 Only) ......................................... 19
Single-Supply Operation ........................................................... 19
Video Reconstruction Filter ...................................................... 20
Multiplexer .................................................................................. 20
Layout, Grounding, and Bypassing .............................................. 21
Power Supply Bypassing ............................................................ 21
Grounding ................................................................................... 21
Input and Output Capacitance ................................................. 21
Input-to-Output Coupling ........................................................ 21
Leakage Currents ........................................................................ 21
Outline Dimensions ....................................................................... 22
Ordering Guide .......................................................................... 24
Automotive Products ................................................................. 24
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 3 of 24
REVISION HISTORY
9/15—Rev. E to Rev. F
Changes to Features .......................................................................... 1
Moved Revision History Section ..................................................... 3
Changes to Table 1 ............................................................................ 4
Changes to Table 2 ............................................................................ 5
Changes to Figure 7 and Figure 10 ................................................. 8
Changes to Figure 15 and Figure 18 ............................................... 9
Changes to Figure 19, Figure 21, and Figure 22 .......................... 10
Changes to Figure 25 and Figure 29 ............................................. 11
Changes to Figure 32, Figure 33, and Figure 36 .......................... 12
Change to Figure 47 ........................................................................ 14
Changes to Ordering Guide ........................................................... 24
Change to Automotive Products Section ..................................... 24
3/13—Rev. D to Rev. E
Change to Features Section .............................................................. 1
Changes to DC Performance Parameter, Table 1 .......................... 3
Changes to DC Performance Parameter, Table 2 .......................... 4
Changes to Ordering Guide ........................................................... 23
Changes to Automotive Products Section ................................... 23
3/12—Rev. C to Rev. D
Added ADA4891-1W and ADA4891-2W ........................ Universal
Changes to Features Section and Applications Section ............... 1
Changes to Input Offset Voltage, Input Bias Current, and Open-
Loop Gain Parameters, Table 1 ........................................................ 4
Changes to Input Offset Voltage, Input Bias Current, and Open-
Loop Gain Parameters, Table 2 ........................................................ 5
Changes to Ordering Guide ........................................................... 23
Added Automotive Products Section ........................................... 23
9/10—Rev. B to Rev. C
Changes to Figure 23 and Figure 24 ............................................... 9
7/10—Rev. A to Rev. B
Added ADA4891-3 and ADA4891-4 ............................... Universal
Added 14-Lead SOIC and 14-Lead TSSOP Packages ... Universal
Deleted Figure 4; Renumbered Figures Sequentially ................... 1
Changes to Features Section and General Description Section .. 1
Added Figure 4 and Figure 5 ........................................................... 1
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Changes to Maximum Power Dissipation Section
and Figure 6 ....................................................................................... 6
Added Table 4; Renumbered Tables Sequentially ......................... 6
Deleted Figure 11 .............................................................................. 6
Changes to Typical Performance Characteristics Section ........... 7
Deleted Figure 12 .............................................................................. 7
Changes to Wideband, Noninverting Gain Operation Section,
Wideband, Inverting Gain Operation Section, and Table 5 ...... 15
Added Table 6 .................................................................................. 16
Changes to Figure 52 ...................................................................... 16
Added Figure 53 .............................................................................. 16
Changed Layout of Driving Capacitive Loads Section .............. 17
Added Disable Feature (ADA4891-3 Only) Section
and Single-Supply Operation Section .......................................... 18
Added Multiplexer Section ............................................................ 19
Updated Outline Dimensions........................................................ 21
Changes to Ordering Guide ........................................................... 23
6/10—Rev. 0 to Rev. A
Changes to Figure 26 ........................................................................ 9
Changes to Figure 33 and Figure 34 ............................................. 10
Updated Outline Dimensions........................................................ 18
Changes to Ordering Guide ........................................................... 18
2/10—Revision 0: Initial Version
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 4 of 24
SPECIFICATIONS
5 V OPERATION
TA = 25°C, VS = 5 V, R L = 1 kΩ to 2.5 V, unless otherwise noted. All specifications are for the ADA4891-1, ADA4891-2, ADA4891-3, and
ADA4891-4, unless otherwise noted. For the ADA4891-1 and ADA4891-2, RF = 604 Ω; for the ADA4891-3 and ADA4891-4, RF = 453 Ω,
unless otherwise noted.
Table 1.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
−3 dB Small-Signal Bandwidth ADA4891-1/ADA4891-2, G = +1, VO = 0.2 V p-p 240 MHz
ADA4891-3/ADA4891-4, G = +1, VO = 0.2 V p-p 220 MHz
ADA4891-1/ADA4891-2, G = +2, VO = 0.2 V p-p,
RL = 150 Ω to 2.5 V
90 MHz
ADA4891-3/ADA4891-4, G = +2, VO = 0.2 V p-p,
RL = 150 Ω to 2.5 V
96 MHz
Bandwidth for 0.1 dB Gain Flatness ADA4891-1/ADA4891-2, G = +2, VO = 2 V p-p,
RL = 150 Ω to 2.5 V, RF = 604 Ω
25 MHz
ADA4891-3/ADA4891-4, G = +2, VO = 2 V p-p,
RL = 150 Ω to 2.5 V, RF = 374 Ω
25 MHz
Slew Rate, tR/tF G = +2, VO = 2 V step, 10% to 90% 170/210 V/µs
−3 dB Large-Signal Frequency Response G = +2, VO = 2 V p-p, RL = 150 Ω 40 MHz
Settling Time to 0.1% G = +2, VO = 2 V step 28 ns
NOISE/DISTORTION PERFORMANCE
Harmonic Distortion, HD2/HD3 fC = 1 MHz, VO = 2 V p-p, G = +1 −79/−93 dBc
fC = 1 MHz, VO = 2 V p-p, G = −1 −75/−91 dBc
Input Voltage Noise f = 1 MHz 9 nV/√Hz
Differential Gain Error (NTSC) G = +2, RL = 150 Ω to 2.5 V 0.05 %
Differential Phase Error (NTSC) G = +2, RL = 150 Ω to 2.5 V 0.25 Degrees
All-Hostile Crosstalk f = 5 MHz, G = +2, VO = 2 V p-p −80 dB
DC PERFORMANCE
Input Offset Voltage ±2.5 ±10 mV
TMIN to TMAX ±3.1 mV
W grade only, TMIN to TMAX ±3.1 ±16 mV
Offset Drift 6 µV/°C
Input Bias Current −50 +2 +50 pA
W grade only, TMIN to TMAX −50 +50 nA
Open-Loop Gain RL = 1 kΩ to 2.5 V 77 83 dB
W grade only, TMIN to TMAX, RL = 1 kΩ to 2.5 V 66 dB
RL = 150 Ω to 2.5 V 71 dB
INPUT CHARACTERISTICS
Input Resistance
5
GΩ
Input Capacitance 3.2 pF
Input Common-Mode Voltage Range −VS − 0.3 to
+VS − 0.8
V
Common-Mode Rejection Ratio (CMRR) VCM = 0 V to 3.0 V 88 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing RL = 1 kΩ to 2.5 V 0.01 to 4.98 V
RL = 150 Ω to 2.5 V 0.08 to 4.90 V
Output Current 1% THD with 1 MHz, VO = 2 V p-p 125 mA
Short-Circuit Current
Sourcing 205 mA
Sinking 307 mA
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 5 of 24
Parameter Test Conditions/Comments Min Typ Max Unit
POWER-DOWN PINS (PD1, PD2, PD3) ADA4891-3, ADA4891-3W only
Threshold Voltage, VTH 2.4 V
Bias Current Device enabled 65 nA
Device powered down −22 µA
Turn-On Time Device enabled, output rises to 90% of final value 166 ns
Turn-Off Time Device powered down, output falls to 10% of
final value
49 ns
POWER SUPPLY
Operating Range 2.7 5.5 V
Quiescent Current per Amplifier 4.4 mA
Supply Current When Powered Down ADA4891-3, ADA4891-3W only 0.8 mA
Power Supply Rejection Ratio (PSRR)
Positive PSRR +VS = 5 V to 5.25 V, −VS = 0 V 65 dB
Negative PSRR +VS = 5 V, −VS = −0.25 V to 0 V 63 dB
OPERATING TEMPERATURE RANGE −40 +125 °C
3 V OPERATION
TA = 25°C, VS = 3 V, R L = 1 kΩ to 1. 5 V, unless otherwise noted. All specifications are for the ADA4891-1, ADA4891-2, ADA4891-3, and
ADA4891-4, unless otherwise noted. For the ADA4891-1 and ADA4891-2, RF = 604 Ω; for the ADA4891-3 and ADA4891-4, RF = 453 Ω,
unless otherwise noted.
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small-Signal Bandwidth ADA4891-1/ADA4891-2, G = +1, VO = 0.2 V p-p 190 MHz
ADA4891-3/ADA4891-4, G = +1, VO = 0.2 V p-p 175 MHz
ADA4891-1/ADA4891-2, G = +2, VO = 0.2 V p-p,
RL = 150 Ω to 1.5 V
75 MHz
ADA4891-3/ADA4891-4, G = +2, V
O
= 0.2 V p-p,
RL = 150 Ω to 1.5 V
80
MHz
Bandwidth for 0.1 dB Gain Flatness ADA4891-1/ADA4891-2, G = +2, VO = 2 V p-p,
RL = 150 Ω to 1.5 V, RF = 604 Ω
18 MHz
ADA4891-3/ADA4891-4, G = +2, VO = 2 V p-p,
RL = 150 Ω to 1.5 V, RF = 374 Ω
18 MHz
Slew Rate, tR/tF G = +2, VO = 2 V step, 10% to 90% 140/230 V/µs
−3 dB Large-Signal Frequency Response G = +2, VO = 2 V p-p, RL = 150 Ω 40 MHz
Settling Time to 0.1% G = +2, VO = 2 V step 30 ns
Harmonic Distortion, HD2/HD3 fC = 1 MHz, VO = 2 V p-p, G = −1 −70/−89 dBc
Input Voltage Noise f = 1 MHz 9 nV/√Hz
Differential Gain Error (NTSC) G = +2, RL = 150 Ω to 0.5 V, +VS = 2 V, −VS = −1 V 0.23 %
Differential Phase Error (NTSC) G = +2, RL = 150 Ω to 0.5 V, +VS = 2 V, −VS = −1 V 0.77 Degrees
All-Hostile Crosstalk f = 5 MHz, G = +2 −80 dB
DC PERFORMANCE
Input Offset Voltage ±2.5 ±10 mV
TMIN to TMAX ±3.1 mV
W grade only, TMIN to TMAX ±3.1 ±16 mV
Offset Drift 6 µV/°C
Input Bias Current −50 +2 +50 pA
W grade only, TMIN to TMAX −50 +50 nA
Open-Loop Gain RL = 1 kΩ to 1.5 V 72 76 dB
W grade only, T
MIN
to T
MAX
, R
L
= 1 kΩ to 1.5 V
60
dB
RL = 150 Ω to 1.5 V 65 dB
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 6 of 24
Parameter Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Input Resistance 5 GΩ
Input Capacitance 3.2 pF
Input Common-Mode Voltage Range −VS − 0.3 to
+VS − 0.8
V
Common-Mode Rejection Ratio (CMRR) VCM = 0 V to 1.5 V 87 dB
OUTPUT CHARACTERISTICS
R
L
= 1 kΩ to 1.5 V
0.01 to 2.98
V
RL = 150 Ω to 1.5 V 0.07 to 2.87 V
Output Current 1% THD with 1 MHz, VO = 2 V p-p 37 mA
Short-Circuit Current
Sourcing 80 mA
Sinking 163 mA
POWER-DOWN PINS (PD1, PD2, PD3) ADA4891-3, ADA4891-3W only
Threshold Voltage, VTH 1.3 V
Bias Current Device enabled 48 nA
Device powered down −13 µA
Turn-On Time Device enabled, output rises to 90% of final value 185 ns
Turn-Off Time Device powered down, output falls to 10% of
final value
58 ns
POWER SUPPLY
Operating Range 2.7 5.5 V
Quiescent Current per Amplifier 3.5 mA
Supply Current When Powered Down ADA4891-3, ADA4891-3W only 0.73 mA
Positive PSRR +VS = 3 V to 3.15 V, −VS = 0 V 76 dB
Negative PSRR +VS = 3 V, −VS = −0.15 V to 0 V 72 dB
OPERATING TEMPERATURE RANGE −40 +125 °C
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 7 of 24
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 6 V
Input Voltage (Common Mode)
−V
S
− 0.5 V to +V
S
Differential Input Voltage ±VS
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +125°C
Lead Temperature (Soldering, 10 sec) 300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 is limited
by the associated rise in junction temperature. The maximum
safe junction temperature for plastic encapsulated devices is
determined by the glass transition temperature of the plastic,
approximately 150°C. Temporarily exceeding this limit can
cause a shift in parametric performance due to a change in the
stresses exerted on the die by the package. Exceeding a junction
temperature of 175°C for an extended period can result in
device failure.
The still-air thermal properties of the package (θJA), the ambient
temperature (TA), and the total power dissipated in the package
(PD) can be used to determine the junction temperature of the die.
The junction temperature can be calculated as
TJ = TA + (PD × θJA) (1)
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. It can be calculated by
PD = (VT × IS) + (VS − VOUT) × (VOUT/RL) (2)
where:
VT is the total supply rail.
IS is the quiescent current.
VS is the positive supply rail.
VOUT is the output of the amplifier.
RL is the output load of the amplifier.
To ensure proper operation, it is necessary to observe the maxi-
mum power derating curves shown in Figure 6. These curves
are derived by setting TJ = 150°C in Equation 1. Figure 6 shows
the maximum safe power dissipation in the package vs. the
ambient temperature on a JEDEC standard 4-layer board.
0
0.5
1.0
2.0
1.5
–55 –35 –15 525 45 65 85 105 125
AMBIENT TEMPERAT URE ( °C)
MAXIMUM POWER DISSIPATION (W)
14-L E AD TSSOP
8-L E AD SOI C_N
14-L E AD SOI C_N
5-L E AD SOT - 23
8-LEAD MSOP
T
J
= 150° C
08054-002
Figure 6. Maximum Power Dissipation vs. Ambient Temperature
Table 4 lists the thermal resistance (θJA) for each ADA4891-1/
ADA4891-2/ADA4891-3/ADA4891-4 package.
Table 4.
Package Type θJA Unit
5-Lead SOT-23 146 °C/W
8-Lead SOIC_N 115 °C/W
8-Lead MSOP
133
°C/W
14-Lead SOIC_N 162 °C/W
14-Lead TSSOP 108 °C/W
ESD CAUTION
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 8 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, all plots are characterized for the ADA4891-1, ADA4891-2, ADA4891-3, and ADA4891-4. For the ADA4891-1 and
ADA4891-2, the typical RF value is 604 Ω. For the ADA4891-3 and ADA4891-4, the typical RF value is 453 Ω.
–10
–9
–8
–7
–6
–5
–4
–3
–2
–1
0
1
2
3
4
0.1 110 100 1k
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
VS = 5V
VOUT = 200mV p-p
RL
= 1kΩ
G = +10 G = +5
G = –1
OR +2 G = +1
08054-028
Figure 7. Small-Signal Frequency Response vs. Gain, VS = 5 V,
ADA4891-1/ADA4891-2
–15
–12
–9
–6
–3
0
3
6
0.1 110 100 1k
CLOSED-LOOP GAIN (dB)
FREQUENCY (MHz)
G = +1
VOUT = 200mV p-p
RL = 1kΩ
VS = 2.7V
V
S
= 5V
08054-029
V
S
= 3V
Figure 8. Small-Signal Frequency Response vs. Supply Voltage,
ADA4891-1/ADA4891-2
–4
–3
–2
–1
0
1
2
3
4
5
0.1 110 100 1k
CLOSED-LOOP GAIN (dB)
FREQUENCY (MHz)
V
S
= 5V
G = +1
V
OUT
= 200mV p - p
R
L
= 1kΩ
08054-030
+125°C
+85°C +25°C
0°C
–40°C
Figure 9. Small-Signal Frequency Response vs. Temperature, VS = 5 V,
ADA4891-1/ADA4891-2
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
0.1 110 100 1k
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAIN (dB)
08054-076
G = +10
G = +5
G = +1
G = –1 OR +2
V
S
= 5V
V
OUT
= 200mV p - p
R
L
= 1kΩ
Figure 10. Small-Signal Frequency Response vs. Gain, VS = 5 V,
ADA4891-3/ADA4891-4
6
3
0
–3
–6
–9
–12
–15
0.1 110 100 1k
FREQUENCY (MHz)
CLOSED-LOOP GAIN (dB)
08054-077
V
S
= 2.7V
G = +1
V
OUT
= 200mV p - p
R
L
= 1kΩ
V
S
= 3V
V
S
= 5V
Figure 11. Small-Signal Frequency Response vs. Supply Voltage,
ADA4891-3/ADA4891-4
–4
–3
–2
–1
0
1
2
3
4
5
0.1 110 100 1k
FREQUENCY (MHz)
CLOSED-LOOP GAIN (dB)
08054-078
VS = 5V
G = +1
VOUT = 200mV p-p
RL = 1kΩ
+125°C
+85°C
+25°C
0°C
–40°C
Figure 12. Small-Signal Frequency Response vs. Temperature, VS = 5 V,
ADA4891-3/ADA4891-4
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 9 of 24
CLOSED-LOOP GAIN (dB)
FREQUENCY (MHz)
–6
–5
–4
–3
–2
–1
0
3
4
5
6
1
2
7
0.1 110 100 1k
+125°C
+25°C
0°C
–40°C
V
S
= 3V
G = +1
V
OUT
= 200mV p - p
R
L
= 1kΩ
08054-031
+85°C
Figure 13. Small-Signal Frequency Response vs. Temperature, VS = 3 V,
ADA4891-1/ADA4891-2
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
10.1 10 100
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAI N ( dB)
G = +2
R
F
= 604Ω
R
L
= 150Ω
V
S
= 3V
V
OUT
= 2V p-p
V
S
= 5V
V
OUT
= 1.4V p-p
V
S
= 3V
V
OUT
= 1.4V p-p
08054-019
V
S
= 5V
V
OUT
= 2V p-p
Figure 14. 0.1 dB Gain Flatness vs. Supply Voltage, G = +2,
ADA4891-1/ADA4891-2
–10
–9
–8
–7
–6
–5
–4
–3
–2
–1
0
1
0.1 110 100 1k
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
VS = 5V
RL = 150Ω
G = +1
VOUT = 1V p-p
G = –1
VOUT = 2V p-p
G = +2
VOUT = 2V p-p
G = +5
VOUT = 2V p-p
08054-036
Figure 15. Large-Signal Frequency Response vs. Gain, VS = 5 V,
ADA4891-1/ADA4891-2
CLOSED-LOOP GAIN (dB)
FREQUENCY (MHz)
–6
–5
–4
–3
–2
–1
0
3
4
5
6
1
2
7
0.1 110 100 1k
V
S
= 3V
G = +1
V
OUT
= 200mV p - p
R
L
= 1kΩ
08054-079
+125°C
+85°C
+25°C
0°C
–40°C
Figure 16. Small-Signal Frequency Response vs. Temperature, VS = 3 V,
ADA4891-3/ADA4891-4
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0.1 110 100
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAIN (dB)
08054-080
V
S
= 3V
V
OUT
= 1.4V p-p
V
S
= 3V
V
OUT
= 2V p-p
V
S
= 5V
V
OUT
= 2V p-p
G = +2
R
F
= 374Ω
R
L
= 150Ω
V
S
= 5V
V
OUT
= 1.4V p-p
Figure 17. 0.1 dB Gain Flatness vs. Supply Voltage, G = +2,
ADA4891-3/ADA4891-4
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
0.1 110 100 1k
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAIN (dB)
08054-081
V
S
= 5V
R
L
= 150Ω
G = +1
V
OUT
= 1V p-p
G = –1
V
OUT
= 2V p-p
G = +5
V
OUT
= 2V p-p
G = +2
V
OUT
= 2V p-p
Figure 18. Large-Signal Frequency Response vs. Gain, VS = 5 V,
ADA4891-3/ADA4891-4
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 10 of 24
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
0.1 110 100 1k
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAIN (dB)
08054-037
V
S
= 3V
R
L
= 150Ω
G = –1
V
OUT
= 2V p-p
G = +2
V
OUT
= 2V p-p G = +1
V
OUT
= 1V p-p
G = +5
V
OUT
= 2V p-p
Figure 19. Large-Signal Frequency Response vs. Gain, VS = 3 V,
ADA4891-1/ADA4891-2
–120
–110
–100
–90
–80
–70
–60
–50
–40
0.1 110
DISTORTION (dBc)
FREQUENCY (MHz)
V
S
= 5V
R
L
= 1kΩ
V
OUT
= 2V p-p G = +2
SECO ND HARM ONI C
G = +1
SECO ND HARM ONI C
G = +1
THI RD HARMONIC
G = +2
THI RD HARMONIC
08054-038
Figure 20. Harmonic Distortion (HD2, HD3) vs. Frequency, VS = 5 V
–120
–110
–100
–90
–80
–70
–60
–50
–40
00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
DISTORTION (dBc)
OUTPUT VOLTAGE (V p-p)
G = +1
THIRD HARMO NIC
V
S
= 5V
R
L
= 1kΩ
f
C
= 1MHz
G = –1
THIRD HARMO NIC
G = –1
SECO ND HARM ONI C
G = +1
SECO ND HARM ONI C
08054-040
Figure 21. Harmonic Distortion (HD2, HD3) vs. Output Voltage, VS = 5 V
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
0.1 110 100 1k
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAIN (dB)
08054-082
V
S
= 3V
R
L
= 150Ω
G = +2
V
OUT
= 2V p-p
G = –1
V
OUT
= 2V p-p
G = +5
V
OUT
= 2V p-p
G = +1
V
OUT
= 1V p-p
Figure 22. Large-Signal Frequency Response vs. Gain, VS = 3 V,
ADA4891-3/ADA4891-4
–90
–80
–70
–60
–50
–40
–30
0.1 110
DISTORTION (dBc)
FREQUENCY (MHz)
G = +1
SECO ND HARM ONI C
G = +1
THIRD HARMO NIC
G = +2
SECO ND HARM ONI C
V
S
= 3V
R
L
= 1kΩ
V
OUT
= 2V p-p
OUT
IN
+V
S
= +1. 9V
–V
S
= –1.1V
G = +1 CONFIGURATION
1kΩ
50Ω
G = +2
THIRD HARMO NIC
08054-039
Figure 23. Harmonic Distortion (HD2, HD3) vs. Frequency, VS = 3 V
–120
–110
–100
–90
–80
–70
–60
–50
–40
0
0.5 1.0 1.5 2.0 2.5 3.0
DISTORTION (dBc)
OUTPUT VOLTAGE (V p-p)
V
S
= 3V
f
C
= 1MHz
G = –1
SECO ND HARM ONI C G = –1
THI RD HARMONIC
G = +1
THIRD HARMO NIC
G = +1
SECO ND HARM ONI C
08054-041
OUT
IN
+V
S
= +1. 9V
–V
S
= –1.1V
1kΩ
50Ω
G = +1
CONFIGURATION
Figure 24. Harmonic Distortion (HD2, HD3) vs. Output Voltage, VS = 3 V
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 11 of 24
–100
–90
–80
–70
–60
–50
–40
00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
DISTORTION (dBc)
OUTPUT VOLTAGE (V p-p)
VS = 5V
SECO ND HARM ONI C
VS = 5V
THIRD HARMO NIC
VS = 3V
SECO ND HARM ONI C VS = 3V
THIRD HARMO NIC
G = +2
RL = 150Ω
fC = 1MHz
08054-042
Figure 25. Harmonic Distortion (HD2, HD3) vs. Output Voltage, G = +2
–180
–162
–144
–126
–108
–90
–72
–54
–36
–18
0
GAIN
PHASE
–10
0
10
20
30
40
50
60
70
80
90
0.001 0.01 0.1 110 100 1k
OPEN-LOOP GAIN ( dB)
PHASE ( Degrees)
FREQUENCY (MHz)
VS = 5V
RL = 1kΩ
08054-043
Figure 26. Open-Loop Gain and Phase vs. Frequency
5
6
7
4
3
2
1
0
–1
–2
–3
–4
0.1 110 100 1k
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAIN (dB)
08054-044
VS = 5V
G = +2
RL = 150Ω
VOUT = 200mV p-p
CL = 47pF
CL = 22pF
CL = 10pF
CL = 0pF
Figure 27. Small-Signal Frequency Response vs. CL,
ADA4891-1/ADA4891-2
1
10
100
1k
10 100
VOLTAGE NOISE (nV/ Hz)
FREQUENCY (Hz)
1k 10k 100k 1M 10M
V
S
= 5V
G = +1
08054-045
Figure 28. Input Voltage Noise vs. Frequency
0.06
–0.06
0.04
0.02
0
–0.04
–0.02
0.2
0.1
0
–0.1
–0.2
–0.3
0.3
MODULATING RAMP LEVEL (IRE)
DIFFERENTIAL
GAI N E RROR (%)
DIFFERENTIAL
PHASE E RROR (Degrees)
V
S
= 5V, G = +2
R
L
= 150Ω
V
S
= 5V, G = +2
R
L
= 150Ω
1
ST
2
ND
3
RD
4
TH
5
TH
6
TH
7
TH
8
TH
9
TH
10
TH
1
ST
2
ND
3
RD
4
TH
5
TH
6
TH
7
TH
8
TH
9
TH
10
TH
08054-060
Figure 29. Differential Gain and Phase Errors
5
6
7
4
3
2
1
0
–1
–2
–3
–4
0.1 110 100 1k
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAIN (dB)
08054-083
VS = 5V
G = +2
RL = 150Ω
VOUT = 200mV p-p
CL = 47pF
CL = 22pF
CL = 10pF
CL = 0pF
Figure 30. Small-Signal Frequency Response vs. CL,
ADA4891-3/ADA4891-4
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 12 of 24
0.01
0.1
1
10
100
0.01 0.1 1 10 100
FREQUENCY (MHz)
V
S
= 5V
G = +1
OUTPUT IMPEDANCE (Ω)
08054-046
Figure 31. Closed-Loop Output Impedance vs. Frequency, Device Enabled
OUTPUT VOLTAGE (mV)
100
0
–100
G = +1
V
OUT
= 200mV p-p
R
L
= 1kΩ
V
S
= 3V
08054-048
V
S
= 5V
50mV/DIV 10ns/DIV
Figure 32. Small-Signal Step Response, G = +1
OUTPUT VOLTAGE (V)
1
0
–1
V
S
= 5V
G = +1
V
OUT
= 2V p-p
R
L
= 150Ω
R
L
= 1kΩ
08054-049
0.5V/DIV 10ns/DIV
Figure 33. Large-Signal Step Response, VS = 5 V, G = +1
100k
10k
1k
100
10
1
0.01 0.1 1 10 100
OUTPUT IMPEDANCE (Ω)
FREQUENCY (MHz)
08054-089
V
S
= 5V
G = +1
Figure 34. Closed-Loop Output Impedance vs. Frequency, Device Disabled
(ADA4891-3 Only)
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
10 20 30 40 50 60 70 80 90
TIME (ns)
OUTPUT VOLTAGE (V)
08054-047
V
S
= 5V
R
L
= 1kΩ
V
S
= 5V
R
L
= 150ΩV
S
= 3V
R
L
= 150Ω
V
S
= 3V
R
L
= 1kΩ
G = +2
V
OUT
= 2V p-p
Figure 35. Large-Signal Step Response, G = +2
0.5
0
–0.5
OUTPUT VOL
T
AGE (V)
R
L
= 150Ω
R
L
= 1kΩ
V
S
= 3V
G = +1
V
OUT
= 1V p-p
08054-050
0.5V/DIV 10ns/DIV
Figure 36. Large-Signal Step Response, VS = 3 V, G = +1
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 13 of 24
–0.30 025 30T I ME (n s)35 40 45
–0.20
–0.10
0
0.10
0.20
0.3
0
SETTLING (%)
V
S
= 5V
G = +2
R
L
=150Ω
V
OUT
= 2Vp-p
08054-061
Figure 37. Short-Term Settling Time to 0.1%
08054-071
–1
0
1
2
3
AMPLITUDE (V)
5ns/DIV
1V/DIV
INPUT VS = ± 2.5V
G = +1
RL = 1kΩ
OUTPUT
Figure 38. Input Overdrive Recovery from Positive Rail
08054-070
–3
–2
–1
0
1
2
3
AMPLITUDE (V)
INPUT
OUTPUT VS = ±2.5V
G = –2
RL = 1kΩ
1V/DIV 5ns/DIV
Figure 39. Output Overdrive Recovery from Positive Rail
140
150
160
170
180
190
200
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
SLEW RATE (V/µs)
OUTPUT STE
P (V)
RISING EDGE
FALLING EDGE
VS = 5V
G = +2
RL = 150Ω
08054-051
Figure 40. Slew Rate vs. Output Step
08054-063
–3
–2
–1
0
1
AMPLITUDE (V)
INPUT
OUTPUT
V
S
= ±2. 5V
G = +1
R
L
= 1kΩ
1V/DIV 5ns/DIV
Figure 41. Input Overdrive Recovery from Negative Rail
08054-052
–3
–2
–1
0
1
2
3
AMPLITUDE (V)
OUTPUT
V
S
= ±2. 5V
G = –2
R
L
= 1kΩ
INPUT
1V/DIV 5ns/DIV
Figure 42. Output Overdrive Recovery from Negative Rail
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 14 of 24
–10
–20
–30
–90
–80
–70
–60
–50
–40
0.01 0.1 110 100
CMRR (dB)
FREQUENCY (MHz)
08054-090
VS = 5V
Figure 43. CMRR vs. Frequency
–80
–70
–60
–50
–40
–30
–20
–10
0.01 0.1 110 100
PSRR (dB)
FREQUENCY (MHz)
+PSRR
–PSRR
Vs = 5V
G = +1
08054-054
Figure 44. PSRR vs. Frequency
08054-072
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0.1 110 100 1k
CROSSTALK ( dB)
FREQUENCY (MHz)
Vs = 5V
G = +2
R
L
= 1 kΩ
V
OUT
= 2V p-p
Figure 45. All-Hostile Crosstalk (Output-to-Output) vs. Frequency
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0.1 110 100 1k
FREQUENCY (MHz)
ISOLATION (dB)
08054-084
TSSOP
SOIC
V
S
= 5V
G = +2
R
L
= 150Ω
Figure 46. Forward Isolation vs. Frequency (ADA4891-3 Only)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
010 20 30 40 50 60 70 80 90 100
OUTPUT SATURATION VOLTAGE (V)
V
OH
, +125°C
V
OH
, +25 °C
V
OH
, –40 °C
V
OL
, +125°C
V
OL
, +25 °C
V
OL
, –40 °C
I
LOAD
(mA)
V
S
= 5V
G = –2
08054-056
Figure 47. Output Saturation Voltage vs. Load Current and Temperature
3.0
3.5
4.0
4.5
5.0
5.5
6.0
–40 –20 020 40 60 80 100 120
QUI E S CE NT SUP P LY CURRENT (mA)
V
S
= 5V
TEMPERATURE (ºC)
08054-057
Figure 48. Supply Current per Amplifier vs. Temperature
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 15 of 24
3.0
3.2
3.4
3.6
3.8
4.0
4.2
4.4
2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8
QUIESCENT SUPPLY CURRENT (mA)
SUPPLY VOLTAGE (V)
08054-058
Figure 49. Supply Current per Amplifier vs. Supply Voltage
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 16 of 24
APPLICATIONS INFORMATION
USING THE ADA4891-1/ADA4891-2/ADA4891-3/
ADA4891-4
Understanding the subtleties of the ADA4891-1/ADA4891-2/
ADA4891-3/ADA4891-4 family of amplifiers provides insight
into how to extract the peak performance from the device. The
following sections describe the effect of gain, component values,
and parasitics on the performance of the ADA4891-1/ADA4891-2/
ADA4891-3/ADA4891-4. The wideband, noninverting gain
configuration of the ADA4891-1/ADA4891-2/ADA4891-3/
ADA4891-4 is shown in Figure 50; the wideband, inverting gain
configuration of the ADA4891-1/ADA4891-2/ADA4891-3/
ADA4891-4 is shown in Figure 51.
WIDEBAND, NONINVERTING GAIN OPERATION
08054-023
ADA4891
R
F
R
G
R
T
50Ω
SOURCE
R
L
+V
S
–V
S
10µF
0.1µF
V
I
V
O
10µF
0.1µF
Figure 50. Noninverting Gain Configuration
In Figure 50, RF and RG denote the feedback and gain resistors,
respectively. Together, RF and RG determine the noise gain of the
amplifier. The value of RF defines the 0.1 dB bandwidth (for
more information, see the Effect of RF on 0.1 dB Gain Flatness
section). Typical RF values range from 549 Ω to 698 Ω for the
ADA4891-1/ADA4891-2. Typical RF values range from 301 Ω
to 453 Ω for the ADA4891-3/ADA4891-4.
In a controlled impedance signal path, RT is used as the input
termination resistor designed to match the input source imped-
ance. Note that RT is not required for normal operation. RT is
generally set to match the input source impedance.
WIDEBAND, INVERTING GAIN OPERATION
08054-024
ADA4891
R
F
R
T
R
G
50Ω
SOURCE
R
L
+V
S
–V
S
V
I
V
O
10µF
0.1µF
10µF
0.1µF
Figure 51. Inverting Gain Configuration
Figure 51 shows the inverting gain configuration. For the
inverting gain configuration, set the parallel combination of
RT and RG to match the input source impedance.
Note that a bias current cancellation resistor is not required in
the noninverting input of the amplifier because the input bias
current of the ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
is very low (less than 2 pA). Therefore, the dc errors caused by
the bias current are negligible.
For both noninverting and inverting gain configurations, it is
often useful to increase the RF value to decrease the load on the
output. Increasing the RF value improves harmonic distortion at
the expense of reducing the 0.1 dB bandwidth of the amplifier.
This effect is discussed further in the Effect of RF on 0.1 dB Gain
Flatness section.
RECOMMENDED VALUES
Table 5 and Table 6 provide a quick reference for various configu-
rations and show the effect of gain on the −3 dB small-signal
bandwidth, slew rate, and peaking of the ADA4891-1/ADA4891-2/
ADA4891-3/ADA4891-4. Note that as the gain increases, the
small-signal bandwidth decreases, as is expected from the gain
bandwidth product relationship. In addition, the phase margin
improves with higher gains, and the amplifier becomes more
stable. As a result, the peaking in the frequency response is
reduced (see Figure 7 and Figure 10).
Table 5. Recommended Component Values and Effect of Gain on ADA4891-1/ADA4891-2 Performance (RL = 1 kΩ)
Feedback Network Values −3 dB Small-Signal Bandwidth (MHz) Slew Rate (V/µs)
Peaking (dB)
Gain RF (Ω) RG (Ω) VOUT = 200 mV p-p tR tF
−1 604 604 118 188 192 1.3
+1 0 Open 240 154 263 2.6
+2 604 604 120 170 210 1.4
+5 604 151 32.5 149 154 0
+10 604 67.1 12.7 71 72 0
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 17 of 24
Table 6. Recommended Component Values and Effect of Gain on ADA4891-3/ADA4891-4 Performance (RL = 1 kΩ)
Feedback Network Values −3 dB Small-Signal Bandwidth (MHz) Slew Rate (V/µs)
Peaking (dB)
Gain RF (Ω) RG (Ω) VOUT = 200 mV p-p tR tF
−1 453 453 97 186 194 0.9
+1 0 Open 220 151 262 4.1
+2 453 453 97 181 223 0.9
+5 453 90.6 31 112 120 0
+10 453 45.3 13 68 67 0
EFFECT OF RF ON 0.1 dB GAIN FLATNESS
Gain flatness is an important specification in video applications.
It represents the maximum allowable deviation in the signal
amplitude within the pass band. Tests have revealed that the
human eye is unable to distinguish brightness variations of
less than 1%, which translates into a 0.1 dB signal drop within
the pass band or, put simply, 0.1 dB gain flatness.
The PCB layout configuration and bond pads of the chip often
contribute to stray capacitance. The stray capacitance at the
inverting input forms a pole with the feedback and gain resistors.
This additional pole adds phase shift and reduces phase margin
in the closed-loop phase response, causing instability in the
amplifier and peaking in the frequency response.
Figure 52 and Figure 53 show the effect of using various values
for Feedback Resistor RF on the 0.1 dB gain flatness of the devices.
Figure 52 shows the effect for the ADA4891-1/ADA4891-2.
Figure 53 show the effect for the ADA4891-3/ADA4891-4.
Note that a larger RF value causes more peaking because the
additional pole formed by RF and the input stray capacitance
shifts down in frequency and interacts significantly with the
internal poles of the amplifier.
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
10.1 10 100
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAI N ( dB)
V
S
= 5V
G = +2
V
OUT
= 2V p-p
R
L
= 150Ω
R
G
= R
F
= 604Ω
R
G
= R
F
= 549Ω
R
G
= R
F
= 649Ω
R
G
= R
F
= 698Ω
08054-022
Figure 52. 0.1 dB Gain Flatness, Noninverting Gain Configuration,
ADA4891-1/ADA4891-2
–0.4
–0.5
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
10.1 10 100
FREQUENCY (MHz)
NORMALIZED CLOSED-LOOP GAI N ( dB)
08054-085
V
S
= 5V
G = +2
V
OUT
= 2V p-p
R
L
= 150Ω
R
G
= R
F
= 453Ω
R
G
= R
F
= 402Ω
R
G
= R
F
= 357Ω
R
G
= R
F
= 301Ω
Figure 53. 0.1 dB Gain Flatness, Noninverting Gain Configuration,
ADA4891-3/ADA4891-4
To obtain the desired 0.1 dB bandwidth, adjust the feedback
resistor, RF, as shown in Figure 52 and Figure 53. If RF cannot
be adjusted, a small capacitor can be placed in parallel with RF
to reduce peaking.
The feedback capacitor, CF, forms a zero with the feedback
resistor, which cancels out the pole formed by the input stray
capacitance and the gain and feedback resistors. For a first pass
in determining the CF value, use the following equation:
RG × CS = RF × CF
where:
RG is the gain resistor.
CS is the input stray capacitance.
RF is the feedback resistor.
CF is the feedback capacitor.
Using this equation, the original closed-loop frequency response of
the amplifier is restored, as if there is no stray input capacitance.
Most often, however, the value of CF is determined empirically.
Figure 54 shows the effect of using various values for the feedback
capacitor to reduce peaking. In this case, the ADA4891-1/
ADA4891-2 are used for demonstration purposes and RF = RG =
604 Ω. The input stray capacitance, together with the board
parasitics, is approximately 2 pF.
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 18 of 24
08054-025
–0.3
–0.2
–0.1
0
0.1
0.2
0.1 1 10 100
NORMALIZED CLOSED-LOOP GAIN (dB)
FREQUENCY (MHz)
C
F
= 3.3pF
C
F
= 0pF
C
F
= 1pF
V
S
= 5V
G = +2
R
F
= 604Ω
R
L
= 150Ω
V
OUT
= 2V p-p
Figure 54. 0.1 dB Gain Flatness vs. CF, VS = 5 V,
ADA4891-1/ADA4891-2
DRIVING CAPACITIVE LOADS
A highly capacitive load reacts with the output impedance of
the amplifiers, causing a loss of phase margin and subsequent
peaking or even oscillation. The ADA4891-1/ADA4891-2 are
used to demonstrate this effect (see Figure 55 and Figure 56).
–10
–8
–6
–4
–2
0
2
4
6
8
0.1 1 10 100
MAGNITUDE (dB)
FREQUENCY (MHz)
V
S
= 5V
V
OUT
= 200mV p-p
G = +1
R
L
= 1kΩ
C
L
= 6.8pF
08054-032
Figure 55. Closed-Loop Frequency Response, CL = 6.8 pF,
ADA4891-1/ADA4891-2
OUTPUT VOLTAGE (mV)
50ns/DIV50mV/DIV
V
S
= 5V
G = +1
R
L
= 1kΩ
C
L
= 6.8pF
0
100
–100
08054-034
Figure 56. 200 mV Step Response, CL = 6.8 pF,
ADA4891-1/ADA4891-2
These four methods minimize the output capacitive loading effect.
Reducing the output resistive load. This pushes the pole
further away and, therefore, improves the phase margin.
Increasing the phase margin with higher noise gains. As
the closed-loop gain is increased, the larger phase margin
allows for large capacitive loads with less peaking.
Adding a parallel capacitor (CF) with RF, from −IN to the
output. This adds a zero in the closed-loop frequency
response, which tends to cancel out the pole formed by the
capacitive load and the output impedance of the amplifier.
See the Effect of RF on 0.1 DB Gain Flatness section for
more information.
Placing a small value resistor (RS) in series with the output
to isolate the load capacitor from the output stage of the
amplifier.
Figure 57 shows the effect of using a snub resistor (RS) on reducing
the peaking in the worst-case frequency response (gain of +1).
Using RS = 100 Ω reduces the peaking by 3 dB, with the trade-off
that the closed-loop gain is reduced by 0.9 dB due to attenuation
at the output. RS can be adjusted from 0 Ω to 100 Ω to maintain
an acceptable level of peaking and closed-loop gain, as shown in
Figure 57.
MAGNITUDE (dB)
–10
–8
–6
–4
–2
0
2
4
6
8
0.1 1 10 100
FREQUENCY (MHz)
V
S
= 5V
V
OUT
= 200mV p-p
G = +1
R
L
= 1kΩ
C
L
= 6.8pF
R
S
= 0Ω
R
S
= 100Ω
50Ω
R
L
R
S
C
L
OUT
V
IN
200mV
STEP
08054-033
Figure 57. Closed-Loop Frequency Response with Snub Resistor, CL = 6.8 pF
Figure 58 shows that the transient response is also much improved
by the snub resistor (RS = 100 Ω) compared to that of Figure 56.
VS = 5V
G = +1
RL = 1kΩ
CL = 6.8pF
RS = 100Ω
08054-035
50ns/DIV50mV/DIV
OUTPUT VOLTAGE (mV)
0
100
–100
Figure 58. 200 mV Step Response, CL = 6.8 pF, RS = 100 Ω
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 19 of 24
TERMINATING UNUSED AMPLIFIERS
Terminating unused amplifiers in a multiamplifier package is
an important step in ensuring proper operation of the functional
amplifier. Unterminated amplifiers can oscillate and draw
excessive power. The recommended procedure for terminating
unused amplifiers is to connect any unused amplifiers in a
unity-gain configuration and to connect the noninverting input
to midsupply voltage. With symmetrical bipolar power supplies,
this means connecting the noninverting input to ground, as
shown in Figure 59.
08054-064
–V
S
+
V
S
ADA4891
Figure 59. Terminating Unused Amplifier with
Symmetrical Bipolar Power Supplies
In single power supply applications, a synthetic midsupply
source must be created. This can be accomplished with a simple
resistive voltage divider. Figure 60 shows the proper connection
for terminating an unused amplifier in a single-supply
configuration.
08054-065
2
.5k
Ω
2
.5k
Ω
+
V
S
ADA4891
Figure 60. Terminating Unused Amplifier with Single Power Supply
DISABLE FEATURE (ADA4891-3 ONLY)
The ADA4891-3 includes a power-down feature that can be
used to save power when an amplifier is not in use. When an
amplifier is powered down, its output goes to a high impedance
state. The output impedance decreases as frequency increases;
this effect can be observed in Figure 34. With the power-down
function, a forward isolation of −40 dB can be achieved at
50 MHz. Figure 46 shows the forward isolation vs. frequency
data. The power-down feature is asserted by pulling the PD1,
PD2, or PD3 pin low.
Table 7 summarizes the operation of the power-down feature.
Table 7. Disable Function
Power-Down Pin Connection (PDx) Amplifier Status
>VTH or floating Enabled
<VTH Disabled
SINGLE-SUPPLY OPERATION
The ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 can also
be operated from a single power supply. Figure 61 shows the
ADA4891-3 configured as a single 5 V supply video driver.
The input signal is ac-coupled into the amplifier via
Capacitor C1.
Resistor R2 and Resistor R4 establish the input midsupply
reference for the amplifier.
Capacitor C5 prevents constant current from being drawn
through the gain set resistor (RG) and enables the ADA4891-3
at dc to provide unity gain to the input midsupply voltage,
thereby establishing the output voltage at midsupply.
Capacitor C6 is the output coupling capacitor.
The large-signal frequency response obtained with single-
supply operation is identical to the bipolar supply operation
(Figure 18 shows the large-signal frequency response).
Four pairs of low frequency poles are formed by R2/2 and C2,
R3 and C1, RG and C5, and RL and C6. With this configuration,
the −3 dB cutoff frequency at low frequency is 12 Hz. The
values of C1, C2, C5, and C6 can be adjusted to change the low
frequency −3 dB cutoff point to suit individual design needs.
For more information about single-supply operation of op amps,
see the Analog Dialogue article “Avoiding Op Amp Instability
Problems in Single-Supply Applications” (Volume 35, Number 2)
at www.analog.com.
0
8054-086
C2
1µF
R2
50kΩ
R4
50kΩ
R3
100kΩ
C1
22µF
R1
50Ω
C6
22µF
R
L
150Ω
R
G
453Ω
R
F
453Ω
C5
22µF
ADA4891-3
+5V
V
OUT
V
IN
–V
S
C3
10µF
C4
0.01µF
+5
V
Figure 61. Single-Supply Video Driver Schematic
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 20 of 24
VIDEO RECONSTRUCTION FILTER
A common application for active filters is at the output of video
digital-to-analog converters (DACs)/encoders. The filter, or more
appropriately, the video reconstruction filter, is used at the output
of a video DAC/encoder to eliminate the multiple images that
are created during the sampling process within the DAC. For
portable video applications, the ADA4891-1/ADA4891-2/
ADA4891-3/ADA4891-4 is an ideal choice due to its lower
power requirements and high performance.
For active filters, a good rule of thumb is that the −3 dB band-
width of the amplifiers be at least 10 times higher than the corner
frequency of the filter. This ensures that no initial roll-off is
introduced by the amplifier and that the pass band is flat until
the cutoff frequency.
An example of a 15 MHz, 3-pole, Sallen-Key, low-pass video
reconstruction filter is shown in Figure 62. This circuit features
a gain of +2, a 0.1 dB bandwidth of 7.3 MHz, and over 17 dB
attenuation at 29.7 MHz (see Figure 63). The filter has three
poles: two poles are active, with a third passive pole (R6 and C4)
placed at the output. C3 improves the filter roll-off. R6, R7, and
R8 make up the video load of 150 Ω. Components R6, C4, R7,
R8, and the input termination of the network analyzer form a
6 dB attenuator; therefore, the reference level is roughly 0 dB,
as shown in Figure 63.
R2
47Ω
VIN
R3
125ΩR6
6.8Ω
+5V R7
68.1Ω
R1 C1
51pF
C3
15pF
C4
1nF
R4
1kΩ
R5
1kΩ
R8
75Ω
VOUT
C2
51pF
08054-062
Figure 62. 15 MHz Video Reconstruction Filter Schematic
–39
–36
–33
–30
–27
–24
–21
–18
–15
–12
–9
–6
–3
0
0.03 0.1 110 100
MAG NI TUDE ( dB)
FREQUENCY (MHz)
08054-059
Figure 63. Video Reconstruction Filter Frequency Performance
MULTIPLEXER
The ADA4891-3 has a disable pin used to power down the
amplifier to save power or to create a mux circuit. If two or
more ADA4891-3 outputs are connected together and only one
output is enabled, then only the signal of the enabled amplifier
appears at the output. This configuration is used to select from
various input signal sources. Additionally, the same input signal
is applied to different gain stages, or differently tuned filters, to
make a gain-step amplifier or a selectable frequency amplifier.
Figure 64 shows a schematic of two ADA4891-3 devices used
to create a mux that selects between two inputs. One input is a
1 V p-p, 3 MHz sine wave; the other input is a 2 V p-p, 1 MHz
sine wave.
49.9Ω
453Ω
+2.5V
–2.5V
+2.5V
–2.5V
49.9Ω
49.9Ω
49.9Ω
1V p-p
3MHz
2V p-p
1MHz
VOUT
SELECT
HCO4
453Ω
453Ω
10µF
0.1µF
10µF
0.1µF
49.9Ω
453Ω
10µF
0.1µF
10µF
0.1µF
08054-087
ADA4891-3
ADA4891-3
Figure 64. Two-to-One Multiplexer Using Two ADA4891-3 Devices
The select signal and the output waveforms for this circuit are
shown in Figure 65.
1µs/DIV1V/DIV
1µs/DIV5V/DIV
SELECT
OUTPUT
08054-088
Figure 65. ADA4891-3 Mux Output
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 21 of 24
LAYOUT, GROUNDING, AND BYPASSING
POWER SUPPLY BYPASSING
Power supply pins are additional op amp inputs, and care must
be taken so that a noise-free, stable dc voltage is applied. The
purpose of bypass capacitors is to create a low impedance path
from the supply to ground over a range of frequencies, thereby
shunting or filtering the majority of the noise to ground. Bypassing
is also critical for stability, frequency response, distortion, and
PSRR performance.
If traces are used between components and the package, chip
capacitors of 0.1 μF (X7R or NPO) are critical and should be
placed as close as possible to the amplifier package. The 0508
case size for such a capacitor is recommended because it offers
low series inductance and excellent high frequency performance.
Larger chip capacitors, such as 0.1 μF capacitors, can be shared
among a few closely spaced active components in the same
signal path. A 10 μF tantalum capacitor is less critical for high
frequency bypassing, but it provides additional bypassing for
lower frequencies.
GROUNDING
When possible, ground and power planes should be used. Ground
and power planes reduce the resistance and inductance of the
power supply feeds and ground returns. If multiple planes are
used, they should be stitched together with multiple vias. The
returns for the input, output terminations, bypass capacitors,
and RG should all be kept as close to the ADA4891-1/ADA4891-2/
ADA4891-3/ADA4891-4 as possible. Ground vias should be
placed at the side or at the very end of the component mounting
pads to provide a solid ground return. The output load ground
and the bypass capacitor grounds should be returned to a
common point on the ground plane to minimize parasitic
inductance and to help improve distortion performance.
INPUT AND OUTPUT CAPACITANCE
Parasitic capacitance can cause peaking and instability and,
therefore, should be minimized to ensure stable operation.
High speed amplifiers are sensitive to parasitic capacitance between
the inputs and ground. A few picofarads of capacitance reduce
the input impedance at high frequencies, in turn increasing the
gain of the amplifier and causing peaking of the frequency
response or even oscillations, if severe enough. It is recommended
that the external passive components that are connected to the
input pins be placed as close as possible to the inputs to avoid
parasitic capacitance.
In addition, the ground and power planes under the pins of
the ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 should be
cleared of copper to prevent parasitic capacitance between the
input and output pins to ground. This is because a single
mounting pad on a SOIC footprint can add as much as 0.2 pF of
capacitance to ground if the ground or power plane is not
cleared under the ADA4891-1/ADA4891-2/ADA4891-3/
ADA4891-4 pins. In fact, the ground and power planes should
be kept at a distance of at least 0.05 mm from the input pins on
all layers of the board.
INPUT-TO-OUTPUT COUPLING
To minimize capacitive coupling between the inputs and outputs
and to avoid any positive feedback, the input and output signal
traces should not be parallel. In addition, the input traces should
not be close to each other. A minimum of 7 mils between the
two inputs is recommended.
LEAKAGE CURRENTS
In extremely low input bias current amplifier applications, stray
leakage current paths must be kept to a minimum. Any voltage
differential between the amplifier inputs and nearby traces sets
up a leakage path through the PCB. Consider a 1 V signal and
100 GΩ to ground present at the input of the amplifier. The
resultant leakage current is 10 pA; this is 5× the typical input
bias current of the amplifier. Poor PCB layout, contamination,
and the board material can create large leakage currents. Common
contaminants on boards are skin oils, moisture, solder flux, and
cleaning agents. Therefore, it is imperative that the board be
thoroughly cleaned and that the board surface be free of
contaminants to take full advantage of the low input bias currents
of the ADA4891-1/ADA4891-2/ ADA4891-3/ADA4891-4.
To significantly reduce leakage paths, a guard ring/shield should
be used around the inputs. The guard ring circles the input pins
and is driven to the same potential as the input signal, thereby
reducing the potential difference between pins. For the guard ring
to be completely effective, it must be driven by a relatively low
impedance source and should completely surround the input
leads on all sides, above and below, using a multilayer board
(see Figure 66).
NONINVERTING
GUARD RING
INVERTING
GUARD RING
0
8054-067
Figure 66. Guard Ring Configurations
The 5-lead SOT-23 package for the ADA4891-1 presents a
challenge in keeping the leakage paths to a minimum. The
pin spacing is very tight, so extra care must be used when
constructing the guard ring (see Figure 67 for the recom-
mended guard ring construction).
08054-068
–IN
+IN
–V
S
–V
S
+V
S
+V
S
OUT ADA4891-1
NONINVERTING
–IN
+IN
OUT
ADA4891-1
INVERTING
Figure 67. Guard Ring Layout, 5-Lead SOT-23
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 22 of 24
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS;INCHDIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETEREQUIVALENTSFOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANTTOJEDECSTANDARDSMS-012-AA
012407-A
0.25(0.0098)
0.17 (0.0067)
1.27(0.0500)
0.40 (0.0157)
0.50(0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35(0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10(0.0040)
4
1
85
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80(0.1497)
1.27(0.0500)
BSC
6.20 (0.2441)
5.80(0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 68. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MO-178-AA
10°
5°
0°
SEATING
PLANE
1.90
BSC
0.95 BSC
0.60
BSC
5
1 2 3
4
3.00
2.90
2.80
3.00
2.80
2.60
1.70
1.60
1.50
1.30
1.15
0.90
0.15 MAX
0.05 MIN
1.45 MAX
0.95 MIN
0.20 MAX
0.08 MIN
0.50 MAX
0.35 MIN
0.55
0.45
0.35
11-01-2010-A
Figure 69. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Rev. F | Page 23 of 24
COM P LIANT T O JEDEC S TANDARDS M O-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 M AX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° M AX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 70. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
CONTROLLING DIMENSIONSARE IN MI LLIMET E RS ; INCH DIM E NS IONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFE RE NCE ONLY AND ARE NO T APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC S TANDARDS MS-012-AB
060606-A
14 8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COPLANARITY
0.10
8°
0°
45°
Figure 71. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
COMP LIANT TO JEDEC S TANDARDS MO-153-AB- 1
061908-A
8°
0°
4.50
4.40
4.30
14 8
7
1
6.40
BSC
PIN 1
5.10
5.00
4.90
0.65 BSC
0.15
0.05 0.30
0.19
1.20
MAX
1.05
1.00
0.80 0.20
0.09 0.75
0.60
0.45
COPLANARITY
0.10
SEATING
PLANE
Figure 72. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet
Rev. F | Page 24 of 24
ORDERING GUIDE
Model
1, 2
Temperature Range
Package Description
Package Option
Branding
ADA4891-1ARZ −40°C to +125°C 8-Lead SOIC_N R-8
ADA4891-1ARZ-RL −40°C to +125°C 8-Lead SOIC_N, 13” Tape and Reel R-8
ADA4891-1ARZ-R7 −40°C to +125°C 8-Lead SOIC_N, 7” Tape and Reel R-8
ADA4891-1ARJZ-R7 −40°C to +125°C 5-Lead SOT-23, 7” Tape and Reel RJ-5 H1W
ADA4891-1ARJZ-RL −40°C to +125°C 5-Lead SOT-23, 13” Tape and Reel RJ-5 H1W
ADA4891-1WARJZ-R7 −40°C to +125°C 5-Lead SOT-23, 7” Tape and Reel RJ-5 H2S
ADA4891-2ARZ −40°C to +125°C 8-Lead SOIC_N R-8
ADA4891-2ARZ-RL −40°C to +125°C 8-Lead SOIC_N, 13” Tape and Reel R-8
ADA4891-2ARZ-R7 −40°C to +125°C 8-Lead SOIC_N, 7” Tape and Reel R-8
ADA4891-2ARMZ
−40°C to +125°C
8-Lead MSOP
RM-8
H1U
ADA4891-2ARMZ-RL −40°C to +125°C 8-Lead MSOP, 13" Tape and Reel RM-8 H1U
ADA4891-2ARMZ-R7 −40°C to +125°C 8-Lead MSOP, 7" Tape and Reel RM-8 H1U
ADA4891-2WARMZ-R7 −40°C to +125°C 8-Lead MSOP, 7" Tape and Reel RM-8 H2T
ADA4891-3ARUZ −40°C to +125°C 14-Lead TSSOP RU-14
ADA4891-3ARUZ-R7 −40°C to +125°C 14-Lead TSSOP, 7” Tape and Reel RU-14
ADA4891-3ARUZ-RL −40°C to +125°C 14-Lead TSSOP, 13” Tape and Reel RU-14
ADA4891-3WARUZ-R7 −40°C to +125°C 14-Lead TSSOP, 7” Tape and Reel RU-14
ADA4891-3ARZ −40°C to +125°C 14-Lead SOIC_N R-14
ADA4891-3ARZ-R7 −40°C to +125°C 14-Lead SOIC_N, 7” Tape and Reel R-14
ADA4891-3ARZ-RL −40°C to +125°C 14-Lead SOIC_N, 13” Tape and Reel R-14
ADA4891-4ARUZ −40°C to +125°C 14-Lead TSSOP RU-14
ADA4891-4ARUZ-R7 −40°C to +125°C 14-Lead TSSOP, 7” Tape and Reel RU-14
ADA4891-4ARUZ-RL −40°C to +125°C 14-Lead TSSOP, 13” Tape and Reel RU-14
ADA4891-4WARUZ-R7 −40°C to +125°C 14-Lead TSSOP, 7” Tape and Reel RU-14
ADA4891-4ARZ −40°C to +125°C 14-Lead SOIC_N R-14
ADA4891-4ARZ-R7
−40°C to +125°C
14-Lead SOIC_N, 7” Tape and Reel
R-14
ADA4891-4ARZ-RL
−40°C to +125°C
14-Lead SOIC_N, 13” Tape and Reel
R-14
ADA4891-1AR-EBZ Evaluation Board for 8-Lead SOIC_N
ADA4891-1ARJ-EBZ Evaluation Board for 5-Lead SOT-23
ADA4891-2AR-EBZ Evaluation Board for 8-Lead SOIC_N
ADA4891-2ARM-EBZ Evaluation Board for 8-Lead MSOP
ADA4891-3AR-EBZ Evaluation Board for 14-Lead SOIC_N
ADA4891-3ARU-EBZ Evaluation Board for 14-Lead TSSOP
ADA4891-4AR-EBZ Evaluation Board for 14-Lead SOIC_N
ADA4891-4ARU-EBZ Evaluation Board for 14-Lead TSSOP
1 Z = RoHS Compliant Part.
2 W = Qualified for Automotive Applications.
AUTOMOTIVE PRODUCTS
The ADA4891-1W, ADA4891-2W, ADA4891-3W, and ADA4891-4W models are available with controlled manufacturing to support the
quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ
from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the
automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices, Inc., account
representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models.
©2010–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08054-0-9/15(F)