A1315LLHLX-1-T - ALLEGRO MICROSYSTEMS

DESCRIPTION

New applications for linear output Hall-effect sensors, such

as displacement and angular position, require higher accuracy

and smaller package sizes. The Allegro A1315 linear Hall-

effect sensor IC has been designed specifically to meet both

requirements. These temperature-stable devices are available

in both surface-mount and through-hole packages.

The accuracy of each device is enhanced via end-of-line

optimization. Each device features non-volatile memory to

optimize device sensitivity and the quiescent voltage output

(QVO: output in the absence of a magnetic field) for a given

application or circuit. This A1315 optimized performance

is sustained across the full operating temperature range by

programming the temperature coefficient for both sensitivity

and QVO at Allegro end-of-line test.

These ratiometric Hall-effect sensor ICs provide a voltage output

that is proportional to the applied magnetic field. The quiescent

voltage output is adjusted around 50% of the supply voltage.

The features of these linear devices make them ideal for

use in automotive and industrial applications requiring high

accuracy, and operate across an extended temperature range,

–40°C to 150°C.

Each BiCMOS monolithic circuit integrates a Hall element,

temperature-compensating circuitry to reduce the intrinsic

sensitivity drift of the Hall element, a small-signal high-gain

amplifier, a clamped low-impedance output stage, and a

proprietary dynamic offset cancellation technique.

A1315-DS, Rev. 1

MCO-0000527

FEATURES AND BENEFITS

• 3.3 V supply operation

• QVO temperature coefficient programmed at Allegro™ for

improved accuracy

• Miniature package options

• High-bandwidth, low-noise analog output

• High-speed chopping scheme minimizes QVO drift across

operating temperature range

• Temperature-stable quiescent voltage output and sensitivity

• Precise recoverability after temperature cycling

• Output voltage clamps provide short-circuit diagnostic

capabilities

• Undervoltage lockout (UVLO)

• Wide ambient temperature range: –40°C to 150°C

• Immune to mechanical stress

• Enhanced EMC performance for stringent automotive

applications

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

Continued on the next page…

Functional Block Diagram

A1315

V+

Offset and

Offset TC

Sensitivity and

Dynamic Offset

Cancellation

Tuned Filter

Sensitivity TC

VCC

CBYPASS

GND

VOUT

PACKAGES:

November 27, 2018

Not to scale

3-pin SOT23-W

2 mm × 3 mm × 1 mm

(suffix LH)

3-pin ultramini SIP,

1.5 mm × 4 mm × 3 mm

(suffix UA)

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

DESCRIPTION (CONTINUED)

ABSOLUTE MAXIMUM RATINGS

Characteristic Symbol Notes Rating Unit

Forward Supply Voltage VCC 8 V

Reverse Supply Voltage VRCC –0.1 V

Forward Output Voltage VOUT 7 V

Reverse Output Voltage VROUT –0.1 V

Output Source Current IOUT(SOURCE) VOUT to GND 2 mA

Output Sink Current IOUT(SINK) VCC to VOUT 10 mA

Operating Ambient Temperature TARange L –40 to 150 °C

Maximum Junction Temperature TJ(max) 165 °C

Storage Temperature Tstg –65 to 170 °C

The A1315 sensor IC is offered in two package styles. The LH is a

SOT-23W style, miniature, low-profile package for surface-mount

applications. The UA is a 3-pin, ultramini, single inline package

(SIP) for through-hole mounting. Both packages are lead (Pb) free,

with 100% matte-tin leadframe plating.

SELECTION GUIDE

Part Number Output

Polarity

Sensitivity

(typ) (mV/G) Packing* Package

A1315LLHLX-1-T Forward 1.35 10,000 pieces per reel 3-pin SOT-23W surface mount

A1315LLHLX-2-T Forward 2.5 10,000 pieces per reel 3-pin SOT-23W surface mount

A1315LLHLX-5-T Forward 5 10,000 pieces per reel 3-pin SOT-23W surface mount

A1315LUA-2-T Forward 2.5 500 pieces per bag 3-pin SIP through hole

A1315LUA-5-T Forward 5 500 pieces per bag 3-pin SIP through hole

*Contact Allegro™ for additional packing options

THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information

Characteristic Symbol Test Conditions Value Units

Package Thermal Resistance RθJA

Package LH, 1-layer PCB with copper limited to solder pads 228 °C/W

Package LH, 2-layer PCB with 0.463 in.

2 of copper area each

side connected by thermal vias 110 °C/W

Package UA, 1-layer PCB with copper limited to solder pads 165 °C/W

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

PINOUT DIAGRAMS AND TERMINAL LIST TABLE

2 31

Terminal List Table

Name Number Description

LH UA

VCC 1 1 Input power supply; tie to GND

with bypass capacitor

VOUT 2 3 Output signal

GND 3 2 Ground

LH Package

Pinout

UA Package

Pinout

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

OPERATING CHARACTERISTICS: Valid over TA , CBYPASS = 0.1 µF, VCC = 3.3 V, unless otherwise noted

Characteristic Symbol Test Conditions Min. Typ. Max. Unit

[1]

Continued on the next page…

ELECTRICAL CHARACTERISTICS

Supply Voltage VCC 3 3.3 3.63 V

Undervoltage Threshold

[2]

VUVLOHI

Tested at TA = 25°C and TA = 150°C (device

powers on) – – 3 V

VUVLOLO

Tested at TA = 25°C and TA = 150°C (device

powers off) 2.5 – – V

Supply Current ICC No load on VOUT – 7.7 10 mA

Power-On Time

[3][4] tPO TA = 25°C, CL(PROBE) = 10 pF – 50 – µs

VCC Ramp Time

[3][4] tVCC TA = 25°C 0.005 – 100 ms

VCC Off Level

[3][4] VCCOFF TA = 25°C 0 – 0.33 V

Delay to Clamp

[3][4] tCLP TA = 25°C, CL = 10 nF – 30 – µs

Supply Zener Clamp Voltage VZTA = 25°C, ICC = 13 mA 6 7.3 – V

Internal Bandwidth

[4] BWiSmall signal –3 dB – 20 – kHz

Chopping Frequency

[5] fCTA = 25°C – 400 – kHz

OUTPUT CHARACTERISTICS

Output Referred Noise

[4] VN

VCC = 3.3 V, TA = 25°C, CBYPASS = open,

Sens = 5 mV/G, no load on VOUT – 13 – mV(p-p)

Input Referred RMS Noise Density

[4] VNRMS

VCC = 3.3 V, TA = 25°C, CBYPASS = open,

Sens = 5 mV/G, no load on VOUT,

fmeasured << BWi

– 2.3 – mG/√Hz

DC Output Resistance

[4] ROUT – 3 – Ω

Output Load Resistance

[4] RLVOUT to GND 4.7 – – kΩ

Output Load Capacitance

[4] CLVOUT to GND – – 10 nF

Output Voltage Clamp

[6] VCLPHIGH TA = 25°C, B = +400 G, RL = 10 kΩ (VOUT to GND) 2.842 2.97 3.069 V

VCLPLOW TA = 25°C, B = –400 G, RL = 10 kΩ (VOUT to VCC) 0.264 0.33 0.462 V

Sensitivity

[7] Sens

A1315LLHLX-1-T

TA = 25°C

1.289 1.350 1.411 mV/G

A1315LLHLX-2-T 2.388 2.500 2.613 mV/G

A1315LLHLX-5-T 4.850 5.000 5.150 mV/G

A1315LUA-2-T 2.388 2.5 2.613 mV/G

A1315LUA-5-T 4.85 5 5.15 mV/G

Quiescent Voltage Output (QVO) VOUT(Q)

A1315LLHLX-1-T

TA = 25°C

1.638 1.650 1.662 V

A1315LLHLX-2-T 1.638 1.650 1.662 V

A1315LLHLX-5-T 1.635 1.650 1.665 V

A1315LUA-2-T 1.638 1.65 1.662 V

A1315LUA-5-T 1.635 1.65 1.665 V

Sensitivity Temperature Coefficient TCSens

A1315LLHLX-1-T

Programmed at TA

= 150°C, calculated

relative to Sens at 25°C

0.08 0.12 0.16 %/°C

A1315LLHLX-2-T 0.08 0.12 0.16 %/°C

A1315LLHLX-5-T 0.08 0.12 0.16 %/°C

A1315LUA-2-T 0.08 0.12 0.16 %/°C

A1315LUA-5-T 0.08 0.12 0.16 %/°C

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

OPERATING CHARACTERISTICS (continued): Valid over TA , CBYPASS = 0.1 µF, VCC = 3.3 V, unless otherwise noted

Characteristic Symbol Test Conditions Min. Typ. Max. Unit [1]

ERROR COMPONENTS

Linearity Sensitivity Error LinERR – ±1.5 – %

Symmetry Sensitivity Error SymERR – ±1.5 – %

Ratiometry Quiescent Voltage

Output Error

[8] RatVOUT(Q)

Across supply voltage range (relative to VCC =

3.3 V) – ±1.5 – %

Ratiometry Sensitivity Error

[8] RatSens

Across supply voltage range (relative to VCC =

3.3 V) – ±1.5 – %

Ratiometry Clamp Error

[9] RatVOUTCLP

TA = 25°C, across supply voltage range (relative

to VCC = 3.3 V) – ±1.5 – %

DRIFT CHARACTERISTICS

Typical Quiescent Voltage Output Drift

Across Temperature Range ∆VOUT(Q)

A1315LLHLX-1-T

TA = 150°C,

relative to TA = 25°C

–15 – 5 mV

A1315LLHLX-2-T –18 0 8 mV

A1315LLHLX-5-T –20 0 20 mV

A1315LUA-2-T –13 – 13 mV

A1315LUA-5-T –15 – 15 mV

Sensitivity Drift Due to

Package Hysteresis ∆SensPKG TA = 25°C, after temperature cycling – ±2 – %

[1] 1 G (gauss) = 0.1 mT (millitesla),

[2] On power-up, the output of the device is held low until VCC exceeds VUVLOHI. After the device is powered, the output remains valid until VCC drops

below VUVLOLO , when the output is pulled low.

[3] See the Characteristic Definitions section.

[4] Determined by design and characterization, not evaluated at final test.

[5] fC varies as much as approximately ±20% across the full operating ambient temperature range and process.

[6] VCLPLOW and VCLPHIGH scale with VCC due to ratiometry.

[7] Sensitivity drift through the life of the part, ΔSensLIFE

, can have a typical error value ±3% in addition to package hysteresis effects.

[8] Percent change from actual value at VCC = 3.3 V, for a given temperature.

[9] Percent change from actual value at VCC = 3.3 V, TA = 25°C.

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

CHARACTERISTIC DEFINITIONS

Power-On Time. When the supply is ramped to its operating

voltage, the device output requires a finite time to react to an

input magnetic field. Power-On Time, tPO , is defined as the time

it takes for the output voltage to begin responding to an applied

magnetic field after the power supply has reached its minimum

specified operating voltage, VCC(min), as shown in figure 1.

Delay to Clamp. A large magnetic input step may cause the

clamp to overshoot its steady state value. The Delay to Clamp,

tCLP , is defined as the time it takes for the output voltage to settle

within 1% of its steady state value, after initially passing through

its steady state voltage, as shown in figure 2.

Quiescent Voltage Output. In the quiescent state (no signifi-

cant magnetic field: B = 0 G), the output, VOUT(Q), is at a con-

stant ratio to the supply voltage, VCC, across the entire operating

ranges of VCC and Operating Ambient Temperature, TA.

Quiescent Voltage Output Drift Across Temperature

Range. Due to internal component tolerances and thermal

considerations, the Quiescent Voltage Output, VOUT(Q), may

drift due to temperature changes within the Operating Ambient

Temperature, TA. For purposes of specification, the Quiescent

Voltage Output Drift Across Temperature Range, ∆VOUT(Q) (mV),

is defined as:

∆VOUT(Q) VOUT(Q)(TA) –VOUT(Q)(25°C)

(1)

Sensitivity. The amount of the output voltage change is propor-

tional to the magnitude and polarity of the magnetic field applied.

This proportionality is specified as the magnetic sensitivity,

Sens (mV/G), of the device and is defined as:

OUT(B+)

– V

OUT(B–)

(B+) – (B–)

Sens = (2)

where B+ is the magnetic flux density in a positive field (south

polarity) and B– is the magnetic flux density in a negative field

(north polarity).

Sensitivity Temperature Coefficient. The device sensitiv-

ity changes as temperature changes, with respect to its Sensitiv-

ity Temperature Coefficient, TCSENS. TCSENS is programmed at

150°C, and calculated relative to the baseline sensitivity program-

ming temperature of 25°C. TCSENS is defined as:

SensT2 – SensT1

SensT1 T2–T1

TCSens =×

100 (%/°C)

























(3)

where T1 is the baseline Sens programming temperature of 25°C,

and T2 is the TCSENS programming temperature of 150°C.

The ideal value of Sens across the full ambient temperature

range, SensIDEAL(TA), is defined as:

SensT1 × [100 (%) + TCSENS (TA –T1

)]

SensIDEAL(TA) =

(4)

Sensitivity Drift Across Temperature Range. Second order

sensitivity temperature coefficient effects cause the magnetic

sensitivity, Sens, to drift from its ideal value across the operating

ambient temperature range, TA. For purposes of specification,

VCC

VCC(min)

VOUT

90% VOUT

t1= time at which power supply reaches

minimum specified operating voltage

t2=

time at which output voltage settles

within ±10% of its steady state value

under an applied magnetic field

t1t2

tPO

(typ)

time (µs)

Magnetic Input Signal

t1= time at which output voltage initially

reaches steady state clamp voltage

t2= time at which output voltage settles to

within 1% of steady state clamp voltage

CLPHIGH

t1t2

tCLP

VOUT

Device Output,

VOUT (V)

Figure 1. Definition of Power On Time, tPO

Figure 2. Definition of Delay to Clamp, tCLP

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

the Sensitivity Drift Across Temperature Range, ∆SensTC, is

defined as:

Sens

– Sens

IDEAL(TA)

SensIDEAL(TA)

∆SensTC =×

100 (%)

(5)

Sensitivity Drift Due to Package Hysteresis. Package

stress and relaxation can cause the device sensitivity at TA = 25°C

to change during and after temperature cycling. This change in

sensitivity follows a hysteresis curve. For purposes of specifica-

tion, the Sensitivity Drift Due to Package Hysteresis, ∆SensPKG,

is defined as:

Sens

(25°C)(2)

– Sens

(25°C)(1)

Sens(25°C)(1)

∆SensPKG =×

100 (%) (6)

where Sens(25°C)(1) is the programmed value of sensitivity

at TA = 25°C, and Sens(25°C)(2) is the value of sensitivity at

TA = 25°C after temperature cycling TA up to 150°C, down to

–40°C, and back to up 25°C.

Linearity Sensitivity Error. The A1315 is designed to provide

linear output in response to a ramping applied magnetic field.

Consider two magnetic fields, B1 and B2. Ideally, the sensitivity

of a device is the same for both fields, for a given supply voltage

and temperature. Linearity error is present when there is a differ-

ence between the sensitivities measured at B1 and B2.

Linearity Sensitivity Error, LINERR , is calculated separately for

positive (LinERR+) and negative (LinERR– ) applied magnetic

fields. LINERR (%) is measured and defined as:

Sens(B+)(2)

Sens(B+)(1)

Sens(B–)(2)

Sens(B–)(1)

1–

LinERR+ =×

100 (%)













1–

LinERR–=













(7)

where:

|VOUT(Bx) – VOUT(Q)|

SensBx= (8)

and Bx are positive and negative magnetic fields, with respect to

the quiescent voltage output, such that

|B(+)(2)| > |B(+)(1)| and |B(–)(2)| > |B(–)(1)|

The effective linearity error is:

max(|LinERR+| , |LinERR– |)

LinERR =

(9)

The output voltage clamps, VCLPHIGH and VCLPLOW

, limit the

operating magnetic range of the applied field in which the device

provides a linear output. The maximum positive and negative

applied magnetic fields in the operating range can be calculated:

VCLPHIGH – VOUT(Q)

Sens



BMAX(+)



VOUT(Q) – VCLPLOW

Sens



BMAX(–)



(10)

Symmetry Sensitivity Error. The magnetic sensitivity of the

device is constant for any two applied magnetic fields of equal

magnitude and opposite polarities. Symmetry error, SymERR (%),

is measured and defined as:

Sens(B+)

Sens(B–)

1–

SymERR =×

100 (%)













(11)

where SensBx is as defined in equation 10, and B+ and B– are

positive and negative magnetic fields such that |B+| = |B–|.

Ratiometry Error. The A1315 provides ratiometric output. This

means that the Quiescent Voltage Output, VOUT(Q)

, magnetic

sensitivity, Sens, and clamp voltages, VCLPHIGH and VCLPLOW

are proportional to the supply voltage, VCC. In other words, when

the supply voltage increases or decreases by a certain percent-

age, each characteristic also increases or decreases by the same

percentage. Error is the difference between the measured change

in the supply voltage relative to 3.3 V, and the measured change

in each characteristic.

The ratiometric error in quiescent voltage output, RatVOUT(Q) (%),

for a given supply voltage, VCC, is defined as:

VOUT(Q)(VCC) / VOUT(Q)(3.3V)

VCC / 3.3 (V)

1–

RatVOUT(Q) =×

100 (%)













(12)

The ratiometric error in magnetic sensitivity, RatSens (%), for a

given supply voltage, VCC, is defined as:

Sens(VCC) / Sens(3.3V)

VCC / 3.3 (V)

1–

RatSens =×

100 (%)













(13)

The ratiometric error in the clamp voltages, RatVOUTCLP (%), for

a given supply voltage, VCC, is defined as:

VCLP(VCC) / VCLP(3.3V)

VCC / 3.3 (V)

1–

RatVOUTCLP =×

100 (%)













(14)

where VCLP is either VCLPHIGH or VCLPLOW

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Undervoltage Lockout. The A1315 provides an undervoltage

lockout feature which ensures that the device outputs a VOUT

signal only when VCC is above certain thresholds

. The undervolt-

age lockout feature provides a hysteresis of operation to eliminate

indeterminate output states.

The output of the A1315 is held low (GND) until VCC exceeds

VUVLOHI . After VCC exceeds VUVLOHI , the device VOUT output

is enabled, providing a ratiometric output voltage that is pro-

portional to the input magnetic signal and VCC . If VCC should

drop back down below VUVLOLO after the device is powered up,

the output would be pulled low (see figure 3) until VUVLOHI is

reached again and VOUT would be reenabled.

VCC Ramp Time. The time taken for VCC to ramp from 0 V to

VCC(typ), 3.3 V (see figure 4).

VCC Off Level. For applications in which the VCC pin of the

A1315 is being power-cycled (for example using a multiplexer

to toggle the part on and off), the specification of VCC Off Level,

VCCOFF , determines how high a VCC off voltage can be tolerated

while still ensuring proper operation and startup of the device

(see figure 4).

Figure 3. Definition of Undervoltage Lockout

VCC

VUVLOHI

VUVLOLOW

VOUT

time

(typ)

CCOFF

tVCC

Supply Voltage,

VCC (V)

Figure 4. Definition of VCC Ramp Time, tVCC

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

A1315

VOUT

GND

0.1

3.3 V µF

VCC

4.7 nF

APPLICATION INFORMATION

Figure 5. Typical Application Circuit

Figure 6. Chopper Stabilization Technique

CHOPPER STABILIZATION TECHNIQUE

When using Hall-effect technology, a limiting factor for

switchpoint accuracy is the small signal voltage developed across

the Hall element. This voltage is disproportionally small relative

to the offset that can be produced at the output of the Hall sensor

IC. This makes it difficult to process the signal while maintain-

ing an accurate, reliable output over the specified operating

temperature and voltage ranges. Chopper stabilization is a unique

approach used to minimize Hall offset on the chip. Allegro

employs a technique to remove key sources of the output drift

induced by thermal and mechanical stresses. This offset reduction

technique is based on a signal modulation-demodulation process.

The undesired offset signal is separated from the magnetic field-

induced signal in the frequency domain, through modulation. The

subsequent demodulation acts as a modulation process for the

offset, causing the magnetic field-induced signal to recover its

original spectrum at base band, while the DC offset becomes a

high-frequency signal. The magnetic-sourced signal then can pass

through a low-pass filter, while the modulated DC offset is sup-

pressed. In addition to the removal of the thermal and mechanical

stress related offset, this novel technique also reduces the amount

of thermal noise in the Hall sensor IC while completely removing

the modulated residue resulting from the chopper operation. The

chopper stabilization technique uses a high frequency sampling

clock. For demodulation process, a sample and hold technique is

used. This high-frequency operation allows a greater sampling

rate, which results in higher accuracy and faster signal-processing

capability. This approach desensitizes the chip to the effects

of thermal and mechanical stresses, and produces devices that

have extremely stable quiescent Hall output voltages and precise

recoverability after temperature cycling. This technique is made

possible through the use of a BiCMOS process, which allows the

use of low-offset, low-noise amplifiers in combination with high-

density logic integration and sample-and-hold circuits.

Amp

Regulator

Clock/Logic

Hall Element

Tuned

Filter

Anti-aliasing

LP Filter

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Package LH, 3-Pin (SOT-23W)

0.55 REF

Gauge Plane

Seating Plane

0.25 BSC

0.95 BSC

0.95

1.00

0.70

2.40

AActive Area Depth, 0.28 mm REF

Reference land pattern layout

All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary

to meet application process requirements and PCB layout tolerances

Branding scale and appearance at supplier discretion

PCB Layout Reference View

Standard Branding Reference View

Branded Face

N = Last three digits of device part number

NNN

2.90 +0.10

–0.20

4°±4°

8X 10° REF

0.180+0.020

–0.053

0.05 +0.10

–0.05

0.25 MIN

1.91 +0.19

–0.06

2.98 +0.12

–0.08

1.00 ±0.13

0.40 ±0.10

For Reference Only; not for tooling use (reference DWG-2840)

Dimensions in millimeters

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

DHall element, not to scale

1.49

0.96

PACKAGE OUTLINE DRAWINGS

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Package UA, 3-Pin SIP, Matrix Style

DStandard Branding Reference View

NNN

= Supplier emblem

= Last three digits of device part numberN

2.04

1.44 E

2 31

1.27 NOM

1.02

MAX

45°

1.52 ±0.05

Gate and tie bar burr area

Dambar removal protrusion (6×)

Active Area Depth, 0.50 mm ±0.08

Branding scale and appearance at supplier discretion

Mold Ejector

Pin Indent

0.41 +0.03

–0.06

0.43 +0.05

–0.07

14.99 ±0.25

4.09 +0.08

–0.05

3.02 +0.08

–0.05

0.79 REF

10°

Branded

Face

For Reference Only – Not for Tooling Use

NOT TO SCALE

Dimensions in millimeters

Dimensions exclusive of moldﬂash, gate burrs, and dambar protrusions

Exact case and lead conﬁguration at supplier discretion within limits shown

(Reference DWG-0000404, Rev. 1)

EHall element, not to scale

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

A1315

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

For the latest version of this document, visit our website:

www.allegromicro.com

Revision History

Number Date Description

– March 31, 2017 Initial release

1 November 27, 2018 Added UA package option

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