SRM2AV413LLBT
8
Rev.1.2 7
K
(3)Writing data into both bytes
There are the following four ways of writing data into the memory.
i) Hold CS2 = "High", WE = "Low", LB and UB = "Low", set address and give "Low" pulse to CS1.
ii) Hold CS1 = "Low", WE = "Low", LB and UB = "Low", set address and give "High" pulse to CS2.
iii) Hold CS1 = "Low", CS2 = "High", LB and UB = "Low", set address and give "Low" pulse to WE.
ix) Hold CS1 = "Low", CS2 = "High", WE = "Low", set address and give "Low" pulse to LB and UB.
● Standby mode
Anyway, data on I/Opins are latched up into the memory cell during CS1 = "Low" , CS2 ="High" , WE = "Low",
UB and LB = "Low".
As DATA I/O pins are in "Hi-Z" when CS1= "High", CS2 = "Low", OE= "High", or LB and
UB ="High", the contention on the data bus can be avoided. But while I/O pins are in the output state, the
data that is opposite to the output data should not be given.
● Writing data
(1) Writing data into lower byte
There are the following four ways of writing data into memory.
i) Hold CS2 = "High",WE = "Low",UB ="High", and LB = "Low",set address and give "Low" pulse to CS1.
ii) Hold CS1 = "Low",WE = "Low",UB ="High", and LB = "Low",set address and give "High" pulse to CS2.
iii) Hold CS1 = "Low",CS2 = "High",UB ="High", and LB = "Low",set address and give "Low" pulse to WE
ix) Hold CS1 = "Low",CS2 = "High",WE ="Low",and UB= "High",set address and give "Low" pulse to LB.
Anyway, data on I/O pins are latched up into the memory cell during CS1 ="Low",CS2 = "High",WE and LB ="Low".
(2) Writing data into upper byte
There are the following four ways of writing data into the memory.
i) Hold CS2 ="High",WE ="Low",LB ="High",and UB ="Low",set address and give "Low" pulse to CS1.
ii) Hold CS1 ="Low",WE ="Low",LB ="High",and UB ="Low",set address and give "High" pulse to CS2.
iii) Hold CS1 ="Low",CS2 ="High",LB ="High",and UB ="Low",set address and give "Low" pulse to WE.
ix) Hold CS1="Low",CS2 ="High",WE="Low",and LB="High",set address and give "Low" pulse to UB.
Anyway, data on I/O pins are latched up into the memory cell during CS1 ="Low",CS2 = "High",WE and UB ="Low".
When CS1 is "High" or CS2 is "Low" the chip is in the standby mode (only retaining data operation). In this case
data I/O pins are Hi-Z, and all inputs of addresses, WE, OE, UB, LB, and data are inhibited. When
CS1 = CS2 ≥ VDD - 0.2V or CS2 ≤ 0.2V, there is almost no current flow except through the high resistance parts
of the memory.
● Data retention at low voltage
In case of the data retention in the stadby mode, the power supply can be gone down till the specified voltage.
But it is impossible to write or read in this mode.