Freescale Semiconductor Document Number: MMA8452Q
Data Sheet: Technical Data Rev. 5, 07/2012
An Energy-Efficient Solution by Freescale
© 2012 Freescale Semiconductor, Inc. All rights reserved.
3-Axis, 12-bit/8-bit
Digital Accelerometer
The MMA8452Q is a smart low-power, three-axis, capacitive micromachined
acceleromete r with 12 bits of resolution. This accelerometer is packed with
embedded functions with flexible user programmable options, configurable to two
interrupt pins. Embedded interrupt functions allow for overall power savings
relieving the host processor from continuously polling data.
The MMA8452Q has user selectable full scales of ±2g/±4g/±8g with high-pass
filter filtered data as well as non-filtered data available real-time. The device can
be configured to generate inertial wakeup interrupt signals from any combination
of the configurable embedded functions allowing the MMA8452Q to monitor
events and remain in a low power mode during periods of inactivity. The
MMA8452Q is available in a 3 mm by 3 mm by 1 mm QFN package.
Features
• 1.95V to 3.6V supply voltage
• 1.6V to 3.6V interface voltage
• ±2g/±4g /± 8g dynamically selectable full-scale
• Output Data Rates (ODR) from 1.56 Hz to 800 Hz
• 99 μg/√Hz noise
• 12-bit and 8-bit digital output
•I
2C digital output interface
• Two programmab l e i nt err upt p ins f o r six inte rru pt sou rce s
• Three embedded channel s of motion detection
— Freefall or Motion Detection: 1 channel
— Pulse Detection: 1 channel
— Transient Detection: 1 channel
– Orientation (Portrait/Landscape) detection with set hysteresis
– Automatic ODR change for Auto-WAKE and return to SLEEP
– High-Pass Filter Data available real-time
–Self-Test
– RoHS compliant
– Current Consumption: 6 μA – 165 μA
Typical Applications
• eCompass applications
• Static orientation detection (Portrait/Landscape, Up/Down, Left/Right, Back/
Front position identificatio n)
• Notebook, eReader and Laptop Tumble and Freefall Detection
• Real-t ime orientation detection (virt ua l reality and gaming 3D user po sition feedback)
• Real-time activity analysis (pedometer step counting, freefall drop detection for HDD, dead-reckoning GPS backup)
• Motion detection for portable product power saving (Auto-SLEEP and Auto-WAKE for cell phone, PDA, GPS, gaming)
• Shock and vibration monitoring (mechatronic compensation, shipping and warranty usage logging)
•User interface (menu scrolling by orientation change, pulse detection for button replacement)
ORDERING INFORMATION
Part Number Temperature Range Package Description Shipping
MMA8452QT -40°C to +85°C QFN-16 Tray
MMA8452QR1 -40°C to +85°C QFN-16 Tape and Reel
MMA8452Q
16 PIN QFN
3 mm by 3 mm by 1 mm
CASE 2077-02
Top and Bottom View
Top View
Pin Connections
1
2
3
4
59
10
11
12
13
141516
876
NC
VDD
NC
VDDIO
BYP
NC
SCL
GND
NC
GND
INT1
GND
INT2
SA0
NC
SDA
MMA8452Q
Sensors
2Freescale Semiconductor, Inc.
Related Documentation
The MMA8452Q device features and operations are described in a variety of reference manuals, user guides, and application
notes. To find the most-current versions of these documents:
1. Go to the Freescale homepage at: http://www.freescale.com/
2. In the Keyword search box at the top of the page, enter the device number MMA8452Q.
3. In the Refine Your Result pane on the left, click on the Documentation link.
Contents
1 Block Diagram and Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Soldering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Mechanical and Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Mechanical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 I2C Interface Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3 Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 Zero-g Offset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3 Self-Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.1 Device Calibration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.2 8-bit or 12-bit Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.3 Low-Power Modes vs. High-Resoluti on Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.4 Auto-WAKE/SLEEP Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.5 Freefall and Motion Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.6 Transient Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.7 Pulse Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.8 Orientation Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.9 Interrupt Register Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.10 Serial I2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6 Register Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1 Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.2 Portrait/ Landscape Embedded Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.3 Motion and Freefall Embedded Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.4 Transient (HPF) Acceleration Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.5 Single, Double and Directional Pulse-Detection Reg isters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6.6 Auto-WAKE/SLEEP Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.7 Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.8 User Offset Correction Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
MMA8452Q
Sensors
Freescale Semiconductor, Inc. 3
1 Block Diagram and Pin Description
Figure 1. Block Diagram
Figure 2. Directio n of the Detectable Accelerations
12-bit SDA
SCL
I2C
Embedded
DSP
Functions
C to V
Internal
OSC Clock
GEN
ADC
Converter
VDDIO
VSS
X-axis
Transducer
Y-axis
Transducer
Z-axis
Transducer
Freefall
and Motion
Detection
Transient
Detection
(i.e., fast motion,
transient)
Orientation with
Set Hysteresis
and Z-lockout
Shake Detection
through
Motion
Threshold
Single, Double
Auto-WAKE/Auto-SLEEP Configurable with debounce counter and multiple motion interrupts for control
Auto-WAKE/SLEEP ACTIVE Mode
SLEEP
VDD
& Directional
INT1
INT2
MODE Options
Low Power
Low Noise + Power
High Resolution
Normal
MODE Options
Low Power
Low Noise + Power
High Resolution
Normal
ACTIVE Mode
WAKE
Pulse Detection
1
DIRECTION OF THE
DETECTABLE ACCELERATIONS
(BOTTOM VIEW)
5
9
13
X
Y
Z
1
(TOP VIEW)
Earth Gravity
MMA8452Q
Sensors
4Freescale Semiconductor, Inc.
Figure 3 shows the device configuration in the six different orientation modes. These orientations are defined as the following:
PU = Portrait Up, LR = Landscape Right, PD = Portrait Down, LL = Landscape Left, BACK and FRONT side views. There are
several registers to configure the orientation detection and are described in detail in the register setting section.
Figure 3. Landsca p e/Portrait Orientatio n
Figure 4. Application Diagram
Top View
PU
Earth Gravity
Pin 1
Xout @ 0g
Yout @ -1g
Zout @ 0g
Xout @ 1g
Yout @ 0g
Zout @ 0g
Xout @ 0g
Yout @ 1g
Zout @ 0g
Xout @ -1g
Yout @ 0g
Zout @ 0g
LL
PD
LR Side View
FRONT
Xout @ 0g
Yout @ 0g
Zout @ 1g
BACK
Xout @ 0g
Yout @ 0g
Zout @ -1g
0.1μF
1.6V-3.6V
VDDIO
VDDIO
VDDIO
4.7kΩ4.7kΩ
1
GND
VDDIO
SCL
NC
INT2
INT1
GND
GND
SDA
SA0
VDD
NC
NC
NC
BYP
NC
MMA8452Q
2
16
12
13
1415
11
10
3
4
5
678
9
4.7μF
INT1
INT2
SA0
0.1μF
1.95V - 3.6V
VDD
SCL
SDA
MMA8452Q
Sensors
Freescale Semiconductor, Inc. 5
The device power is supplied through VD D line. Power supply decoupling capacitors (100 nF ceramic plus 4.7 µF bulk, or a
single 4.7 µF ceramic) should be placed as near as possible to th e pins 1 and 14 of the device.
The control signals SCL, SDA, and SA0 are not tolerant of voltages more than VDDIO + 0.3V. If VDDIO is removed, the control
signals SCL, SDA, and SA0 will clamp any logic signals with their internal ESD protection dio des.
The functions, the threshold and the timing of the two interrupt pins (INT1 and INT2) are user programmable through the I2C
interface. The SDA and SCL I2C connections are open drain and therefore require a pullup resistor as shown in the application
diagram in Figure 4.
1.1 Soldering Information
The QFN package is compliant with the RoHS standard. Please refer to AN4077.
Table 1. Pin Descriptions
Pin # Pin Name Description Pin Status
1 VDDIO Power Supply for IO pins (1.62V - 3.6V) Input
2BYP
Bypass capacitor (0.1 μF) Input
3NC
Leave open. Do not connect. Open
4SCL
I2C Serial Clock Open Drain
5GND
Connect to Ground Input
6SDA
I2C Serial Data Open Drain
7 SA0 I2C Least Significant Bit of the Device I2C Address Input
8NC
Internally not connected (can be GND or VDD) Input
9INT2
Inertial Interrupt 2 Output
10 GND Connect to Ground Input
11 INT1 Inertial Interr upt 1 Output
12 GND Connect to Ground Input
13 NC Internally not connected (can be GND or VDD) Input
14 VDD Internal Power Supply (1.95V - 3.6V) Input
15 NC Internally not connected (can be GND or VDD) Input
16 NC Internally not connected (can be GND or VDD) Input
MMA8452Q
Sensors
6Freescale Semiconductor, Inc.
2 Mechanical and Electrical S pecifications
2.1 Mechanical Characteristics
Table 2. Mechanical Characteristics @ VDD = 2.5V, VDDIO = 1.8V, T = 25°C unless otherwise noted.
Parameter Test Conditions Symbol Min Typ Max Unit
Measurement Range(1)
1. Dynamic Range is limited to 4g when the Low-Noise bit in Register 0x2A, bit 2 is set.
FS[1:0] set to 00
2g Mode
FS
±2
g
FS[1:0] set to 01
4g Mode ±4
FS[1:0] set to 10
8g Mode ±8
Sensitivity
FS[1:0] set to 00
2g Mode
So
1024
counts/g
FS[1:0] set to 01
4g Mode 512
FS[1:0] set to 10
8g Mode 256
Sensitivity Accuracy(2)
2. Sensitivity remains in spec as stated, but changing Oversampling mode to Low Power causes 3% sensitivity shift. This behavior is also seen
when changing from 800 Hz to any other data rate in the Normal, Low Noise + Low Power or High Resolution mode.
Soa ±2.64 %
Sensitivity Change vs. Temperature
FS[1:0] set to 00
2g Mode
TCSo ±0.008 %/°C
FS[1:0] set to 01
4g Mode
FS[1:0] set to 10
8g Mode
Zero-g Level Offset Accuracy(3)
3. Before board mount.
FS[1:0] 2g, 4g, 8g TyOff ±17 mg
Zero-g Level Offset Accuracy Post Board Mount(4)
4. Post Board Mount Offset Specifications are based on an 8 Layer PCB, relative to 25°C.
FS[1:0] 2g, 4g, 8g TyOffPBM ±20 mg
Zero-g Level Change vs. Temperature -40°C to 85°C TCOff ±0.15 mg/°C
Self-Test Output Change(5)
X
Y
Z
5. Self-Test is one direction only.
FS[1:0] set to 0
4g Mode Vst +181
+255
+1680
LSB
ODR Accuracy
2 MHz Clock ±2 %
Output Data Bandwidth BW ODR/3 ODR/2 Hz
Output Noise Normal Mode ODR = 400 Hz Noise 126 µg/√Hz
Output Noise Low-Noise Mode(1) Normal Mode ODR = 400 Hz Noise 99 µg/√Hz
Operating Temperature Range Top -40 +85 °C
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Sensors
Freescale Semiconductor, Inc. 7
2.2 Electrical Characteristics
Table 3. Electrical Characteristics @ VDD = 2.5V, VDDIO = 1.8V, T = 25°C unless otherwise noted .
Parameter Test Conditions Symbol Min Typ Max Unit
Supply Voltage VDD(1)
1. There is no requirement for power supply sequencing. The VDDIO input voltage can be higher than the VDD input voltage.
1.95 2.5 3.6 V
Interface Supply Voltage VDDIO(1) 1.62 1.8 3.6 V
Low-Power Mode
ODR = 1.56 Hz
IddLP
6
μA
ODR = 6.25 Hz 6
ODR = 12.5 Hz 6
ODR = 50 Hz 14
ODR = 100 Hz 24
ODR = 200 Hz 44
ODR = 400 Hz 85
ODR = 800 Hz 165
Normal Mode
ODR = 1.56 Hz
Idd
24
μA
ODR = 6.25 Hz 24
ODR = 12.5 Hz 24
ODR = 50 Hz 24
ODR = 100 Hz 44
ODR = 200 Hz 85
ODR = 400 Hz 165
ODR = 800 Hz 165
Current during Boot Sequence, 0.5 mSec max
duration using recommended Bypass Cap VDD = 2.5V Idd Boot 1mA
Value of Capacitor on BYP Pin -40°C 85°C Cap 75 100 470 nF
STANDBY Mode Current @25°C VDD = 2.5V, VDDIO = 1.8V
STANDBY Mode IddStby 1.8 5 μA
Digital High Level Input Voltage
SCL, SDA, SA0 VIH 0.7*VDDIO V
Digital Low-Level Input Voltage
SCL, SDA, SA0 VIL 0.3*VDDIO V
High Level Output Voltage
INT1, INT2 IO = 500 μA VOH 0.9*VDDIO V
Low-Level Output Voltage
INT1, INT2 IO = 500 μA VOL 0.1*VDDIO V
Low-Level Output Voltage
SDA IO = 500 μA VOLS 0.1*VDDIO V
Power on Ramp Time 0.001 1000 ms
Time from VDDIO on and VDD > Vmin until I2C
ready for operation Cbyp = 100 nF BT —350 500 µs
Turn-on time (STANDBY)(2)
2. Note that the first sample is typically not very precise. Depending on ODR/MODS settings, a minimum of three samples is recommended for
full precision.
TonStby 1.1/ODR s
Turn-on time (Power Down to STANDBY) Ton 2ms
Operating Temperature Range Top -40 +85 °C
MMA8452Q
Sensors
8Freescale Semiconductor, Inc.
2.3 I2C Interface Characteristics
Table 4. I2C Slave Timing Values(1)
1. All values referred to VIH (min) and VIL (max) levels.
Parameter Symbol I2C Fast Mode Unit
Min Max
SCL Clock Frequency
Pullup = 4.7 kΩ, Cb = 20 pF
Pullup = 4.7 kΩ, Cb = 40 pF
Pullup = 4.7 kΩ, Cb = 400 pF
Pullup = 1 kΩ, Cb = 20 pF
Pullup = 1 kΩ, Cb = 400 pF
fSCL
0
0
0
0
0
2.250
100
Nonfunctional
4.50
750
MHz
kHz
—
MHz
kHz
Bus Free Time between STOP and START Condition tBUF 1.3 μs
Repeated START Hold Time tHD;STA 0.6 μs
Repeated START Setup Time tSU;STA 0.6 μs
STOP Condition Setup Time tSU;STO 0.6 μs
SDA Data Hold Time(2)
2. tHD;DAT is the data hold time that is measured from the falling edge of SCL, applies to data in transmission and the acknowledge.
tHD;DAT 0.05 (3)
3. The maximum tHD;DAT could be 3.45 μs and 0.9 μs for Standard mode and Fast mode, but must be less than the maximum of tVD;DAT or tVD;ACK
by a transition time.
μs
SDA Valid Time (4)
4. tVD;DAT = time for Data signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is worse).
tVD;DAT 0.9(3) μs
SDA Valid Acknowledge Time (5)
5. tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is wor se).
tVD;ACK 0.9(3) μs
SDA Setup Time tSU;DAT 100(6)
6. A Fast mode I2C device can be used in a Standard mode I2C system, but the requirement tSU;DAT 250 ns must then be met. This will
automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the
SCL signal, it must output the next data bit to the SDA line tr(max) + tSU;DAT = 1000 + 250 = 1250 ns (according to the Standard mode I2C
specification) before the SCL line is released. Also the acknowledge timing must meet this setup time
ns
SCL Clock Low Time tLOW 4.7 μs
SCL Clock High Time tHIGH 4μs
SDA and SCL Rise Time tr1000 ns
SDA and SCL Fall Time (7) (8)
7. Cb = total capacitance of one bus line in pF.
8. The maximum tf for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage tf is specified at 250 ns.
This allows series protection resistors to be connected in between the SDA and the SCL pins and the SDA/SCL bus lines without exceeding
the maximum specified tf.
tf300 ns
Pulse width of spikes on SDA and SCL that must be suppressed by input filter tSP 050ns
MMA8452Q
Sensors
Freescale Semiconductor, Inc. 9
Figure 5. I2C Slave Timing Diagram
2.4 Absolute Maximum Ratings
Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. Exposure to
maximum rating conditions for extended periods may affect device reliability.
Table 5. Maximum Ratings
Rating Symbol Value Unit
Maximum Acceleration (all axes, 100 μs) gmax 5,000 g
Supply Voltage VDD -0.3 to + 3.6 V
Input voltage on any control pin (SA0, SCL, SDA) Vin -0.3 to VDDIO + 0.3 V
Drop Test Ddrop 1.8 m
Operating Temperature Range TOP -40 to +85 °C
Storage Temperature Range TSTG -40 to +125 °C
Table 6. ESD an d Latchup Protection Characteristics
Rating Symbol Value Unit
Human Body Model HBM ±2000 V
Machine Model MM ±200 V
Charge Device Model CDM ±500 V
Latchup Current at T = 85°C —±100 mA
This device is sensitive to mechanical shock. Improper handling can cause permanent damage of the part or
cause the part to otherwise fail.
This device is sensitive to ESD, improper handling can cause permanent damage to the part.
MMA8452Q
Sensors
10 Freescale Semiconductor, Inc.
3 Terminology
3.1 Sensitivity
The sensitivity is represented in counts/g. In 2g mode the sensitivity is 1024 counts/g. In 4g mode the sensitivity is
512 counts/g and in 8g mode the sensitivity is 256 counts/g.
3.2 Zero-g Offset
Zero-g Of fset (T yOf f) describes the deviation of an actual output signal from the ideal output signal if the sensor is stationary. A
sensor stationary on a horizontal surface will measure 0g in X-axis and 0g in Y-axis whereas the Z-axis will measure 1g. The output
is ideally in the midd le of the dynamic range of the sensor (conten t of OUT Registers 0x00, data expressed as 2's complement
number). A deviation from ideal value in this case is called Zero-g of fset. Of fs et is to some ext ent a result of str ess on the MEMS
sensor and ther efore the offset can slightly chang e after mounting the sens or o nto a printed circuit board or exposing it to
extensive mechanical stress.
3.3 Self-Test
Self-Test checks the transducer functionality without external mechanical stimulus. When Self-Test is activated, an electrostatic
actuation force is applied to the sensor, simulating a small acceleration. In this case the sensor outputs will exhibit a change in
their DC levels which are related to the selected full scale through the device sensitivity. When Self-Test is activated, the device
output level is given by the algebraic sum of the signals produced by the acceleration acting on the sensor and by the electrostatic
test-force.
4 Modes of Operation
Figure 6. MMA8452Q Mo de Transition Diagram
All register contents are preserved when transitioning from ACTIVE to STANDBY mode. Some registers are reset when
transitioning from STANDBY to ACTIVE. These are all noted in the device memory map register table. The SLEEP and WAKE
modes are ACTIVE modes. For more information on how to use the SLEEP and WAKE modes an d how to transition between
these modes please refer to the functionality section of this document.
Table 7. Mode of Operation Description
Mode I2C Bus State VDD VDDIO Function Description
OFF Powered Down <1.8V VDDIO Can be > VDD The device is powered off. All analog and digital blocks
are shutdown. I2C bus inhibited.
STANDBY I2C communication with
MMA8452Q is possible ON VDDIO = High
VDD = High
ACTIVE bit is cleared
Only digital blocks are enabled.
Analog subsystem is disabled. Internal clocks disabled.
ACTIVE
(WAKE/SLEEP) I2C communication with
MMA8452Q is possible ON VDDIO = High
VDD = High
ACTIVE bit is set All blocks are enabled (digital, analog).
SLEEP
WAKE
STANDBY
OFF
ACTIVE
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Freescale Semiconductor, Inc. 11
5 Functionality
The MMA8452Q is a low-power, digital output 3-axis linear accelerometer wi t h a I 2C interface and embedded logic used to
detect events and notify an external microprocessor over interrupt lines. The functionality includes the following:
• 8-bit or 12-bit data which includes High-Pass Filtered data
• 4 different oversampling options for compromising between resolution and current consumption based on application
requirements
• Additional Low-Noise mode that functions independently of the Oversampling modes for higher resolution
• Low-Power and Auto-WAKE/SLEEP for conservation of current consumption
• Single-/Double-pulse with directional information 1 channel
• Motion detection with directional information or Freefall 1 chann el
• Transient detecti on based on a high-pass filter and settable threshold for detecting the change in accelerati on above a
threshold with directional information 1 channel
• Portrait/Landscape detection w ith t r ip points fixed at 30° and 60° for smooth transitions between orie ntations.
All functionality is avai lable in 2g, 4g o r 8g dynamic ranges. There are many configuration settings for enabling all the dif ferent
functions. Separate application notes have been provided to help configure the device for each embedded functionality.
Table 8. Features of the MMA845xQ devices
Feature List MMA8451 MMA8452 MMA8453
Digital Resolution (Bits) 14 12 10
Digital Sensitivity (Counts/g) 4096 1024 256
Data-Ready Interrupt Yes Yes Yes
Single-Pulse Interrupt Yes Yes Yes
Double-Pulse Interrupt Yes Yes Yes
Directional-Pulse Interrupt Yes Yes Yes
Auto-WAKE Yes Yes Yes
Auto-SLEEP Yes Yes Yes
Freefall Interrupt Yes Yes Yes
32 Level FIFO Yes No No
High-Pass Filter Yes Yes Yes
Low-Pass Filter Yes Yes Yes
Orientation Detection Portrait/Landscape = 30°, Landscape to Portrait = 60°,
and Fixed 45° Threshold Yes Yes Yes
Programmable Orientation Detection Yes No No
Motion Interrupt with Direction Yes Yes Yes
Transient Detection with High-Pass Filter Yes Yes Yes
Low-Power Mode Yes Yes Yes
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12 Freescale Semiconductor, Inc.
5.1 Device Calibration
The device interface is factory calibrated for sensitivity and Zero-g offset for each axis. The trim values are stored in Non
Volatile Memory (NVM). On power-up, the trim parameters are read from NVM and applied to the circuitry. In normal use, further
calibration in the end application is not necessary. However, the MMA8452Q allows the user to adjust the Zero-g offset for each
axis after power-up, chang i ng the default offset values. The user offset adjustments are stored in 6 volatile registe r s. For more
information on device calibration, refer to Freescale application note, AN4069.
5.2 8-bit or 12-bit Data
The measured acceleration data is stored in the OUT_X_MSB, OUT_X_LSB, OUT_Y_MSB, OUT_Y_LSB, OUT_Z_MSB, and
OUT_Z_LSB registers as 2’s complement 12-bit numbers. The most significant 8-bits of each axis are stored in OUT_X (Y,
Z)_MSB, so applications needing only 8-bit results can use these 3 registers and ignore OUT_X,Y, Z_LSB. To do this, the
F_READ bit in CTRL_REG1 must be set. When the F_READ bit is cleared, the fast read mode is disabled.
When the full-scale is set to 2g, the measurement range is -2g to +1.999g, and each count corresponds to 1g/1024
(1 mg) at 12-bits resolu tion. Whe n the full-scale is set to 8g, the measurement range is -8g to +7.996g, and each count
corresponds to 1g/256 (3 .9 mg) at 12-bit s resolution. The resol ution is reduced by a factor of 16 if only t he 8-bit result s are used.
For more information on the data manipulation between data formats and modes, refer to Freescale application note, AN4076.
There is a device driver available that can be used with the Sensor Toolbox demo board (LFSTBEB8451, 2, 3Q) with this
application note.
5.3 Low-Power Modes vs. High-Resolution Modes
The MMA8452Q can be optimized for lower power modes or for higher resolution of the output data. High resolution is
achieved by setting the LNOISE bit in Register 0x2A. This improves the resolution but be aware that the dynamic range is limited
to 4g when this bit is set. This will affect all internal functions and reduce noise. Another method for improving the resolution of
the data is by oversampling. One of the oversampling schemes of the data can activated when MODS = 10 in Register 0x2B
which will improve the resolution of the output data only. The highest resolution is achiev ed at 1.5 6 Hz.
There is a trade-off between low power and high resolution. Low Power can be achieved when the oversampling rate is
reduced. When MODS = 1 1 the lowest power is achieved. The lowest power is achieved when the sample rate is set to 1.56 Hz.
For more information on how to configure the MMA8452Q in Low-Pow er mode or High-Resolution mode and to realize the
benefits, refer to Freescale application note, AN4075.
5.4 Auto-WAKE/SLEEP Mode
The MMA8452Q can be configured to transition between sample rates (with their respective current consumption) based on
four of the interrupt functions of the device. The advantage of using the Auto-W AKE/SLEEP is that the system can automatically
transition to a higher sample rate (higher current consumption) when needed but spends the majority of the time in the SLEEP
mode (lower current) when the device does not require higher sampling rates. Auto-W AKE refers to the device being triggered by
one of the interrupt functions to transition to a higher sample rate. This may also interrupt the processor to transition from a SLEEP
mode to a higher power mode .
SLEEP mode occurs after the accelerometer has not detected an interrupt for longer than the us er definable time-out period.
The device will transition to the specified lower sample rate. It may also alert the processor to go into a lower power mode to save
on current during this period of inactivity.
The Interrupts that can WAKE the device from SLEEP are the following: Pu ls e Detection, Orientation Detection, Motion/Freefall,
and Transient Detection. Refer to AN4074, for more detailed information for configuring the Auto-WAKE/SLEEP .
5.5 Freefall and Motion Detection
MMA8452Q has flexible interrupt architecture for detecting either a Freefall or a Motion. Freefall can be enabled where the set
threshold must be less than the configured threshold, or motion can be enabled where the set threshold must be greater than
the threshold. The motion configuration has the option of enabling or disabling a high-pass filter to eliminate tilt data (static offset).
The freefall does not use the high-pass filter. For details on the Freefall and Motion detection with specific application examples
and recommended configuration settings, refer to Freescale application note AN4070.
5.5.1 Freefall Detection
The detection of “Freefall” involves the monitorin g of the X, Y, and Z axes for the condition where the acceleration magnitude
is below a user specified threshold for a user definable amount of time. Normal ly the usa ble threshold ranges are bet w ee n
±100 mg and ±500 mg.
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5.5.2 Motion Detection
Motion is of ten used to simply alert the main processor that the device is currently in use. When the acceleration exceeds a
set threshold the motion interrupt is asserted. A motion can be a fast moving shake or a slow moving tilt. This will depend on the
threshold and tim ing valu es co nf igu red for the event. Th e motio n detection function can anal yze static acceleration changes or
faster jolts. For example, to detect that an object is spinning, all three axes would be enabled with a threshold detection of > 2g.
This condition would need to occur for a minimum of 100 ms to ensure that the event wasn't just noise. The timing value is set
by a configurable debounce counter. The debounce counter acts like a filter to determine whether the condition exists for
configurable set of time (i.e., 100 ms or longer). There is also directional data available in the source register to detect the
direction of the motion. This is useful for applications such as directional shake or flick, which assists with the algorithm for various
gesture detections.
5.6 Transient Detection
The MMA8452Q has a built-in high-pass filter. Acceleration data goes through the high-pass filter, eliminating the offset (DC)
and low frequen c i es . The high-p ass filt e r cut off frequency can be set b y the use r to four different frequen ci es w hi c h a r e
dependent on t he Output Dat a Rate (ODR) . A higher cutof f frequency ensures th e DC dat a or slower moving d ata will be filtered
out, allowing only the higher frequencies to pass. The embedded Transient Detection function uses the high-pass filtered data
allowing the user to set the threshol d and debounce counter. The Transient detection feature can be used in the same ma nner
as the motion detection by bypassing the high-pass filter. There is an option in the configuration register to do this. This adds
more flexibility to cover various customer use cases.
Many applications use the accele rometer’s static acceleratio n readings (i.e., tilt) which measure the change in acceleration
due to gravi ty only. These functions bene fit from accelera tion data being filtered with a low-p ass filt er where high -frequency data
is considered noise. However, there are many functions where the accelerometer must analyze dynamic acceleration. Functions
such as ta p, flick, shake and step counting are based on the analysis of the change in the acceleration. It is simpler to interpret
these functions dependent on dynamic acceleration data when the static component has been removed. The T ransient Detection
function can be routed to either inte rrupt pin through bi t 5 in CTRL_REG5 register (0x2E). Registers 0x1D – 0x20 are the
dedicated Transient Detection configuration registers. The source register contains directional data to determine the direction of
the acceleration, either positive or negative. For details on the benefits of the embedded Transient Detection function along with
specific application examples and recommen ded configuratio n settings, please refer to Freescale applic ation note, AN4071.
5.7 Pulse Detection
The MMA8452Q has embedded single/dou ble and directional pulse detection. This function has various customizing timers
for setting the pulse time width and the latency time between pulses. There are programmable thresholds for all three axes. The
pulse detection can be configured to run through the high-pass filter and also through a low-pass filter, which provides more
customizing and tunable pulse -detection schemes. The status register provides updates on the axes where the event was
detected and the direction of the tap. For more information on how to configure the device for pulse detection, please refer to
Freescale application note AN4072.
5.8 Orientation Detection
The MMA8452Q has an orientation detection algorithm with the ability to detect all 6 orientations. The transition from portrait
to landscape is fixed with a 45° threshold angle and a ±14° hysteresis angle. This allows the for a smooth transition from portrait
to landscape at approximately 30° and then from landscape to portrait at approximately 60°.
The angle at which the device no l onger detects the orientation chan ge is referred to as the “Z-Lockout angle”. The device
operates down to 29° from the flat position. All angles are accurate to ±2°.
For further information on the orientation detection function refer to Freescale application note, AN4068.
Figure 8 shows the definitions of the trip angles going from Landscape to Portrait (A) and then also from Portrai t to
Landscape (B).
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14 Freescale Semiconductor, Inc.
Figure 7. Landsca p e/Portrait Orientatio n
Figure 8. Illustration of Land scape to Portrait Transition (A) and Portrait to Landscape Transition (B)
Figure 9 illustrates the Z-angle lockout region. When lifting the device upright from the flat position it will be active for
orientation detection as low as 29° from flat. .
Figure 9. Illustration of Z-Tilt Angle Locko ut Transition
Top View
PU
Earth Gravity
Pin 1
Xout @ 0g
Yout @ -1g
Zout @ 0g
Xout @ 1g
Yout @ 0g
Zout @ 0g
Xout @ 0g
Yout @ 1g
Zout @ 0g
Xout @ -1g
Yout @ 0g
Zout @ 0g
LL
PD
LR
Side View
FRONT
Xout @ 0g
Yout @ 0g
Zout @ 1g
BACK
Xout @ 0g
Yout @ 0g
Zout @ -1g
Portrait
Landscape to Portrait
90°
Trip Angle = 60°
0° Landscape
Portrait
Portrait to Landscape
90°
Trip Angle = 30°
0° Landscape
(A) (B)
Upright
NORMAL
90°
Z-LOCK = 29°
0° Flat
DETECTION
REGION
LOCKOUT
REGION
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5.9 Interrupt Register Configurations
There are six configurable interrupts in the MMA8452Q: Data Ready, Motion/Freefall, Pulse, Orientation, Transient, and Auto-
SLEEP event s. These six interrupt sources can be routed to one of two interrup t pins. The interrupt source must be enabled and
configured. If the event flag is asserted because the event condition is detected, the corresponding interrupt pin, INT1 or INT2,
will assert .
Figure 10. System Interrupt Generation Block Diagr am
5.10 Serial I2C Interface
Acceleration data may be accessed through an I2C interface thus making the de vice p articularly suitable for direct inte rfacing
with a microcontroller. The MMA8452Q features an interrupt signal which indicates when a new set of measured acceleration
data is available thus simplifying data synchronization in the digit al system that uses the device. The MMA8452Q may also be
configured to generate other interrupt signals accordingly to the programmable embedded functions of the device for Motion,
Freefall, Transient, Orientation, and Pulse.
The registers embedded inside the MMA8452Q are accessed through the I2C serial interface (Table 9). To enable the I2C
interface, VDDIO line must be tied high (i.e., to the interface supply voltage). If VDD is not present and VDDIO is present, the
MMA8452Q is in off mode and communications on the I2C interface are ignored. The I2C interface may be used for
communicati on s be tw e en ot her I2C devices and the MMA8452Q does not affect the I2C bus.
There are two signals associated with the I2C bus; the Serial Clock Line (SCL) and t he Serial Data line (SDA). The latter is a
bidirectional line used for sending and receiving the data to/from the inte rface. External pull up resistors connected to VDDIO are
expected for SDA and SCL. When the bus is free both the lines are high. The I2C interface is compliant with fast mode (400 kHz),
and Normal mode (100 kHz) I2C standards (Table 5).
Table 9. Serial Interface Pin Description
Pin Name Pin Description
SCL I2C Serial Clock
SDA I2C Serial Data
SA0 I2C least significant bit of the device address
INTERRUPT
CONTROLLER
Data Ready
Motion/Freefall
Pulse
Orientation
Transient
Auto-SLEEP
INT ENABLE INT CFG
INT1
INT2
66
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5.10.1 I2C Operation
The transaction on the bus is started through a start condition (START) signal. START condition is defined as a HIGH to LOW
transition on the data line while the SCL line is held HIGH. After START has been transmitted by the Master , the bus is considered
busy. The next byte of data transmitted after START cont ains the slave address in the first 7 bits, and the eighth bit tells whether
the Master is receiving data from the slave or transmitting data to the slave. When an address is sent, each device in the system
compares the first seven bit s after a start condition with its address. If they match, the device considers itself addressed by the
Master. The 9th clock pulse, following the slave address byte (and each subsequent byte) is the acknowledge (ACK). The
transmitte r mu st rel e ase th e SDA line d uring the ACK peri o d . The receiver mu st then pull the data line low so that it rem ains
stable low during the high period of the acknowledge clock period.
A LOW to HIGH transition on the SDA line while the SCL line is high is defined as a stop condition (STOP). A dat a transfer is
always terminated by a STOP. A Master ma y als o issue a repeated START during a data transfer. The MMA8452Q expects
repeated STARTs to be used to randomly read from specific registers.
The MMA8452Q's standard slave address is a choice between the two sequential addresses 0011100 and 0011101. The
selection is ma de by th e hi gh- and low-logi c level of t h e SA0 (pin 7) input respectively. The slave addresses are factory
programmed and alternate addresses are available at customer request. The format is shown in Table 10.
Single Byte Read
The MMA8452Q has an internal ADC that can sam ple, convert and return sensor data on request. The transmission of an
8-bit command begins on the falling edge of SCL. Af ter the eight clock cycles are used to send the command, note that the data
returned is sent with the MSB first once the data is received. Figure 11 shows the timing diagram for the ac celeromete r 8-bit I2C
read operation. The Master (or MCU) transmits a start condition (ST) to the MMA8452Q, slave address ($1D), with the R/W bit
set to “0” for a write, and the MMA8452Q sends an acknowledgement. Then the Master (or MCU) transmits the address of the
register to read and the MMA8452Q sends an acknowledgement. The Master (or MCU) transmits a repeated start condition (SR)
and then addre sses the MMA 845 2Q ($1D) wi th the R/W bit s et to “1” for a read from the previously selected register. The Slave
then acknowledges and transmits the data from the requested register. The Master does not acknowledge (NAK) the transmitted
data, but transmits a stop condition to end the data tran sfer.
Multiple Byte Read
When performing a multi - byte read or “burst read”, the MMA8452Q automatically increments the received register address
commands af ter a read command is received. Therefore, after following the steps of a single byte read, multiple bytes of data
can be read from sequential registers after each MMA8452Q acknowledgment (AK) is received until a no acknowledge (NAK)
occurs from the Master followed by a stop condition (SP) signaling a n end of transmission.
Single Byte Write
To start a write command, t he Master transmit s a s ta rt condition (ST) to the MMA8452Q, slave address ($1D) with the R/W bit
set to “0” for a write, the MMA8452Q sends an acknowledgement. Then the Master (MCU) transmits the address of the register
to write to, and the MMA8452Q sends an acknowledgement. Then the Master (or MCU) transmits the 8-bit data to write to the
designated regi st er and the MMA8452Q sends an ackn o w led g ement that it has received the data. Since this transmi ssi o n is
complete, the Master transmits a stop condition (SP) to the data transfer. The data sent to the MMA8452Q is now stored in the
approp riate register.
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Multiple Byte Write
The MMA8452Q automatically increments the received register address commands after a write command is received.
Therefore, after following the step s of a single byte write, multiple bytes of data can be written to sequential registers after each
MMA8452Q acknowledgment (ACK) is received.
Figure 11. I2C Timing Diagram
Table 10. I2C Device Address Sequence
Command [7:2]
Device Address [1]
SA0 [7:1]
Device Address R/W [7:0]
8-bit Final Value
Read 001110 0 0x1C 1 0x39
Write 001110 0 0x1C 0 0x38
Read 001110 1 0x1D 1 0x3B
Write 001110 1 0x1D 0 0x3A
< Single Byte Read >
Master ST Device Address[6:0] WRegister Address[7:0] SR Device Address[6:0] R NAK SP
Slave AK AK AK Data[7:0]
< Multiple Byte Read >
Master ST Device Address[6:0] WRegister Address[7:0] SR Device Address[6:0] R AK
Slave AK AK AK Data[7:0]
Master AK AK NAK SP
Slave Data[7:0] Data[7:0] Data[7:0]
< Single Byte Write >
Master ST Device Ad dress[6:0] WRegister Address[7: 0] Data[7:0] SP
Slave AK AK AK
< Multiple Byte Write >
Master ST Device Address[6:0] WRegister Ad dress[7:0] Data[7:0] Data[7:0] SP
Slave AK AK AK AK
Legend
ST: Start Condition SP: Stop Condition NAK: No Acknowledge W: Write = 0
SR: Repeated Start Condition AK: Acknowledge R: Read = 1
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6 Register Descriptions
Table 11. Register Address Map
Name Type Register
Address Auto-Increment Address Default Hex
Value Comment
F_READ=0 F_READ=1
STATUS(1)(2) R 0x00 0x01 00000000 0x00 Real time status
OUT_X_MSB(1)(2) R 0x01 0x02 0x03 Output — [7:0] are 8 MSBs of 12-bit sample.
OUT_X_LSB(1)(2) R 0x02 0x03 0x00 Output — [7:4] are 4 LSBs of 12-bit sample.
OUT_Y_MSB(1)(2) R 0x03 0x04 0x05 Output — [7:0] are 8 MSBs of 12-bit sample.
OUT_Y_LSB(1)(2) R 0x04 0x05 0x00 Output — [7:4] are 4 LSBs of 12-bit sample.
OUT_Z_MSB(1)(2) R 0x05 0x06 0x00 Output — [7:0] are 8 MSBs of 12-bit sample.
OUT_Z_LSB(1)(2) R 0x06 0x00 Output — [7:4] are 4 LSBs of 12-bit sample.
Reserved R 0x07 — — — Reserved. Read return 0x00.
Reserved R 0x08 — — — Reserved. Read return 0x00.
SYSMOD R 0x0B 0x0C 00000000 0x00 Current System Mode
INT_SOURCE(1)(2) R 0x0C 0x0D 00000000 0x00 Interrupt status
WHO_AM_I R 0x0D 0x0E 00101010 0x2A Device ID (0x2A)
XYZ_DATA_CFG(3)(4) R/W 0x0E 0x0F 00000000 0x00 HPF Data Out and Dynamic
Range Settings
HP_FILTER_CUTOFF(3)(4) R/W 0x0F 0x10 00000000 0x00 Cutoff frequency is set to 16 Hz @
800 Hz
PL_STATUS(1)(2) R 0x10 0x11 00000000 0x00 Landscape/Portrait orientation
status
PL_CFG(3)(4) R/W 0x11 0x12 10000000 0x80 Landscape/Portrait configurat ion.
PL_COUNT(3)(4) R 0x12 0x13 00000000 0x00 Landscape/Portrait debounce
counter
PL_BF_ZCOMP(3)(4) R 0x13 0x14 01000100 0x44 Back-Front, Z-Lock Trip thre shold
P_L_THS_REG(3)(4) R 0x14 0x15 10000100 0x84 Portrait to Landscape Trip Angle is
29°
FF_MT_CFG(3)(4) R/W 0x15 0x16 00000000 0x00 Freefall/Motion functional block
configuration
FF_MT_SRC(1)(2) R 0x16 0x17 00000000 0x00 Freefall/Motion event source
register
FF_MT_THS(3)(4) R/W 0x17 0x18 00000000 0x00 Freefall/Motion threshold regist er
FF_MT_COUNT(3)(4) R/W 0x18 0x19 00000000 0x00 Freefall/Motion debounce counter
Reserved R 0x19 -
0x1C — — — Reserved. Read return 0x00.
TRANSIENT_CFG R/W 0x1D 0x1E 00000000 0x00 Transient functional block
configuration
TRANSIENT_SRC(1)(2) R 0x1E 0x1F 00000000 0x00 T ransient event status register
TRANSIENT_THS(3)(4) R/W 0 x1F 0x20 00000000 0x00 Transient event threshold
TRANSIENT_COUNT(3)(4) R/W 0x20 0x21 00000000 0x00 Transient debounce counter
PULSE_CFG(3)(4) R/W 0x21 0x22 00000000 0x00 ELE, Double_XYZ or Single_XYZ
PULSE_SRC(1)(2) R 0x22 0x23 00000000 0x00 EA, Double_XYZ or Single_XYZ
PULSE_THSX(3)(4) R/W 0x23 0x24 00000000 0x00 X pulse threshold
PULSE_THSY(3)(4) R/W 0x24 0x25 00000000 0x00 Y pulse threshold
PULSE_THSZ(3)(4) R/W 0x25 0x26 00000000 0x00 Z pulse threshold
PULSE_TMLT(3)(4) R/W 0x26 0x27 00000000 0x00 Time limit for pulse
PULSE_LTCY(3)(4) R/W 0x27 0x28 00000000 0x00 Latency time for 2nd pulse
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Note:Auto-increment addresses which are not a simple increment are highlighted in bold. The auto-increment addressing is only enabled when
device registers are read using I2C burst read mode. Therefore the internal storage of the auto-increment address is cleared whenever a
STOP condition is detected.
6.1 Data Registers
The following are the data registers for the MMA8452Q. For more information on data manipulation of the MMA8452Q, refer
to applic ation note, AN4076.
PULSE_WIND(3)(4) R/W 0x28 0x29 00000000 0x00 Window time for 2nd pulse
ASLP_COUNT(3)(4) R/W 0x29 0x2A 00000000 0x00 Counter setting for Auto-SLEEP
CTRL_REG1(3)(4) R/W 0x2A 0x2B 00000000 0x00 Data Rate, ACTIVE Mode
CTRL_REG2(3)(4) R/W 0x2B 0x2C 00000000 0x00 Sleep Enable, OS Modes,
RST, ST
CTRL_REG3(3)(4) R/W 0x2C 0x2D 00000000 0x00 Wake from Sleep, IPOL, PP_OD
CTRL_REG4(3)(4) R/W 0x2D 0x2E 00000000 0x00 Interrupt enable register
CTRL_REG5(3)(4) R/W 0x2E 0x2F 00000000 0x00 Interrupt pin (INT1/INT2) map
OFF_X(3)(4) R/W 0 x2F 0x30 00000000 0x00 X-axis offset adjust
OFF_Y(3)(4) R/W 0x30 0x31 00000000 0x00 Y-axis offset adjust
OFF_Z(3)(4) R/W 0x31 0x0D 00000000 0x00 Z-axis offset adjust
Reserved (do not modify) 0x40 – 7F — — — Reserved. Read return 0x00.
1. Register contents are reset when transition from STANDBY to ACTIVE mode occurs.
2. This register data is only valid in ACTIVE mode.
3. Register contents are preserved when transition from ACTIVE to STANDBY mode occurs.
4. Modification of this register’s contents can only occur when device is STANDBY mode except CTRL_REG1 ACTIVE bit and CTRL_REG2
RST bit.
0x00: STATUS Data Status Register (Read Only)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
ZYXOW ZOW YOW XOW ZYXDR ZDR YDR XDR
Table 12. STAT US Description
ZYXOW X, Y, Z-axis Data Overwrite. Default value: 0
0: No data overwrite has occurred
1: Previous X, Y, or Z data was overwritten by new X, Y, or Z data before it was read
ZOW Z-axis Data Overwrite. Default value: 0
0: No data overwrite has occurred
1: Previous Z-axis data was overwritten by new Z-axis data before it was read
YOW Y-axis Data Overwrite. Default value: 0
0: No data overwrite has occurred
1: Previous Y-axis data was overwritten by new Y-axis data before it was read
XOW X-axis Data Overwrite. Default value: 0
0: No data overwrite has occurred
1: Previous X-axis data was overwritten by new X-axis data before it was read
ZYXDR X, Y, Z-axis new Data Ready. Default value: 0
0: No new set of data ready
1: A new set of data is ready
ZDR Z-axis new Data Available. Default value: 0
0: No new Z-axis data is ready
1: A new Z-axis data is ready
YDR Y-axis new Data Available. Default value: 0
0: No n ew Y-axis data ready
1: A new Y-axis data is ready
XDR X-axis new Data Available. Default value: 0
0: No n ew X-axis data ready
1: A new X-axis data is ready
Table 11. Register Address Map