Technical Data
DS-108 REV K
Crystal Clock Oscillator
SaRonix
3.3 & 5V, HCMOS, ACMOS, TTL
STA / STT Series
Frequency Range:
Full Size:
Half Size:
ACTUAL SIZE
Description
A crystal controlled, low current, low
jitter and high frequency oscillator with
precise rise and fall times demanded in
high performance networking, telecom
and processor applications. The tri-state
function enables the output to go high
impedance. Available in a 14 or an 8 pin
DIP compatible, resistance welded, all
metal case. Pin 7 (or Pin 4) is grounded to
case to reduce EMI. See photo above for
new, full size metal package with a true
SMD adapter. For this package option
select option S in part number builder.
STT 5V STA 5V STA 3.3V
250kHz - 135MHz 125kHz - 135MHz 125kHz - 125MHz
250kHz - 135MHz 500kHz - 135MHz 500kHz - 125MHz
Frequency Stability: ±20, ±25, ±50 or ±100 ppm over all conditions: calibration
tolerance, operating temperature, rated input voltage change,
load change, aging*, shock and vibration
Applications & Features
Fibre Channel
Gigabit Ethernet
High performance Processors
True SMD DIL14 version available
High Drive HCMOS, ACMOS or TTL
capability
Tri-State output
Precise Rise/Fall Times
Reduced EMI circuitry
Short circuit protected output
Temperature Range:
Operating:
Storage:
0 to +70°C or -40 to +85°C
-55 to +125°C
Supply Voltage:
Recommended Operating: +5V ±10% or 3.3V ±10% (STA only)
Supply Current: 50mA typ, 70mA max @ 5V or 30mA typ, 45mA max @ 3.3V
Output Drive:
See Part Numbering Guide
See Part Numbering Guide
10% VDD or 0.5V max
90% VDD or 2.5Vmin
50 ACMOS, 95 ACMOS @ 3.3V, 50mA sink & source @ TTL
8ps max
Symmetry:
Rise & Fall Times:
Logic 0:
Logic 1:
Load:
Period Jitter RMS:
Mechanical: MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 2003
MIL-STD-202, Method 211, Conditions B2
MIL-STD-883, Method 2007, Condition A
MIL-STD-202, Method 215
MIL-STD-202, Method 210, Condition A, B or C
Shock:
Solderability:
Terminal Strength:
Vibration:
Solvent Resistance:
Resistance to Soldering Heat:
Environmental:
Gross Leak Test:
Fine Leak Test:
Thermal Shock:
Moisture Resistance:
MIL-STD-883, Method 1014, Condition C
MIL-STD-883, Method 1014, Condition A2
MIL-STD-883, Method 1011, Conditions A
MIL-STD-883, Method 1004
Part Numbering Guide
STA A 9 9 B 3 - 90.0000
* 1 year @ +40°C
ACMOS / TTL
*
R/F times are standard with given frequency ranges, non-standard R/F times available on some models, please contact SaRonix
Symmetry
0 = 40/60% max, 0 to +70°C
A = 45/55% max, 0 to +70°C
STT to 80 MHz max only
STA 3.3V to 109.9999 MHz max only
2 = 40/60% max, -40 to +85°C
STA 3.3V to 109.9999 MHz max only
Standard
*
Rise/Fall Times
1 = STT 4.0ns max 250kHz to 15 MHz full, to 35 MHz ½ size
2 = STT 2.0ns max from 15+ MHz full, 35+ MHz ½ size to 60 MHz
3 = STT 1.0ns max from 60+ MHz to 135 MHz
7 = STA 5.5ns max, 125kHz to 15 MHz full, 500kHz to 35 MHz ½ size
8 = STA 3.5ns max from 15+ MHz full, 35+ MHz ½ size to 60 MHz
9 = STA 2ns max from 60+ MHz to 135 MHz(5V), to 125 MHz(3.3V)
Series
STA = ACMOS compatible, 3.3 or 5V
STT = TTL compatible, 5V only
Frequency (MHz)
Stability Tolerance
AA = ±20ppm, 80MHz max, 0 to +70°C only
A = ±25ppm, 80MHz max, 0 to +70°C only
B = ±50ppm
C = ±100ppm
Supply
blank = 5V (STA or STT, 135MHz max)
3 = 3.3V (STA only, 125MHz max)
Package Size / Style
0 = Full Size
9 = ½ Size
K = Full Size, Gull Wing
J = ½ Size, Gull Wing
N = ½ Size, Gull Wing, Spanked Leads
S = Full Size, True SMD Adapter
Example PN: STT220C - 60.0000
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
All specifications are subject to change without notice.
Crystal Clock Oscillator
Technical Data
DS-108 REV K
SaRonix
3.3 & 5V, HCMOS, ACMOS, TTL
STA / STT Series
Package Details
21.0
.825 max
5.08
.200
.46±.08
.018±.003
15.24±.13
.600±.005
7.75
.305
(4) Glass
Insulators
Pin 1
Tri-State
Control
Pin 7
GND
Pin 14
+5 or +3.3 VDC
Pin 8 Output
FULL SIZE PACKAGE
0.9
.036
max
13.0
.510
max
Denotes Pin 1
SARONIX
XTAL OSC
max
Marking Format
**
Includes Date Code, Frequency & Part Number
HALF SIZE PACKAGE
5.08
.200 max
13.0
.510 max
0.9
.036 max
.46±.08
.018±.003 7.62±.20
.300±.008
Glass Insulators Pin 5
Output
Pin 1
Tri-State
Pin 4
GND
120° 120°
120°
13.0
.510
max
7.62±.20
.300±.008
1.5
.059
Denotes Pin 1
SARONIX
Marking Format
**
Includes Date Code, Frequency & Part Number
Scale: None (Dimensions in )
mm
inches
**
Exact location of items may vary
Output Waveform Tri-State Logic Table
Pin 1 Input
Logic 1 or NC
Logic 0 or GND
Output
Standard Logic
Oscillation
High Impedance
Required Input Levels on Pin 1:
Logic 1 = 2.2V min
Logic 0 = 0.8V max
6.35±.51
.250±.020
6.35±.51
.250±.020
TrTfTrTf
TTL
VDD
GND
SYMMETRYSYMMETRY
LOGIC 0
LOGIC 1
80% VDD
50% VDD
20% VDD
ACMOS
1.5 VDC
2.5 VDC
0.5 VDC
Test Circuit
POWER
SUPPLY
Pin 7 (4)
POWER
SUPPLY
ACMOS
95
Load
0.01 µF
95
TEST
POINT
VCC
OSCILLATOR
Pin 8 (5)
Pin 7 (4)
Pin 14 (8)
OUT
GND
Pin 1 ( 1 )
*
.01 µF
TRI-STATE INPUT
(current limited on fixture)
*
( ) Indicates pin numbers for half-size package
95
ACMOS TEST CIRCUIT (3.3V operation)
mA
M
V M
VCC
OSCILLATOR
Pin 8 (5)Pin 14 (8)
.01 µF
OUT
GND
Pin 1 ( 1 )
*
ACMOS
50
Load
0.01 µF
56
TEST
POINT
TRI-STATE INPUT
(current limited on fixture)
*
( ) Indicates pin numbers for half-size package
50
ACMOS TEST CIRCUIT (5V operation)
mA
M
V M
max
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
Pin 14
+5 or +3.3 VDC