0330.SB0.102 - Bosch Sensortec

Data sheet

BMA220

Digital, triaxial acceleration sensor

BMA220: Data sheet

Document revision 1.15

Document release date 23 August 2011

Document number BST-BMA220-DS003-08

Technical reference code(s) 0 273 141 102

Notes Data in this document are subject to change without notice. Product

photos and pictures are for illustration purposes only and may differ from

the real product’s appearance.

Bosch Sensortec

Data sheet

BMA220 Page 2

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

BMA220

TRIAXIAL 2G TO 16G ACCELERATION SENSOR WITH ON-CHIP

MOTION-TRIGGERED INTERRUPT CONTROLLER

Key features

 Three-axis accelerometer

 Ultra-Small package Mold package (LGA 12ld)

Footprint 2mm x 2mm, height 0.98mm

 Digital interface SPI (4-wire, 3-wire), I²C, interrupt pin

I/O supply voltage range: 1.6V to 3.6V

 Programmable functionality Acceleration ranges ±2g/±4g/±8g/±16g

Bandwidth 1kHz . . . 32Hz

Self test

 On-chip interrupt controller Motion-triggered interrupt-signal generation for

- orientation recognition

- any-motion detection

- tap/double tap sensing

- low-g/high-g detection

Stand-alone capability (no microcontroller needed)

 Ultra-low power ASIC Low current consumption, short wake-up time,

advanced features for system power management

 RoHS compliant, halogen-free

Typical applications

 Display profile switching

 Tap/double tap sensing

 Menu scrolling

 Gaming

 Drop detection for warranty logging

 Advanced system power management for mobile applications

General Description

The BMA220 is a triaxial, low-g acceleration sensor with digital output for consumer market

applications. It allows measurements of acceleration in three perpendicular axes. An evaluation

circuitry (ASIC) converts the output of a micromechanical acceleration-sensing structure

(MEMS) that works according to the differential capacitance principle.

Package and interface have been defined to match a multitude of hardware requirements. Since

the sensor features an ultra-small footprint and a flat package it is ingeniously suited for mobile

applications. The sensor offers a variable I/O supply voltage range from 1.6V to 3.6V and can

be programmed to optimize functionality, performance and power consumption in customer

specific applications. In addition it features an on-chip interrupt controller enabling motion-based

applications without use of a microcontroller.

The BMA220 senses tilt, motion and shock vibration in cell phones, handhelds, computer

peripherals, man-machine interfaces, virtual reality features and game controllers.

Data sheet

BMA220 Page 3

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

Index of Contents

1. SPECIFICATION...................................................................................................................... 5

2. ABSOLUTE MAXIMUM RATINGS .......................................................................................... 7

3. BLOCK DIAGRAM .................................................................................................................. 8

4. GLOBAL MEMORY MAP ........................................................................................................ 9

4.1 CONTROL REGISTERS ........................................................................................................... 9

4.1.1 3-WIRE SPI MODE SELECTION....................................................................................................... 9

4.1.2 LOW-POWER MODE CONFIGURATION ........................................................................................... 10

4.1.3 LOW-POWER MODE DIMENSIONING .............................................................................................. 11

4.1.4 CHANNEL ACTIVATION / DE-ACTIVATION ....................................................................................... 11

4.1.5 SOFT-RESET ............................................................................................................................. 12

4.1.6 SUSPEND MODE ........................................................................................................................ 12

4.2 SETTING REGISTERS ........................................................................................................... 12

4.2.1 ACCELERATION RANGE AND SENSITIVITY SETTING......................................................................... 12

4.2.2 FILTER AND BANDWIDTH CONFIGURATION .................................................................................... 13

4.3 DATA REGISTERS ................................................................................................................ 14

4.3.1 ACCELERATION DATA READ-OUT ................................................................................................. 14

4.3.2 CHIP / REVISION ID .................................................................................................................... 14

4.4 INTERRUPT CONTROL REGISTERS ........................................................................................ 15

5. INTERRUPT CONTROLLERS............................................................................................... 16

5.1 LATCHED VS. NON-LATCHED MODES .................................................................................... 16

5.2 SUPPORTED TYPES OF INTERRUPTS .................................................................................... 17

5.3 POWER-SAVING MODES ...................................................................................................... 17

5.4 ANY-MOTION (SLOPE) DETECTION........................................................................................ 18

5.5 TAP-SENSING ..................................................................................................................... 22

5.6 ORIENTATION RECOGNITION................................................................................................ 24

5.7 LOW-G DETECTION.............................................................................................................. 27

5.8 HIGH-G DETECTION............................................................................................................. 29

5.9 DATA READY DETECTION ..................................................................................................... 30

6. OPERATION MODES............................................................................................................ 31

6.1 DEDICATED MODES (μC-LESS / STAND ALONE)..................................................................... 33

6.2 DIGITAL INTERFACE MODES ................................................................................................. 34

Data sheet

BMA220 Page 4

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

6.3 LOW-POWER MODE AND SUSPEND MODE ............................................................................. 35

6.4 MODE TRANSITION VIA INTERFACE ....................................................................................... 36

6.5 SELF TEST MODE ................................................................................................................ 37

7. INTERFACES ........................................................................................................................ 38

7.1 GENERAL DIGITAL INTERFACE DESCRIPTION......................................................................... 39

7.2 SPI INTERFACE................................................................................................................... 40

7.3 I²C INTERFACE.................................................................................................................... 43

7.4 I²C WATCHDOG TIMER......................................................................................................... 48

7.5 SPI AND I²C ACCESS RESTRICTIONS .................................................................................... 48

8. PIN-OUT AND CONNECTING DIAGRAM............................................................................. 49

8.1 PIN-OUT ............................................................................................................................. 49

8.2 CONNECTING DIAGRAMS ..................................................................................................... 50

9. PACKAGE ............................................................................................................................. 53

9.1 OUTLINE DIMENSIONS ......................................................................................................... 53

9.2 SENSING AXES ORIENTATION AND POLARITY OF THE ACCELERATION OUTPUT ........................ 54

9.3 LANDING PATTERN RECOMMENDATION................................................................................. 55

9.4 MARKING............................................................................................................................ 56

9.4.1 MASS PRODUCTION SAMPLES ..................................................................................................... 56

9.4.2 ENGINEERING SAMPLES ............................................................................................................. 56

9.5 MOISTURE SENSITIVITY LEVEL AND SOLDERING .................................................................... 57

9.6 TAPE AND REEL SPECIFICATION ........................................................................................... 58

9.7 ORIENTATION ..................................................................................................................... 59

9.8 ROHS COMPLIANCY............................................................................................................ 59

9.9 HALOGEN CONTENT ............................................................................................................ 59

9.10 NOTE ON INTERNAL PACKAGE STRUCTURE......................................................................... 59

9.11 HANDLING INSTRUCTION ................................................................................................... 60

10. LEGAL DISCLAIMER.......................................................................................................... 61

10.1 ENGINEERING SAMPLES .................................................................................................... 61

10.2 PRODUCT USE .................................................................................................................. 61

10.3 APPLICATION EXAMPLES AND HINTS................................................................................... 61

11. DOCUMENT HISTORY AND MODIFICATIONS ................................................................. 62

Data sheet

BMA220 Page 5

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

1. Specification

If not stated otherwise, the given values are maximum values over lifetime and full performance

temperature and voltage ranges. Min/max. data represent 3-sigma values.

Table 1: Operating conditions, output signal and mechanical characteristics

Parameter Symbol Condition Min Typ Max Units

OPERATING CONDITIONS

gFS2g ±2.0 g

gFS4g ±4.0 g

gFS8g ±8.0 g

Acceleration Range

gFS16g

switchable via

serial digital

interface

±16.0 g

Supply Voltage

Analog Domain VDDA 1.62 1.8 1.98 V

Supply Voltage

Digital Domain VDDD 1.62 1.8 1.98 V

Supply Voltage

I/O Domain VDDIO 1.62 3.6 V

VIL SPI SPI 0.1*VDDIO V

Voltage Input

Low Level VIL I2C I²C 0.3*VDDIO V

VIH SPI SPI 0.9*VDDIO V

Voltage Input

High Level VIH I2C I²C 0.7*VDDIO V

Voltage Output

High Level VOH SPI & I²C VDDIO V

VOL SPI SPI GND V

Voltage Output

Low Level VOL I2C I²C, RP ≥ 680  0.2*VDDIO V

Supply Current in

Normal Mode IDD Nominal VDD

supplies at TA=25°C 250 A

Supply current in

Low Power Mode IDDsl

Nominal VDD

supplies TA=25°C,

BW = 1kHz

sleep dur. > 25ms

< 10 A

Supply Current in

Suspend Mode IDDsd Nominal VDD

supplies at TA=25°C < 1 A

Wake-Up Time tw_up from sleep/suspend

mode @1kHz bw 1.2 ms

Data sheet

BMA220 Page 6

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

Start-Up Time ts_up POR @1kHz bw 1.5 ms

Operating

Temperature TA -40 +85 C

OUTPUT SIGNAL

Device resolution Dres gFS2g 62.5 mg

S2g gFS2g, TA=25°C 16 LSB/g

S4g gFS4g,TA=25°C 8 LSB/g

S8g gFS8g, TA=25°C 4 LSB/g

Sensitivity

S16g gFS16g, TA=25°C 2 LSB/g

Sensitivity

Temperature Drift TCS -40°C  TA  +85°C ±0.03 %/K

Zero-g Offset Off

TA=25°C,

VDDA=1.8V,

gFS2g

±95 mg

Zero-g Offset

Temperature Drift TCO -40°C  TA  +85°C,

gFS2g ±2 mg/K

Bandwidth bw 1st order filter,

switchable

32/64/

125/

250/

500/

1000

Nonlinearity NL best fit straight line ±2 %FS

TSTx 0.7g*Sx LSB

TSTy 2.0g*Sy LSB

Self Test Response

TSTz

depending on

sensitivity/

acceleration range

0.6g*Sz LSB

Output Noise nrms

rms,

Nominal VDD

supplies TA=25°C,

BW = 1kHz

2 mg/Hz

MECHANICAL CHARACTERISTICS

Cross Axis

Sensitivity S relative contribution

between 3 axes 2 %

Alignment Error a relative to package

outline ±0.5 °

Data sheet

BMA220 Page 7

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

2. Absolute maximum ratings

All voltages below are given with respect to GND.

Table 2: Absolute maximum ratings

Parameter Condition Min Max Units

Voltage at supply pad VDDD and VDDA -0.3 2.0 V

VDDIO -0.3 4.25 V

Voltage at any logic pad Non-supply pad -0.3 VDDIO+0.3 V

Storage temperature range rel. humidity <=65% -50 +150 °C

duration ≤ 200μs 10,000 g

duration ≤ 1.0ms 2,000 g

Mechanical shock

free fall onto

hard surfaces 1.8 m

HBM, at any pin 2 kV

ESD

CDM 500 V

Data sheet

BMA220 Page 8

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

3. Block diagram

The following figure describes the functionality of the two basic parts of the sensor module,

namely mechanical sensor element and evaluating ASIC.

Figure 1: Block diagram BMA220

ASIC VDDA

INT

C1X

C2X

C1Z

C2Z

Mulitplexer

C/U

Control Logic

and

Interrupt Engines

I2C

SPI

Filte

Gain &

Offset

FilterX

Filte

Reference Trimming OTP Clock

CAP0

CSB

SCL

SCK

SDO

SDA

SDI

VSS VDDD VDDIO

Sensor

Element

VSS

Mulit

lexer

Data sheet

BMA220 Page 9

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

4. Global memory map

The memory map below shows all externally accessible data registers which are needed to

operate BMA220.The left columns show the memory addresses. The columns in the middle

depict the content of each register bit. The colors of the bits indicate whether they are read-only,

write-only or read- and writable. The memory is volatile so that the writable content has to be re-

written after each power-on.

The extended address space greater than 0x19 (SPI) / 0x32 (I2C) is not shown. These registers

are reserved for further Bosch factory testing and trimming.

Address

(I²C)

Address

(SPI)

bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 default after

power-up

0x32 0x19 0x00

0x30 0x18 0x00

0x2E 0x17 WDT_TO_en WDT_TO_sel SPI3 0x00

0x2C 0x16 0x00

0x2A 0x15 0x00

0x28 0x14 0x00

0x26 0x13 0x00

0x24 0x12 0x10

0x22 0x11 sbist_sign 0x00

0x20 0x10 serial_high_bw 0x00

0x1E 0x0F unused sleep_en en_x_channel en_y_channel en_z_channel 0x07

0x1C 0x0E reset_int en_low en_high_x en_high_y en_high_z 0x00

0x1A 0x0D en_data en_orient en_slope_x en_slope_y en_slope_z en_tt_x en_tt_y en_tt_z 0x00

0x18 0x0C tt_int low_int high_int data_int slope_int 0x00

0x16 0x0B orient_int int_first_x int_first_y int_first_z int_sign 0x00

0x14 0x0A tip_en 0x08

0x12 0x09 orient_ex slope_filt 0x45

0x10 0x08 tt_filt 0xB5

0xE 0x07 0x7F

0xC 0x06 0x4E

0xA 0x05 0x7F

0x8 0x04 0 0 0x00

0x6 0x03 0 0 0x00

0x4 0x02 0 0 0x00

0x2 0x01 0x00

0x0 0x00 0xDD

Chip ID

tt_samp[1:0]

slope_th[3:0] slope_dur[1:0]

tt_th[3:0] tt_dur[2:0]

acc_z<5:0>

acc_y<5:0>

acc_x<5:0>

Revision ID

low_th[3:0] high_th[3:0]

high_hy[1:0] high_dur[5:0]

low_hy[1:0] low_dur[5:0]

orient_blocking [1:0]

unused

lat_int[2:0]

unused

orient[2:0]

sbist (off,x,y,z)

filt_config[3:0]

unused

range[1:0]

sleep_dur[2:0]

reserved

softreset

suspend

unused

reserved

Figure 2: Memory map

Note:

From SPI  I²C use burst address increment in 0x02h steps.

4.1 Control registers

4.1.1 3-wire SPI mode selection

The BMA220 supports both 4-wire and 3-wire SPI. The protocols are exactly the same except

for the fact that in 3-wire mode, the SDI pin is also used for data output.

The default mode is 4-wire SPI. If 3-wire SPI should be used, the SPI3 bit in register 0x17 (SPI)

must be set to ‘1’.

Data sheet

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BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

4.1.2 Low-power mode configuration

The BMA220 supports a low-power mode. In this low-power mode, the chip wakes up

periodically, enables the interrupt controller and goes back to sleep if no interrupt has occurred.

The procedure is the following:

1. Wake-up.

2. Enable analog front-end and convert acceleration data until the low-pass filters have

settled.

3. Enable integrated interrupt controller and evaluate interrupt conditions.

Once the interrupt conditions have been evaluated and no interrupt has occurred, the

chip goes back to sleep. If no interrupt is enabled, the acceleration for x-, y- and z-axes

are converted once and then the chip goes back to sleep.

4. Sleep for the programmed duration.

Figure 3: sleep and awake phases

The low-power mode can be enabled by setting the sleep_en bit in Reg. 0x0F (SPI) / 0x1E

(I2C) and by enabling the data ready interrupt (or any other interrupt, see chapter 5). The sleep

duration can be configured via the sleep_dur bits in Reg 0x0F (SPI) / 0x1E (I2C).

Table 3: Sleep durations for low-power mode

sleep_dur setting Sleep Duration

000 2ms

001 10ms

010 25ms

011 50ms

100 100ms

101 500ms

110 1s

111 2s

Data sheet

BMA220 Page 11

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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

4.1.3 Low-power mode dimensioning

The power saving that can be achieved depends on the programmed sleep duration and the

configured bandwidth. Figure 4 explains the power consumption in relation to the different ASIC

states (sleep and awake phases).

Figure 4: Sleep and awake phase

If a low bandwidth is selected, the time required for filter settling might be the dominating time.

Refer to table 2 for the appropriate dimensioning of the attainable current saving.

Table 4: Approximate awake phase times for 1 data sample

Filter cut-off Settling time

32 Hz 16690µs

64 Hz 8690µs

125 Hz 4690µs

250 Hz 2690µs

500 Hz 1690µs

1000 Hz 1190µs

4.1.4 Channel activation / de-activation

In order to optimize further power consumption of the BMA220, data evaluation of individual

axes can be deactivated. Per default, all three axes are active. If the user wants to disable one

or more axes, the appropriate en_?_channel bits at address 0x0F (SPI) / 0x1E (I2C) must be

set to ‘0’.

Data sheet

BMA220 Page 12

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

4.1.5 Soft-reset

The BMA220 can be put into a soft-reset state by performing a read from the soft-reset address.

To bring the chip back into operation, another read must be performed from the same memory

address. The reading returns value 0xFF if the system was in soft reset mode; otherwise it

returns value 0x00.

Please note that all internal configuration data programmed by the user will be lost.

4.1.6 Suspend mode

The BMA220 can be put into a suspend mode e.g. to easily achieve a power consumption

below 1μA by performing a read from the suspend address. To bring the chip back into normal

mode operation, another read must be performed from the same memory address. The reading

returns value 0xFF if the system was in suspend mode, otherwise it returns value 0x00.

Please note, that during suspend, all analog modules expect for power-on-reset will be disabled.

Only reads through the serial interface are supported during suspend.

4.2 Setting registers

4.2.1 Acceleration range and sensitivity setting

The BMA220 has four different range settings for the full scale acceleration range. In

dependence of the use case always the lowest full scale range with the maximum resolution

should be selected. Please refer to literature to find out, which full scale acceleration range,

which sensitivity or which resolution is the ideal one.

This can be configured via the register bits range[1:0] at address 0x11 (SPI) / 0x22 (SPI).

The following table shows the range bits with corresponding scale and resolution.

Table 5: Acceleration resolution

range[1:0] Full Scale Sensitivity Resolution Example use case

‘00’ ±2g 16 LSB / g 62.5mg / LSB Orientation

recognition

‘01’ ±4g 8 LSB / g 125mg / LSB

‘10’ ±8g 4 LSB / g 0.25g / LSB Gaming

‘11’ ±16g 2 LSB / g 0.5g / LSB Shock vibration

detection

Data sheet

BMA220 Page 13

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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

4.2.2 Filter and bandwidth configuration

The BMA220 has a digital filter that can be configured by setting the corresponding register bits

filter_config[3:0] at address 0x10 (SPI) / 0x20 (I2C). For compatibility reasons the settings

are defined based on BMA120. To always ensure an ideal cut off frequency of the filter the

BMA220 is adjusting the sample rate automatically.

Table 6: Digital filter configuration

filter_config[3:0] 0x5 0x4 0x3 0x2 0x1 0x0

digital filter cut-off frequency 32Hz 64Hz 125Hz 250Hz 500Hz 1kHz

The internal SC-filter has a fix cut-off frequency at 1 KHz. In addition to the internal SC-filter a

digital filter is available which is providing a filtered and an unfiltered data stream for all of the 3

axes of acceleration.

If application specific reasons require a bandwidth configuration <32Hz, please contact your

Bosch Sensortec representative.

Data sheet

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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

4.3 Data registers

4.3.1 Acceleration data read-out

The acceleration data can be read-out through addresses 0x02 (SPI) / 0x04 (I2C) through

0x04 (SPI) / 0x08 (I2C). The acceleration data is in 2’s complement according to the table

below.

An efficient way to read out the acceleration data in I²C or SPI mode is the burst-accesses.

During such an access, the BMA220 automatically increments the read address after each byte.

By using this kind of access, the data transferred over the I²C bus can be reduced by up to 50%.

Table 7: Acceleration register content

Decimal value Acceleration

(in 2g range mode)

+ 31 + 1.94g

… …

0 0g

… …

-32 - 2.0g

Per default, the bandwidth of the data being read-out is limited by the internal low-pass filters

according to the filter configuration. However, it is possible to read-out data only 1st order filtered

(1 kHz) even though the internal filters are configured differently.

The reason for this feature is that the interrupt controller may operate on low-bandwidth data

while the external master still needs to operate on high-bandwidth data.

Unfiltered (1kHz high-bandwidth) data can be read-out through the serial interface when the

serial_high_bw bit is set to ‘1’. Per default, filtered data is read-out through the serial

interface.

4.3.2 Chip / revision ID

The chip ID and the revision ID can be read-out through addresses 0x00 (SPI & I2C) and

0x01 (SPI) / 0x02 (I2C).

Table 8: Chip and revision ID

Chip ID Revision ID

0xDD 0x00

Data sheet

BMA220 Page 15

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

4.4 Interrupt control registers

The BMA220 features a programmable interrupt controller that directly supports common mobile

applications like tap sensing detection, orientation recognition and any-motion detection.

Supported types of interrupts:

 Any-motion (slope) detection

 Tap/double-tap sensing

 Orientation recognition

 Low-g detection

 High-g detection

 Data-ready interrupt

The configuration and status register bits of all interrupt engines and the exact interrupt

functionality are given in chapter 5.

Data sheet

BMA220 Page 16

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

5. Interrupt controllers

The BMA220 integrates a programmable interrupt controller. It can be configured via SPI/I2C to

monitor individual axes (X-, Y- and Z-axis) and check whether certain conditions apply (e.g. the

acceleration on one axis exceeds a certain threshold). The interrupt controller of the BMA220 is

capable of checking for certain conditions simultaneously.

If at least one of the configured conditions applies, an interrupt (logic ‘1’) is issued through the

INT pin of the sensor. More details about the triggering condition (e.g. the type of the interrupt or

the axis that triggered the interrupt) are saved in internal status registers and can be read out

through the digital interface.

It is recommended to reset the interrupt controller by setting reset_int to '1' when the

interrupt settings has been set or changed.

5.1 Latched vs. non-latched modes

The interrupt controller can be used in two modes

 Latched mode: Once one of the configured interrupt conditions applies, the INT pin is

asserted and must be reset by the external master through the digital interface.

 Non-Latched mode: The interrupt controller clears the INT signal once the interrupt

condition no longer applies.

The interrupt output can be programmed by lat_int[2:0] to be either unlatched (‘000’) or latched

permanently (‘111’) or have the latch time of 0.25s(‘001’)/0.5s(‘010’)/1s(‘011’)/2s(‘100’)/4s

(‘101’)/8s(‘110’). The setting of these bits applies to all types of interrupts.

Figure 5: Interrupt output

Interrupt int from

interrupt enigne

interrupt output

unlatched

latched for certain

time

latched permanently

latch time

Data sheet

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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

5.2 Supported types of interrupts

The following interrupt modes are provided by the BMA220.

 Any-motion (slope) detection

 Tap/double-tap sensing

 Orientation recognition

 Low-g detection

 High-g detection

 Data-ready interrupt

5.3 Power-saving modes

In order to reduce power consumption of the sensor itself, the BMA220 supports a low-power

mode in which the ASIC wakes up periodically, checks whether any of the configured interrupt

conditions apply and then either goes back to sleep (no interrupt) or stays awake (interrupt).

The BMA220’s PMU (power management unit) controls the transitions from the ‘awake state’

into the ‘sleep state’ and vice versa.

In normal mode, the interrupt controller is permanently turned on to continuously process the

incoming data. In low-power mode, the interrupt controller will be turned on by the PMU once

the chip has fully woken up. The time it takes before the sensor can go back to sleep is

determined by the active interrupt engines. Once all active engines indicate that no interrupt

condition applies, the PMU will switch the sensor back into sleep state.

Furthermore the applied interrupt condition can be used not only to enable the low-power mode

of the sensor itself but for the whole system. This enables a dramatically reduced power

consumption of the whole system. The result is an extended operation and stand-by time e.g. of

mobile devices in an order of magnitude.

Data sheet

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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

5.4 Any-motion (slope) detection

The any-motion detection uses the slope between two successive acceleration signals to detect

changes in motion. It generates an interrupt when a preset threshold slope_th is exceeded. The

threshold can be configured between 0 and the maximum acceleration value corresponding to

the selected measurement range. The time difference between the successive acceleration

signals depends on the bandwidth of the configurable low pass filter and corresponds roughly to

1/(2*bandwidth) (Δt=1/(2*bw)).

In order to suppress failure signals, the interrupt is only generated if a certain number slope_dur

of consecutive slope data points is above the slope threshold slope_th.

If the same number of data points falls below the threshold, the interrupt is reset.

The criteria for any-motion detection are fulfilled and the slope interrupt is generated if any of

the enabled channels exceeds the threshold slope_th for slope_dur consecutive times. As soon

as all the enabled channels fall or stay below this threshold for slope_dur consecutive times the

interrupt is reset unless interrupt signal is latched.

The any-motion interrupt logic sends out the signals of the axis that has triggered the interrupt

(slope_first_x, slope_first_y, slope_first_z) and the signal of motion direction (slope_sign).

When serial interface is active, any-motion detection logic is enabled if any of the any-motion

enable register bits is set. To disable the any-motion interrupt, clear all the axis enable bits.

In the dedicated wake-up mode ( 6.1), all three axes are enabled for any-motion detection

whether the individual axis enable bits are set or not.

Data sheet

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Note: Specifications within this document are subject to change without notice.

Figure 6: Any-motion (slope) interrupt detection

The following table shows the signals used in any-motion detection. After reset, a default value

will be assigned to each register.

slope_th

INT

slope

acceleration

acc(t0)

acc(t0−1/(2*bw)

slope(t0)=acc(t0)−acc(t0−1/(2*bw))

time

slope_dur slope_dur

Data sheet

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Table 9: Control and status register for any motion detection

Name

Address

(SPI) *

Description Number of

bits Reset-value

en_slope_x

en_slope_y

en_slope_z

0x0D.5

0x0D.4

0x0D.3

enable slope detection on x-axis

enable slope detection on y-axis

enable slope detection on z-axis

3 “000”

slope_th 0x09[5:2]

define the threshold level of the

slope

1 LSB threshold is 1 LSB of

acc_data

SLOPE_T

H_NUM

SLOPE_TH_I

NIT (“0001”)

slope_dur 0x09[1:0]

define the number of consecutive

slope data points above slope_th

which are required to set the

interrupt

(“00” = 1,”01” = 2,”10” = 3, “11” = 4)

SLOPE_D

UR_NUM

SLOPE_DUR

_INIT (“01”)

slope_filt 0x09.6

defines whether filtered or unfiltered

acceleration data should be used

(evaluated)

(‘0’=unfiltered, ‘1’=filtered)

1 ‘1’

slope_int 0x0C.0 whether slope interrupt has been

triggered 1 ‘0’

slope_first_x

slope_first_y

slope_first_z

whether x-axis has triggered the

interrupt (0=no, 1=yes)

whether y-axis has triggered the

interrupt (0=no, 1=yes)

whether z-axis has triggered the

interrupt (0=no, 1=yes)

3 “000”

slope_sign

global register bit for all interrupts

define the slope sign of the

triggering signal (0=positive slope,

1=negative slope)

1 ‘0’

* For determining the corresponding I2C register address, please refer to figure 2 in chapter 4 (memory map)

Data sheet

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Note: Specifications within this document are subject to change without notice.

Figure 7: Tap sensing interrupt detection

When a tap-sensing interrupt is triggered, the following details can be read from the

corresponding registers: the axis that has triggered the interrupt (tt_first_x, tt_first_y, tt_first_z)

and the motion direction of the triggering acceleration signal (tt_sign).

shock=50ms

tt_th

single tap detection

(

slo

time

1st TAP

uiet = 30ms tt

dur = 12.5 ÷ 500 ms

2nd TAP

shock=50ms ta

uiet = 30ms

time

double tap detection

timee

Data sheet

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5.5 Tap-sensing

Tap sensing has the same functionality as a common laptop touch-pad. If 2 taps occur within a

short time, a pre-defined action will be performed by the system. If time between 2 taps is too

long or too short no action happens.

When the serial interface is activated, tap sensing is enabled if any of the tap sensing enable

axis enable bits.

When the preset threshold tt_th is exceeded, a tap-shock is detected. The tap sensing interrupt

is generated only when a second tap is detected within a specified period of time.

The slope between two successive acceleration data has to exceed tt_th to detect a tap-shock.

The time difference between the two successive acceleration values depends on the bandwidth

of the low pass filter. It roughly corresponds to 1/(2*bandwidth).

The time delay tt_dur between two taps is typically between 12,5ms and 500ms. The threshold

is typically between 0.7g and 1.5g in 2g measurement range. Due to different coupling between

sensor and device shell (housing) and different measurement ranges of the sensor these

parameters are configurable.

The criteria for tap sensing are fulfilled and the interrupt is generated if the second tap occurs

after tap_quiet and within tt_dur. The tap sensing direction is determined by the 1st tap. During

tt_quiet period (30ms) no taps should occur. If a tap occurs during tap_quiet period it will be

connoted as new tap.

The slope detection interrupt logic stores the direction of the (first) tap-shock in a status register.

This register will be locked for tap_shock=50ms in order to prevent other slopes to overwrite this

information.

When a tap sensing interrupt is triggered, the signals of the axis that has triggered the interrupt

(tt_first_x, tt_first_y, tt_first_z) and the signal of motion direction (tt_sign) are stored in the

corresponding registers.

The axis on which the biggest slope occurs will trigger the first tap. The second tap will be

triggered by any axis (not necessarily same as the first tap).

The register tap_en defines whether single tap or double tap shall be detected.

In dedicated tap sensing mode, all three axes are enabled for double tap sensing detection.

Data sheet

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Table 10: Control and status register for tap sensing

Name

Address

(SPI) *

Description Number of

bits Reset-value

en_tt_x

en_tt_y

en_tt_z

0x0D.2

0x0D.1

0x0D.0

enable tap sensing detection

on x-axis

enable tap sensing detection

on y-axis

enable tap sensing detection

on z-axis

3 “000”

tt_th 0x08[6:3]

define the threshold level of the tap

sensing slope

1 LSB is 2*(LSB of acc_data)

TT_TH_NUM

TT_TH_INIT

“0110”

tt_dur 0x08[2:0]

define the maximum delay of the

second tap after the shock

suppression (50, 105, 150, 219,

250, 375, 500, 700)ms

TT_DUR_NU

TT_DUR_INIT

“101”

tt_filt 0x08.7

defines whether filtered or unfiltered

acceleration data should be used

(evaluated) (‘0’=unfiltered,

‘1’=filtered)

1 ‘1’

tip_en 0x0A.4 whether tap or double-tap shall be

detected (0= double tap, 1=tap) 1 ‘0’

tt_int 0x0C.4 whether tap sensing interrupt has

been triggered (0=no, 1=yes) 1 ‘0’

tt_samp 0x0A[1:0]

number of data to be sampled after

wake-up

‘00’ => 2 data

‘01’ => 4 data

‘10’ => 8 data

‘11’ => 16 data

2 ‘00’

tt_first_x

tt_first_y

tt_first_z

whether x-axis has triggered the

interrupt (0=no, 1=yes)

whether y-axis has triggered the

interrupt (0=no, 1=yes)

whether z-axis has triggered the

interrupt (0=no, 1=yes)

3 “000”

tt_sign give the slope sign of the triggering

signal (0=positive, 1=negative) 1 ‘0’

* For determining the corresponding I2C register address, please refer to figure 2 in chapter 4 (memory map)

Data sheet

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Note: Specifications within this document are subject to change without notice.

5.6 Orientation recognition

The orientation recognition feature informs on an orientation change of the sensor with respect

to the gravitational field vector g. The measured acceleration vector components with respect to

the gravitational field look as follows.





[with respect to graviational field vector g (black dot = pin 1 identifier)]

Figure 8: Definition of acceleration-vector components

acc_x = 1g·sin·cos

acc_y = −1g·sin·sin

acc_z = 1g·cos

→ acc_y/acc_x = −tan

The output register is called orient and defined in the following way:

‘0xx’ upward looking (z>0):

‘000’ portrait upright (315°<<45°) → |acc_y/acc_x|<1 && acc_x>0

‘001’ portrait upside down (135°<<225°) → |acc_y/acc_x|<1 && acc_x<0

‘010’ landscape left (45°<<135°) → |acc_y/acc_x|>1 && acc_y<0

‘011’ landscape right (225°<<315°) → |acc_y/acc_x|>1 && acc_y>0

‘1xx’ downward looking (z<0), xx as before

Data sheet

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Figure 9: Orientation definition and interrupt thresholds with respect to the angle phi 

The criteria for portrait/landscape switching is fulfilled and the interrupt is generated when the

threshold |acc_y/acc_x|=1 is crossed (i.e. 45°, 135°, 225°, 315°). As soon as the interrupt is set,

no new interrupt is generated within the hysteresis level of 0.66<|acc_y/acc_x|<1.66

corresponding to a hysteresis interval of 13% around the threshold.

It is possible to block the orientation detection depending on certain conditions (no orientation

interrupt will be triggered). This orientation interrupt blocking feature is configurable via the

orient_blocking[1:0] bits in the following manner:

 ‘00’  interrupt blocking is completely disabled.

 ‘01’  no interrupt is generated, when |z|>0.9g OR |x|+|y| < 0.4g OR when the slopes of

the acceleration data exceeds 0.2g (sample-to-sample).

 ‘10’  no interrupt is generated, when |z|>0.9g OR |x|+|y| < 0.4g OR while the slopes of

the acceleration data exceeds 0.3g (sample-to-sample).

 ‘11’  no interrupt is generated, when |z|>0.9g OR |x|+|y| < 0.4g OR while the slopes of

the acceleration data exceeds 0.4g (sample-to-sample).

For all states where interrupt blocking through slope detection is used, the interrupt should be

re-enabled after the slope has been below the threshold for 3 times in a row.

For all states where interrupt blocking is enabled, in order to trigger the interrupt, the orientation

should remain the same (stable) until the timer runs out (for ~100ms). The timer starts to count

when orientation changes between two consecutive samples. If the orientation changes while

timer is still counting, the timer is restarted.

The criteria for switching from upward to downward looking fulfilled and the interrupt is

generated when the threshold z=0g is crossed. As soon as the interrupt is set, no new interrupt

is generated within the hysteresis level of -0.4g<z<0.4g (i.e. 25° tilt around vertical position).

-2

-1.5

-1

-0.5

0.5

1.5

0 45 90 135 180 225 270 315 360

phi

acc_y/acc_x

acc_x/sin(theta)

acc_y/sin(theta)

portrait upright landscape left portrait upside

down

landscape right portrait upright

-2

-1.5

-1

-0.5

0.5

1.5

0 45 90 135 180 225 270 315 360

phi

acc_y/acc_x

acc_x/sin(theta)

acc_y/sin(theta)

portrait upright landscape left portrait upside

down

landscape right portrait upright

Data sheet

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Note: Specifications within this document are subject to change without notice.

The given specification is valid for an upright mounted PCB. In order to enable also horizontal

mounting, x and z axis can be exchanged via the register orient_ex. The x-, y-, z-axis will keep

right-hand principle after the exchange.

When serial interface is active, orientation detection is enabled if the enable bit en_orient is set.

To disable the orientation interrupt, clear the enable bit.

When the dedicated orientation mode is active, the orientation is given by certain output pins

corresponding to the above-given definition of the orient register. For details on the output pins

see section 6.1.

In case the orientation interrupt condition has been satisfied and interrupt is not latched, int

signal is asserted for one data sampling period unless no-reset condition applies.

Table 11: Control and status register for orientation recognition

Name

Address

(SPI) *

Description Number of

bits

Reset-

value

orient_ex 0x09.7

exchange x- and z-axis in

algorithm, i.e x or z is relevant axis

for upward/downward looking

recognition (0=z, 1=x)

1 ‘0’

Orient 0x0B[6:4]

give the orientation of the sensor

with respect to the gravitational

force

ORIENT

_INIT

‘000’

orient_int 0x0B.7 whether orientation interrupt has

been triggered (0=no, 1=yes) 1 ‘0’

en_orient 0x0D.6 enable signal for orientation

detection 1 ‘0’

orient_blocking 0x0A

Enable/configure orientation

interrupt disable criteria.

‘00’ -> no slope, no wait

‘01’ -> no slope, wait-only

(~100ms)

‘10’ -> wait 100ms + |z|-criteria,

|x|+|y|-criteria and <0.2g slope

‘11’ -> wait 100ms + |z|-criteria,

|x|+|y|-criteria and <0.4g slope

2 ‘10’

* For determining the corresponding I2C register address, please refer to figure 2 in chapter 4 (memory map)

Data sheet

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5.7 Low-g detection

For freefall detection, the absolute values of the acceleration data of all axes are observed

(global criteria). A low-g situation is likely to occur when all axes fall below a lower threshold

low_th. The interrupt will be generated if the measured acceleration falls below the threshold

and stays below the hysteresis level low_th+low_hy for a minimum number of data points

(low_dur). Thus, the duration of a released interrupt is depending on the data sampling rate

which is related to the bandwidth.

Figure 10: Low-g interrupt detection

acceleration

low_dur

counter value

time

low_th

INT

(not latched)

low_th + low_hy

not latched

latched

Data sheet

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Table 12: Control and status register for low-g detection

Name

Address

(SPI) *

Description Number of bits Reset-value

Low_th 0x06[7:4] define the low-g threshold level

1 LSB is 2*(LSB of acc_data)

LOW_TH_NUM

LOW_TH_INIT

“0100”

Low_hy 0x07[7:6] define the low-g hysteresis level

1 LSB is 2*(LSB of acc_data)

LOW_HY_NUM

LOW_HY_INI

“01”

low_dur 0x07[5:0]

define the number of measured

data which has to be lower than

low_th+low_hy to set the

interrupt (max. 64)

LOW_DUR_NUM

LOW_DUR_IN

“111111” (3F)

en_low 0x0E.3 enable signal for low-g

detection 1 ‘0’

low_int 0x0C.3 whether low-g interrupt has

been triggered (0=no, 1=yes) 1 ‘0’

* For determining the corresponding I2C register address, please refer to figure 2 in chapter 4 (memory map)

Data sheet

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5.8 High-g detection

For indicating high-g events, an upper threshold can be programmed. The threshold high_th,

the hysteresis high_hy and the duration high_dur are defined analogously to the low-g interrupt.

The interrupt is generated if one of the three channels exceeds the threshold hight_th and does

not fall below hysteresis level high_th-high_hy for minimum number of data points (high_dur).

When the high-g interrupt is triggered, the signals of the axis that has triggered the interrupt

(high_first_x, high_first_y, high_first_z) and the signal of motion direction (high_sign) will be

stored in the corresponding status registers.

Table 13: Control and status register for high-g detection

Name

address

(SPI) *

Description Number of bits Reset-value

high_th 0x06[3:0]

define the high-g threshold

level

1 LSB is 2*(LSB of acc_data)

HIGH_TH_NU

HIGH_TH_INI

“1110”

high_hy 0x05[7:6]

define the high-g hysteresis

level

1 LSB is 2*(LSB of acc_data)

HIGH_HY_NU

HIGH_HY_INI

“01”

high_dur 0x05[5:0]

define the number of

measured signals which has

to be higher than

high_th+high_hy to set the

interrupt (max. 64)

HIGH_DUR_N

HIGH_DUR_I

NIT

“011111” (3F)

en_high_x

en_high_y

en_high_z

0x0E.2

0x0E.1

0x0E.0

enable high-g detection on x-

axis (0=disabled, 1=enabled)

enable high-g detection on x-

axis (0=disabled, 1=enabled)

enable high-g detection on x-

axis (0=disabled, 1=enabled)

3 “000”

high_int 0x0C.2 whether high-g interrupt has

been triggered (0=no, 1=yes) 1 ‘0’

high_first_x

high_first_y

high_first_z

whether x-axis has triggered

the interrupt (0=no, 1=yes)

whether y-axis has triggered

the interrupt (0=no, 1=yes)

whether z-axis has triggered

the interrupt (0=no, 1=yes)

3 “000”

high_sign

give the slope sign of the

triggering signal (0=positive,

1=negative)

1 ‘0’

* For determining the corresponding I2C register address, please refer to figure 2 in chapter 4 (memory map)

Data sheet

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5.9 Data ready detection

This interrupt provides the possibility of synchronously reading out data from the BMA220

without missing a single data point. The data update detection monitors the data_update signals

for all axes. It generates an interrupt as soon as the acceleration values for all enabled axes

have been updated. The signal en_x_channel, en_y_channel and en_z_channel are the enable

signals for the data conversion from each axis accordingly. The three enable signals can be

configured by users (see section 4.1.4). For example, if all three axes are enabled, the interrupt

is generated after updated signals for x-, y-, and z-axes have been detected.

When data ready detection is activated, all other interrupts are not propagated to the INT pin.

However their status can still be obtained from the appropriate registers.

When the data-ready interrupt is not latched, the interrupt is cleared automatically after ~150μs.

Table 14: Control and status register for low

Name Description Number of bits Reset-value

en_data enable signal for data-ready detection 1 ‘0’

data_int whether data-ready interrupt has been

triggered (0=no, 1=yes) 1 ‘0’

Data sheet

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6. Operation modes

Depending on the configuration the BMA220 is able to operate in two different types of modes

 General mode: A serial interface is active (SPI or I2C). Several interrupt engines may be

activated in parallel. Through the serial interface, the external master (e.g. μC) can

configure the interrupts of the BMA220 and read-out information about the current

interrupt status.

 Dedicated mode: No serial interface is present. Internal default settings for all interrupt

engines must be used. In these modes, only one interrupt engine can be active at a

time. Currently, dedicated modes exist for the orientation interrupt, the tap sensing

interrupt and the any-motion interrupt. The dedicated mode allows the sensor to be

operated as a stand alone device, e.g. without any μC and without dealing with any

acceleration data. So, in a very user friendly and convenient way taps/double-taps,

orientation changes and wake-ups can be processed by a simple μC-less system.

A flow chart of the different modes is depicted in figure 11:

General mode with

I2C

reset

Wake-up modeTip-tap mode Orientation mode

Any of the

dedicated

mode invoked?

Any-motion

interrupt is

enabled

Tip-tap

interrupt is

enabled

orientation

interrupt is

enabled

One or more

interrupts can be

configured via I2C

yes

no PS = ´0´? General mode with

SPI

One or more

interrupts can be

configured via SPI

yes

Figure 11: Interrupt modes

Data sheet

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Table 15: Mode selection

Mode PS SCK INT

SPI 0

I²C 1

Dedicated

orientation Z 0

Dedicated tap

sensing Z 1 0

Dedicated wake-

up Z 1 1

Please note that the PS must be connected to the appropriate supply (or left floating) at start-up

(reset). The “Z-detection” circuit will be turned off when a stable value at the PS pin has been

detected. Thus, the dedicated modes can be only activated after reset. Switching from one

interface mode to another during operation may work but can not be guaranteed by the ASIC.

The reason for this limitation is that the circuitry for z-detection consumes several μA.

For debugging/test purposes, turning-off the z-detection circuitry can be suppressed by setting

the comp_always_on bit within the OTP memory range.

Table 16: Pin assignments for all operation modes

2 1 101251163478, 9

SDI SDO CSB SCK INT PS CAP0 VDDIO VDDD VDDA GND

SDI SDO CSB SCK INT GND NC VDDIO VDDD VDDA GND

SDA NC CSB SCK INT GND NC VDDIO VDDD VDDA GND

SDA NC I2C lsb_invert SCL INT VDDIO NC VDDIO VDDD VDDA GND

Orientation ORIENT_0 ORIENT_1 sleep_time GND ORIENT_2 NC NC VDDIO VDDD VDDA GND

Tap sensing SINGLE_TAP DOUBLE_TAP sleep on VDDIO GND NC NC VDDIO VDDD VDDA GND

Wake-up WAKE_UP_INT NC sleep_time VDDIO VDDIO NC NC VDDIO VDDD VDDA GND

I2C

Dedicated

mode

(w/o μC);

stand-alone

Pin #

Mode

SPI 4 wire

SPI 3 wire

Data sheet

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6.1 Dedicated Modes (μC-less / stand alone)

After reset (POR, soft-reset or reset pin) the system monitors the pin PS (Protocol Select). If the

pin is unconnected, an internal module detects the floating state and enables one of the

dedicated modes depending on the other select pins (SCK, INT).

There are three different dedicated modes:

 Orientation detection mode: only orientation interrupt detection is enabled.

 Tap/double-tap detection mode: only tap sensing interrupt detection is enabled.

 Wake-up detection mode: only wake-up interrupt detection is enabled.

In dedicated mode, the interrupt engine uses default settings for all configuration registers.

Those default settings are loaded after reset and are listed in section 5. Changing the default

configuration of the registers is not possible while the chip is in the dedicated mode.

Currently, in orientation and wake-up mode, the user can select between two different sleep

durations via the CSB pin:

Table 17: Sleep durations for dedicated modes

Dedicated Mode CSB Sleep duration

0 100ms Dedicated

orientation 1 1s

0 10ms

Dedicated wake-up 1 500ms

0 No sleep Dedicated tap-

sensing 1 2ms

Table 18: Filter bandwidths for dedicated modes

Dedicated Mode Bandwidth

Dedicated orientation 32Hz

Dedicated wake-up 16Hz

Dedicated tap-sensing 1kHz

Data sheet

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6.2 Digital interface modes

The BMA220 supports two different digital interfaces (SPI and I²C). The currently active general

interface is determined by the primary input PS. The configuration of interrupt engines is fully

customizable via the defined digital interface.

 SPI Active Mode: The SPI interface is enabled while PS is externally connected to GND

(logic ‘0’ detected).

 I2C Active Mode: The I²C interface is enabled while PS is externally connected to VDDIO

(logic ‘1’ detected).

Data sheet

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6.3 Low-power mode and suspend mode

The BMA220 is optimized for low power consumption. Note: Simply switching-off of the power

supplies (VDDD and/or VDDA) is not a defined low-power mode.

The deactivation of VDDD while VDDA is active (or vice versa) is not recommended for permanent

operation. With respect to the application it might be useful to switch-off VDDIO while VDDD and

VDDA are active. This condition is supported and will lead to a reduction of current consumption.

The sensor register map will be reset.

To reduce current consumption in a defined way, the BMA220 supports two energy saving

modes: a suspend mode and a low-power mode.

During normal mode operation, all analog modules are held powered-up and the clock for all

digital modules is active. During low-power mode, the analog modules in the rate channel are

held powered down and the clock of the digital rate, filter and trimming modules is gated. The

average typical current consumption during sleep phase (ilow_power_mode) can be estimated by the

following equation:

First approximation: isleep = isuspend

Ø typ.

awakesleep

activeactivesuspendsleep

epowerlow tt

itit

i







mod__

For sleep phase time setting (tsleep) refer to chapter 4.1.2 table 3.

For approximate awake phase time (tawake) refer to chapter 4.1.3 table 4.

For current consumption in normal mode (iactive) refer to chapter 1.

For current consumption in suspend mode (isuspend) refer to chapter 1.

Example: Bandwidth (BW) = 1kHz, nominal supplies

 resulting awake phase for 1st data sample (tawake) = 1190μs = 1.190ms

 resulting sleep time (tsleep) = 50 ms

Ø typ. µA

msms µAmsµAms

itit

awakesleep

activeactivesuspendsleep

epowerlow 8,6

190,150 250190,1150

mod__ 















Data sheet

BMA220 Page 36

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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

6.4 Mode transition via interface

While the SPI or the I²C interfaces are active, transitions between the individual modes can be

triggered via register accesses.

1. Low power: The BMA220 switches into low-power mode after setting the sleep_en

wake-up is performed (please refer to section 4.1.2). Normal mode operation is resumed

after writing a ‘0’ to the sleep_en register. The sleep register is user accessible.

2. Suspend: The BMA220 is put into suspend mode by reading from the suspend address.

A subsequent read switches back to the previous state. Concluding, a read from the

suspend address toggles the suspend register.

Figure 12: Energy saving mode transitions

Data sheet

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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

6.5 Self test mode

The sensor features an on-chip self-test mode. The self test is realized by a physical deflection

of the seismic mass due to an applied electrostatic force. Thus, it provides full testing of the

complete signal evaluation path including the micromachined sensor structure and the

evaluation ASIC.

The self test mode can be activated individually for each axis by setting the the sbist register to

the corresponding value (‘01’=x-axis, ‘10’=y-axis, ‘11’=z-axis). The self test works in all

acceleration ranges. By setting the sbist_sign register to ‘1’, the polarity of the self test signal

can be changed from positive to negative.

The self test response remains as a static offset on the output as long as the sbist register is not

set back to ‘00’. While the self test is activated, any acceleration or gravitational force applied to

the sensor will be observed in the output signal as a superposition of both acceleration and self

test signal.

self test response

output signal [LSB]

sbist register

sbist_sign register

Figure 13: Self-test mode

Data sheet

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Note: Specifications within this document are subject to change without notice.

7. Interfaces

The BMA220 can connect to the host system via three interfaces:

 SPI (3-wire, 4-wire)

 I²C

 Dedicated mode pins (for μC-less- or stand-alone operation, see section 6.1)

In SPI and I²C mode, the BMA220 supports two commands: read and write. The ASIC can be

entirely controlled through those commands. A detailed register to address mapping can be

found in section 4.

It should be noted that there is no way to access internal control or configuration registers while

the BMA220 is in one of its dedicated modes.

In I²C and SPI mode, the internal registers can be accessed via a 7-bit address. Each read- and

write-cycle accesses 8 bits only.

BusSlave2

BusSlave1 BusGateway

SPI

I2C

BusSlave0

I/O Bus

BusAdapter

Figure 14: BMA220 I/O bus concept

The SPI and I²C interfaces are connected to the internal bus gateway which activates either one

of the two interfaces according to the current mode. All internal digital modules accessible via

the serial interfaces are called bus slave. Each slave is connected to the internal bus through a

bus adapter.

Data sheet

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Note: Specifications within this document are subject to change without notice.

7.1 General digital interface description

In general there are two common digital protocols selectable, the serial interfaces I²C and SPI.

By default, SPI is used in the standard 4-wire configuration. The SPI interface may be

configured by SW to operate in 3-wire interface mode, instead of standard 4-wire mode.

The two serial interfaces are mapped onto the same pads. An external pin is needed to switch

between the interfaces. When this protocol select pin (PS) is connected to VSS, SPI is selected

as the current interface; when the select pin is connected to VDDIO, I²C is used as the interface.

When select pin is left floating, one of the dedicated modes is selected.

The BMA220 doesn’t provide a functional analog output of the three axes since there is just

CAP0 available in the package.

Table 19: Interface pin name

PIN Name PIN description

CSB SPI serial enable bar

SCK/SCL SPI serial clock (SCK)

I²C serial clock (SCL)

SDI/SDO/SDA

SPI serial data input (SDI)

SPI serial data output in 3-wire SPI mode (SDO)

I²C serial data (SDA)

SDO SPI serial data output

Data sheet

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Note: Specifications within this document are subject to change without notice.

7.2 SPI interface

The SPI interface integrated in BMA220 is a slave SPI. 16-bit protocols are used for single byte

reading and writing. Multiple bytes read-out is also possible. However, multiple bytes write is not

supported. The BMA220 supports SPI only in SPI mode 3 (CPOL = 1, CPHA = 1).

4-wire SPI and 3-wire SPI are using same protocols. The communication starts with a read/write

control bit followed by 7 bits address and at least 8 bits data. In case of reading out of

acceleration data from all axes the chip provides the option to use an automatic incremented

read command to read more than one byte (multiple read). This is activated when the SPI serial

enable pin CSB is held low during the data readout. Thus data from next address will be

automatically read out if the CSB are kept low for another 8 SPI clock cycles.

4-wire SPI protocol and timing

4-wire SPI is the default serial interface. It interacts with the outside world using CSB (chip

select low active), SCK (serial clock), SDI (serial data input) and SDO (serial data output).

The communication starts when the CSB is pulled low by the SPI master and stops when CSB

is pulled high. SCK is also controlled by SPI master. During the transitions on CSB, SCK must

be high. SDI and SDO are driven at the falling edge of SCK and should be captured at the rising

edge of SCK.

Single byte write/read commands use 16-bits protocol.

Bit0: Read/Write bit. When 0, the data SDI is written into the chip. When 1, the data SDO from

the chip is read.

Bit1-7: Address AD(6:0).

Bit8-15: when in write mode, these are data SDI, which will be written into the address. When in

read mode, these are the data SDO, which are read from the address.

CSB

SCK

SDI

R/W AD6 AD5 AD4 AD3 AD2 AD1 AD0 DI5 DI4 DI3 DI2 DI1 DI0 DI7 DI6

SDO

tri-state

Figure 15: 4-wire SPI write command

Write command is completed in 16 clock cycles. During the entire write cycle SDO remains in

high-impedance state.

Data sheet

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CSB

SCK

SDI

R/W AD6 AD5 AD4 AD3 AD2 AD1 AD0

SDO

DO5 DO4 DO3 DO2 DO1 DO0 DO7 DO6 tri-state

Figure 16: 4-wire SPI read command

Read command is completed in 16 clock cycles or in multiple of 8 in case of multiple byte read.

In multiple-read cycle further blocks of 8 clock periods will be extended for each acknowledged

data.

CSB

SCK

T_setup_csb_4

T_low_sck_4 T_high_sck_4

T_hold_csb_4

SDI

T_setup_sdi_4 T_hold_sdi_4

SDO

T_delay_sdo_4

Figure 17: Timing diagram of 4-wire SPI cycle

Data sheet

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Note: Specifications within this document are subject to change without notice.

Table 20: SPI Timing

Parameter Symbol Condition Min Units

CSB lead time T_setup_csb 10

CSB lag time T_hold_csb 10

SDI setup time T_setup_sdi 5

SDI hold time T_hold_sdi 5

SDO delay time T_delay_sdo C

Load

≤ 50pF 30 (MAX)

SCK period T_sck 100

3-wire SPI

3-wire SPI interface uses SDI pin for both data input and output. It can be invoked by setting the

SPI3 register bit at address 0x0F.

The write command for the 3-wire SPI is identical to the 4-wire SPI write command. When a

read command is performed, output data are redirected to SDI pin after last address bit AD0 is

latched. No extra clock cycle is needed for output redirection.

Output data are synchronized at falling edge of SCK. Both input and output data shall be

captured at rising edge of SCK.

CSB

SCK

SDI

R/W AD6 AD5 AD4 AD3 AD2 AD1 AD0

SDO

DO2 DO0 DO4 DO3 DO1 DO5 DO7 DO6 tri-state

Figure 18: 3-wire SPI read protocol

Data sheet

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Note: Specifications within this document are subject to change without notice.

7.3 I²C interface

The I²C interface on board is a slave bus. Two signal lines SCL and SDA are used for

communication. SDA is a bidirectional line used for sending and receiving data to/from the

interface. SCL is the serial clock line used to synchronize the data. Both lines are connected to

VDD via pull-up resistors. So the lines are pulled high when the bus is free. The lines are low

only when any of the transmitters drives ‘0’. The on-board I²C interface supports standard and

fast-mode I²C.

Important note:

The default slave address assigned to the BMA220 is 000 1011. When in I²C mode, the LSB

can be inverted by tying the CSB pin to ‘1’. This allows resolving conflicts with existing devices.

I²C protocol

Start and stop conditions (see figure 18):

Data transmission on the bus begins with a HIGH to LOW transition on SDA line while SCK is

held high (start condition (S) indicated by I²C bus master). Once the START signal is transferred

by the master, the bus is considered busy.

Each data transfer should be terminated by a Stop signal (P) generated by master. The STOP

condition is a LOW to HIGH transition on SDA line while SCK is held high.

SCK

SDA

tSUSTA tSUSTO

tHDSTA

Figure 19: Waveform diagram for I²C start and stop conditions

Data sheet

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Note: Specifications within this document are subject to change without notice.

Table 21: I²C start/stop timing

Parameter Symbol Condition Min Units

START hold time T

HDSTA

0.6

START setup time T

SUSTA

0.6

STOP setup time T

SUSTO

0.6

Internal hold time T

HOLD_INT

f_SDA

= 100 ns

f_SCL

= 100 ns 0.3 (MAX)

Clock to Data Out T

VD_ACK

f_SDA

= 100 ns

f_SCL

= 100 ns 0.08

μs

Acknowledge:

Each byte of data transferred must be acknowledged. It is indicated by an acknowledge bit sent

by the receiver. The transmitter must release the SDA line (no pull down) during the

acknowledge pulse while the receiver must then pull the SDA line low so that it remains stable

low during the high period of the acknowledge clock cycle.

SDA

By transmitter

SCK

Start condition

SDA

By receiver

9 8 2 1

Acknowledge

Not Acknowledge

Clock pulse for

acknowledgement

Figure 20: Waveform diagram for I²C acknowledgement on SDA

Data Transfer:

Each data bit transferred via SDA line must remain stable during high period of SCK pulse.

Data sheet

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SDA

SCK

Change of

data allowed

Data line

stable, data

valid

Tsudat Thddat

Figure 21: Waveform diagram for one bit transfer with I²C interface

Table 22: I²C data transfer timing

# Parameter Symbol Min Max Units

1 DATA hold time THDDAT 0 0.9

2 DATA setup time TSUDAT 0.1 - μs

The first byte of data transmitted after start condition contains the 7-bit address of I²C slave.

The 8th bit is an R/W bit which tells whether the master wants to read (R/W = 1) or write

(R/W = 0) data from/to the slave.

Once the slave is addressed, it sends a low active acknowledge bit and accepts the following

data transferred by master. Otherwise it aborts the current data transfer and waits for the start

condition of next data transmission.

Data sheet

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Start R/W A CK ACK ACK Stop

0001011 0 0011100X 11010101

S000

Slave Adress Register address (1Ch) Register data (D5h)

I²C write command

I²C write command only supports one byte writing. The protocol begins with start condition

generated by master, followed by 7bits slave address and a write bit (R/W = 0). The slave sends

an acknowledge bit (ACK = 0) and releases the bus. Then master sends the one byte register

address (only the first 7bits are the valid address bits, the LSB shall be ignored). The slave shall

again acknowledge the transmission and wait for the 8bits data which shall be written to the

specified register address. After slave acknowledges the data byte, master generates a stop

signal and terminates the writing protocol.

Data transferred by Master

Data transferred by Slave

Figure 22: I²C one byte write protocol

Data sheet

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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

I²C read command

I²C read command supports multiple bytes reading. A read command consists of a 1-byte I²C

write phase followed by I²C read phase. The two I²C transmissions must be separated by a

repeated start condition (Sr). The I²C write phase addresses the slave and sends the register

address to be read. After slave acknowledges the transmission, master generates again a start

condition and sends the slave address together with a read bit (R/W = 1). Then master releases

the bus and waits for the data bytes to be read out from slave. After each data byte the master

has to generate an acknowledge bit (ACK = 0) to enable further data transfer.

A NACK (ACK = 1) from master stops the data transferring from slave. Slave releases the bus

so that master can generate a STOP condition and terminate the transmission.

out. Once a new data read transmission starts, the start address will be set to the register

address specified in the latest I²C write command. By default the start address is set at 0x00.

In this way repetitive multi-bytes reads from the same starting address are possible.

Data transferred by Master

Data transferred by Slave

Start R/W ACK ACK

0001011 0 0000010X

Repeat

Start R/W A CK A CK A CK

0001011 1 XXXXXXXX XXXXXXXX …

ACK ACK

… XXXXXXXX XXXXXXXX …

ACK ACK Stop

… XXXXXXXX XXXXXXXX

Sr 000

Slave Address Register data - address 06hRegister data - address 04h

Data byte Data byte

S 00

Slave Address

Data byte Data byte

Figure 23: I²C multiple bytes read protocol

Data sheet

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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

7.4 I²C watchdog timer

In order to prevent the built-in I²C slave to lock-up the I²C bus, a watchdog timer (WDT) is

introduced. The WDT observes internal I²C signals and resets the I²C interface if the bus is

locked-up by the BMA220.

The WDT observation period and WDT on/off can be configured through interface registers.

Figure 24: WDT settings

WDT_TO_en WDT_TO_sel WDT function

0 X OFF

1 0 1 ms

1 1 10 ms

7.5 SPI and I²C access restrictions

The required wait time after a write-cycle depends on whether the power-saving (sleep) mode is

currently active. In case the low-power mode is active, the internal clock frequency is reduced

and thus the required wait time increases.

Table 23: Required wait times after write / before read access

Protocol Access Normal mode Low-power mode

I2C / SPI Write >3μsec >300μsec

I2C / SPI Read >2μsec >2μsec

Figure 25: Post-write access timing constraints

Figure 26: Pre-read access timing constraints

Please note that this read-constraint only applies to read-outs of the same axes. Reading

out the three axes in a back-to-back transfer is possible!

Data sheet

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Note: Specifications within this document are subject to change without notice.

8. Pin-out and connecting diagram

8.1 Pin-out

Figure 27: Pin-out of the BMA220 (top view)

Table 24: Pin description

Pin# Name Type Description Connect to

(in SPI 4w)

Connect to

(in SPI 3w)

Connect to

(in I²C)

1 SDO Digital Out SPI serial data output SDO NC NC

2 SDx Digital I/O SDA for I

C serial data in-/output

SDI for serial data input (SPI 4-wire mode)

SDA serial data in-/output (SPI 3-wire mode)

SDI SDA SDA

3 VDDIO Supply I I/O supply voltage

(variable between 1.62 ... 3.6V)

VDDIO VDDIO VDDIO

4 VDDD Supply I Power supply for digital domain VDDD VDDD VDDD

5 INT Digital I/O Interrupt output INT INT INT

6 CAP0 DNC Do not connect!

Pin reserved for factory trimming

NC NC NC

7 VDDA Supply I Power supply for analog domain VDDA VDDA VDDA

8 GND Ground Shared ground for digital, I/O and analog GND GND GND

9 GND Ground Shared ground for digital, I/O and analog GND GND GND

10 CSB Digital In Chip-select for SPI mode. Address-select for

C mode

see cha

ter 8.3. Pin must not float.

CSB CSB CSB

11 PS Digital In Protocol select pin (0=SPI, 1=I

C, float = μC-

less); pin must not float unless dedicated

mode is used, see chapter 6.1.

GND GND VDDIO

12 SCK Digital In SCK for SPI serial clock

SCL for I

C serial clock

SCK SCK SCL

For further details on the recommended connection for the use of the BMA220 without

μController (i.e. in dedicated I/O modes) please refer to table 16 in chapter 6.

Data sheet

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VDDIO

VDDD VDDA

GND

SDO

SDI

INT

CAP0

CSB

SCK

GND

C=100nF

1.62-3.6V

digital

1.8V

analog

1.8V

BMA220

(top view)

Setup 1

I²C / SPI

VDDIO

VDDD VDDA

GND

SDO

SDI

INT

CAP0

CSB

SCK

GND

C=100nF

1.62-3.6V

digital

1.8V

analog

1.8V

BMA220

(top view)

BMA220

(top view)

Setup 1

I²C / SPI

VDDIO

VDDD VDDA

GND

SDO

SDI

INT

CAP0

CSB

SCK

GND

C=100nF

analog + digital + IO

1.8V

BMA220

(top view)

Setup 2

I²C

VDDIO

VDDD VDDA

GND

SDO

SDI

INT

CAP0

CSB

SCK

GND

C=100nF

analog + digital + IO

1.8V

BMA220

(top view)

BMA220

(top view)

Setup 2

I²C

8.2 Connecting diagrams

Figure 28: BMA220 electrical connecting diagram setup option 1

Figure 29: BMA220 electrical connecting diagram setup option 2

Data sheet

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VDDIO

VDDD VDDA

GND

SDO

SDI

INT

CAP0

CSB

SCK

GND

C=100nF

1.62-3.6V

analog + digital

1.8V

Setup 4

I²C / SPI

BMA220

(top view)

VDDIO

VDDD VDDA

GND

SDO

SDI

INT

CAP0

CSB

SCK

GND

C=100nF

1.62-3.6V

analog + digital

1.8V

Setup 4

I²C / SPI

BMA220

(top view)

BMA220

(top view)

VDDIO

VDDD VDDA

GND

SDO

SDI

INT

CAP0

CSB

SCK

GND

C=100nF

digital + IO

1.8V

analog

1.8V

Setup 3

I²C / SPI

BMA220

(top view)

VDDIO

VDDD VDDA

GND

SDO

SDI

INT

CAP0

CSB

SCK

GND

C=100nF

digital + IO

1.8V

analog

1.8V

Setup 3

I²C / SPI

BMA220

(top view)

BMA220

(top view)

Figure 30: BMA220 electrical connecting diagram setup option 3

Figure 31: BMA220 electrical connecting diagram setup option 4

Data sheet

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Note: Specifications within this document are subject to change without notice.

In order to prevent noise on the supply pins VDDA, VDDD and VDDIO it is recommended to use low-

leakage blocking capacitors with 100nF. The capacitors should be placed close to the

respective pins as shown in figure 27.

VDDD, VDDA and VDDIO can be connected according to the given diagrams, also to one common

power supply within the specified range as long as the following requirement is met:

 For VDDA the voltage noise level must not exceed 100mVpp for signals below 1kHz and

must not exceed 10mVpp for signals above 1kHz.

In case SPI communication is used, it is recommended to apply a connection in accordance

with diagrams as shown in setup 1, setup 3 or setup 4.

Data sheet

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9. Package

9.1 Outline dimensions

The sensor housing is a standard LGA package. It is compliant with JEDEC Standard MO-229

Type VGGD-3. Its dimensions are the following.

Figure 32: Outline dimensions (in mm)

Data sheet

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9.2 Sensing axes orientation and polarity of the acceleration output

If the sensor is accelerated in the indicated directions, the corresponding channel will deliver a

positive acceleration signal (dynamic acceleration). If the sensor is at rest and the force of

gravity is working along the indicated directions, the output of the corresponding channel will be

negative (static acceleration).

Example: If the sensor is at rest or at uniform motion in a gravity field according to the figure

given below, the output signals are:

 ± 0g for the X channel

 ± 0g for the Y channel

 + 1g for the Z channel

+x top side

gravity vector

Figure 33: Orientation of sensing axes

The following table lists all corresponding output signals on X, Y, and Z while the sensor is at

rest or at uniform motion in a gravity field under assumption of a ±2g range setting and a top

down gravity vector as shown above.

Table 25: Output signals depending on sensor orientation

Sensor Orientation

(gravity vector )

Output Signal X

0g / 0LSB 1g / 16LSB 0g / 0LSB -1g / -16LSB 0g / 0LSB 0g / 0LSB

Output Signal Y

-1g / -16LSB 0g / 0LSB +1g / 1.8V 0g / 0LSB 0g / 0LSB 0g / 0LSB

Output Signal Z

0g / 0LSB 0g / 0LSB 0g / 0LSB 0g / 0LSB 1g / 16LSB -1g / -16LSB

upright

Data sheet

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Note: Specifications within this document are subject to change without notice.

9.3 Landing pattern recommendation

As for the design of the landing patterns, the following recommendations can be given:

Figure 34: Landing patterns relative to the device pins, dimensions are in mm

Data sheet

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9.4 Marking

9.4.1 Mass production samples

Labeling Name Symbol Remark

Lot counter CCC

Product number T T = 2

Sub-con ID L 1 digit alphanumerical, code to identify sub-con

and plant , L = A or L = U or L = P

Pin 1 identifier •

Figure 35: Marking of mass production samples

9.4.2 Engineering samples

Labeling Name Symbol Remark

Eng. sample ID N Engineering Samples are always marked with

N = “e”

Date code WW calendar week

Lot counter CC e.g. Eng. marking F1, F2 … C1, C2

Pin 1 identifier •

Figure 36: Marking of engineering samples

CCC

NWW

Data sheet

BMA220 Page 57

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

9.5 Moisture sensitivity level and soldering

The moisture sensitivity level of the BMA220 sensors corresponds to JEDEC Level 1, see also

 IPC/JEDEC J-STD-020C "Joint Industry Standard: Moisture/Reflow Sensitivity

Classification for non-hermetic Solid State Surface Mount Devices".

 IPC/JEDEC J-STD-033A "Joint Industry Standard: Handling, Packing, Shipping and Use

of Moisture/Reflow Sensitive Surface Mount Devices".

The sensor fulfils the lead-free soldering requirements of the above-mentioned IPC/JEDEC

standard, i.e. reflow soldering with a peak temperature up to 260°C.

Figure 37: Moisture sensitivity level and soldering

Data sheet

BMA220 Page 58

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

9.6 Tape and reel specification

The BMA220 is shipped in a standard cardboard box.

The box dimension for 1 reel is: L x W x H = 35cm x 35cm x 6cm

BMA220 quantity: 10,000pcs per reel, please handle with care.

Figure 38: reel dimensions in mm

Data sheet

BMA220 Page 59

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

9.7 Orientation

 Processing direction 

Figure 39: BMA220 devices relative to tape

9.8 RoHS compliancy

The BMA220 sensor meets the requirements of the EC restriction of hazardous substances

(RoHS) directive, see also:

Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003

on the restriction of the use of certain hazardous substances in electrical and electronic

equipment.

9.9 Halogen content

Results of chemical analysis indicate that the BMA220 contains less than 900ppm (by weight) of

Fluorine, Chlorine, Iodine and Bromine (i.e. < 50ppm per each substance). Therefore the

BMA220 can be regarded as halogen-free. For more details on the analysis results please

contact your Bosch Sensortec representative.

9.10 Note on internal package structure

Within the scope of Bosch Sensortec’s ambition to improve its products and secure the product

supply while mass production, Bosch Sensortec qualifies additional sources for the LGA

package of the BMA220.

While Bosch Sensortec took care that all of the technical packages parameters are described

above are 100% identical for both sources, there can be differences in the chemical content and

the internal structural between the different package sources.

However, as secured by the extensive product qualification process of Bosch Sensortec, this

has no impact to the usage or to the quality of the BMA220 product.

Data sheet

BMA220 Page 60

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

9.11 Handling instruction

Micromechanical sensors are designed to sense acceleration with high accuracy even at low

amplitudes and contain highly sensitive structures inside the sensor element. The MEMS sensor

can tolerate mechanical shocks up to several thousand g's. However, these limits might be

exceeded in conditions with extreme shock loads such as e.g. hammer blow on or next to the

sensor, dropping of the sensor onto hard surfaces etc.

We recommend to avoid g-forces beyond the specified limits during transport, handling and

mounting of the sensors in a defined and qualified installation process.

This device has built-in protections against high electrostatic discharges or electric fields

(2kV HBM); however, anti-static precautions should be taken as for any other CMOS

component. Unless otherwise specified, proper operation can only occur when all terminal

voltages are kept within the supply voltage range. Unused inputs must always be tied to a

defined logic voltage level.

Data sheet

BMA220 Page 61

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

10. Legal disclaimer

10.1 Engineering samples

Engineering Samples are marked with an asterisk (*) or (e) or (E). Samples may vary from the

valid technical specifications of the product series contained in this data sheet. They are

therefore not intended or fit for resale to third parties or for use in end products. Their sole

purpose is internal client testing. The testing of an engineering sample may in no way replace

the testing of a product series. Bosch Sensortec assumes no liability for the use of engineering

samples. The Purchaser shall indemnify Bosch Sensortec from all claims arising from the use of

engineering samples.

10.2 Product use

Bosch Sensortec products are developed for the consumer goods industry. They may only be

used within the parameters of this product data sheet. They are not fit for use in life-sustaining

or security sensitive systems. Security sensitive systems are those for which a malfunction is

expected to lead to bodily harm or significant property damage. In addition, they are not fit for

use in products which interact with motor vehicle systems.

The resale and/or use of products are at the purchaser’s own risk and his own responsibility.

The examination of fitness for the intended use is the sole responsibility of the Purchaser.

The purchaser shall indemnify Bosch Sensortec from all third party claims arising from any

product use not covered by the parameters of this product data sheet or not approved by Bosch

Sensortec and reimburse Bosch Sensortec for all costs in connection with such claims.

The purchaser must monitor the market for the purchased products, particularly with regard to

product safety, and inform Bosch Sensortec without delay of all security relevant incidents.

10.3 Application examples and hints

With respect to any examples or hints given herein, any typical values stated herein and/or any

information regarding the application of the device, Bosch Sensortec hereby disclaims any and

all warranties and liabilities of any kind, including without limitation warranties of non-

infringement of intellectual property rights or copyrights of any third party. The information given

in this document shall in no event be regarded as a guarantee of conditions or characteristics.

They are provided for illustrative purposes only and no evaluation regarding infringement of

intellectual property rights or copyrights or regarding functionality, performance or error has

been made.

Data sheet

BMA220 Page 62

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

11. Document history and modifications

Rev. No Chapter Description of modification/changes Date

0.9 All Document creation 2008-12-01

0.91 All Total document update 2009-08-20

0.92 1 Introduced resolution in table 1 2009-10-20

2 Updated and extended table 2

9.1 Changed “VSS” to “GND”

9.2 Changes recommended capacitor for VDDA to

100nF

9.2 Added recommendation, modified fig. 28

10.6 Updated quantity per reel

0.93 1 Introduced resolution, current + timings in table 1 2009-12-21

2 Updated and extended table 2

4 Updated global memory map incl. note

4.1.5 Updated soft-reset description

4.1.6 Updated suspend description

5.5 Updated table 10

6 New table 16

6.3. Introduced current consumption estimation in low

power mode

7 Removed

ex 8.3 new 7.3 Updated I2C in fig. 23

ex 8.5 new 7.5 New table

ex 9.1 new 8.1 Changed “VSS” to “GND”, introduced “not float”

indication

New table 25

ex 9.2 new 8.2 Changes recommended capacitor for VDDA to

100nF

ex 9.2 new 8.2 Added recommendation, modified fig. 27

ex 10.6 new 9.6 Updated quantity per reel + figures

ex 10.8 new 9.8 Added < 50ppm each substances

1.00 1

Clarified names of operation names, introduced

voltage input and output levels updated TCO,

TCS, current, noise, temperature range, non-

linearity, cross axis sensitivity

and self test response in table 1

2010-04-14

4 Introduced default content in global memory map

4.1.2 Update chapter name / wordings

4.1.3 Update chapter name / wordings

6.3 Update chapter name / wordings

7.2 Update of tables 20 and 21

All Changed naming from “sleep mode” to “low-

power mode”

1.01 Title Changed technical reference codes 2010-05-28

1 Updated zero-g offset values

9.4.1 Updated product number

1.05 4.1.2, 4.1.3 Updates 2010-11-17

Data sheet

BMA220 Page 63

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

6.1, 7.2 Active “1” level = VDDIO

1.10 4.3.1 Update table 7 2011-04-13

7.3 Update figures 22 and 23

1.15 7.2 Comment on SPI mode 3 2011-08-23

7.3 Updated

Bosch Sensortec GmbH

Gerhard-Kindler-Strasse 8

72770 Reutlingen / Germany

contact@bosch-sensortec.com

www.bosch-sensortec.com

Modifications reserved | Printed in Germany

Specifications subject to change without notice

Document number: BST-BMA220-DS003-08

Revision_1.15_082011

Mouser Electronics

Authorized Distributor

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