LTM8032 EN55022B Compliant 36V, 2A DC/DC Module Regulator Description Features n n n n n n n n n n Complete Step-Down Switch Mode Power Supply Wide Input Voltage Range: 3.6V to 36V 2A Output Current 0.8V to 10V Output Voltage Selectable Switching Frequency: 200kHz to 2.4MHz EN55022 Class B Compliant Current Mode Control Programmable Soft-Start SnPb (BGA) or RoHS Compliant (LGA and BGA) Finish Low Profile, Surface Mount LGA (9mm x 15mm x 2.82mm) and BGA (9mm x 15mm x 3.42mm) Packages Applications n n n n n The LTM(R)8032 is an electromagnetic compatible (EMC) 36V, 2A DC/DC step-down Module(R) regulator designed to meet the radiated emissions requirements of EN55022. Conducted emission requirements can be met by adding standard filter components. Included in the package are the switching controller, power switches, inductor, filters and all support components. Operating over an input voltage range of 3.6V to 36V, the LTM8032 supports an output voltage range of 0.8V to 10V, and a switching frequency range of 200kHz to 2.4MHz, each set by a single resistor. Only the bulk input and output filter capacitors are needed to finish the design. The low profile package enables utilization of unused space on the bottom of PC boards for high density point of load regulation. The LTM8032 is packaged in a thermally enhanced, compact and low profile overmolded land grid array (LGA) and ball grid array (BGA) packages suitable for automated assembly by standard surface mount equipment. The LTM8032 is available with SnPb (BGA) or RoHS compliant terminal finish. Automotive Battery Regulation Power for Portable Products Distributed Supply Regulation Industrial Supplies Wall Transformer Regulation L, LT, LTC, LTM, Linear Technology, the Linear logo, Module and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Ultralow Noise 5V/2A DC/DC Module Regulator VIN* 7VDC TO 36VDC VOUT VIN 10F RUN/SS AUX LTM8032 BIAS 2.2F SHARE PGOOD RT SYNC GND ADJ 44.2k VOUT 5V 2A 90 80 EMISSIONS LEVEL (dBV/m) FIN LTM8032 EMI Performance 47.5k 8032 TA01a 70 60 50 EN55022 CLASS B LIMIT 40 30 20 10 0 fSW = 700kHz *RUNNING VOLTAGE RANGE. SEE APPLICATIONS FOR START-UP DETAILS -10 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 8031 TA01b 8032fg For more information www.linear.com/LTM8032 1 LTM8032 Absolute Maximum Ratings (Note 1) PGOOD, SYNC...........................................................30V BIAS...........................................................................25V VIN + BIAS..................................................................56V Maximum Junction Temperature (Note 2)............. 125C Solder Temperature................................................ 245C VIN, FIN, RUN/SS Voltage..........................................40V ADJ, RT, SHARE Voltage..............................................5V VOUT, AUX..................................................................10V Current from AUX.................................................100mA Pin Configuration 1 2 TOP VIEW 3 4 5 VOUT 6 GND 1 7 BANK 2 BANK 1 C D D E E F BANK 2 BIAS J BANK 3 AUX K F RT G RT SHARE H SHARE ADJ J PGOOD K BANK 3 L VIN 7 B C H 6 GND A B G TOP VIEW 3 4 5 VOUT A BANK 1 2 BIAS ADJ AUX PGOOD L VIN FIN RUN/SS SYNC FIN RUN/SS SYNC BGA PACKAGE 71-LEAD (9mm x 15mm x 3.42mm) LGA PACKAGE 71-LEAD (9mm x 15mm x 2.82mm) TJMAX = 125C, JA = 25.6C/W, JCbottom = 11.0C/W, JCtop = 15.8C/W, JB = 11.4C/W, WEIGHT = 1.2g VALUES DETERMINED PER JEDEC 51-9, 51-12 TJMAX = 125C, JA = 25.2C/W, JCbottom = 10.3C/W, JCtop = 15.8C/W, JB = 11.4C/W, WEIGHT = 1.2g VALUES DETERMINED PER JESD51-9 order information PART NUMBER PAD OR BALL FINISH PART MARKING* CODE PACKAGE TYPE MSL RATING DEVICE LTM8032EV#PBF Au (RoHS) LTM8032V e4 LGA 3 -40C to 125C LTM8032IV#PBF Au (RoHS) LTM8032V e4 LGA 3 -40C to 125C LTM8032MPV#PBF Au (RoHS) LTM8032MPV e4 LGA 3 -55C to 125C LTM8032EY#PBF SAC305 (RoHS) LTM8032Y e1 BGA 3 -40C to 125C TEMPERATURE RANGE (Note 2) LTM8032IY#PBF SAC305 (RoHS) LTM8032Y e1 BGA 3 -40C to 125C LTM8032MPY#PBF SAC305 (RoHS) LTM8032Y e1 BGA 3 -55C to 125C LTM8032MPY SnPb (63/37) LTM8032Y e0 BGA 3 -55C to 125C Consult Marketing for parts specified with wider operating temperature ranges. *Device temperature grade is indicated by a label on the shipping container. Pad or ball finish code is per IPC/JEDEC J-STD-609. * Recommended LGA and BGA PCB Assembly and Manufacturing Procedures: www.linear.com/umodule/pcbassembly * Pb-free and Non-Pb-free Part Markings: www.linear.com/leadfree * LGA and BGA Package and Tray Drawings: www.linear.com/packaging 8032fg 2 For more information www.linear.com/LTM8032 LTM8032 Electrical Characteristics The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25C. VIN = 10V, VRUN/SS = 10V, VBIAS = 3V, unless otherwise specified. SYMBOL PARAMETER VIN Input DC Voltage VOUT Output DC Voltage 0.2A < IOUT 2A, RADJ Open 0.2A < IOUT 2A, RADJ = 21.6k IOUT Continuous Output DC Current VIN = 24V IQ(VIN) VIN Quiescent Current VRUN/SS = 0.2V VBIAS = 3V, Not Switching VBIAS = 0V, Not Switching l VRUN/SS = 0.2V VBIAS = 3V, Not Switching VBIAS = 0V, Not Switching l IQ(BIAS) VOUT VOUT CONDITIONS MIN l BIAS Quiescent Current Line Regulation Load Regulation VOUT(AC_RMS) Output Ripple (RMS) TYP 3.6 MAX 36 0.8 10 V V 2 A 0.6 25 88 60 120 A A A 0.03 60 1 120 5 A A A 0.1 VIN = 24V, 0.2A IOUT 2A, VOUT = 3.3V 0.3 % 6 mV fSW Switching Frequency VADJ Voltage at ADJ Pin RT = 113k VBIAS(MIN) Minimum BIAS Voltage for Proper Operation IADJ Current Out of ADJ Pin VRUN/SS = 0V, VADJ = 0V, VOUT = 1V 4 IRUN/SS RUN/SS Pin Current VRUN/SS = 2.5V 5 VIH(RUN/SS) RUN/SS Input High Voltage % 325 l 765 kHz 790 815 mV 1.9 2.8 V 10 A A 2.5 VIL(RUN/SS) RUN/SS Input Low Voltage ADJ Voltage Threshold for PGOOD to Switch V 10V VIN 36V, IOUT = 1A, VOUT = 3.3V VIN = 24V, IOUT = 2A, VOUT = 3.3V VPG(TH) UNITS V 0.2 730 IPGO PGOOD Leakage VPG = 30V IPGSINK PGOOD Sink Current VPG = 0.4V VSYNCIL SYNC Input Low Threshold fSYNC = 550kHz 0.1 200 1 800 A A 0.5 V VSYNCIH SYNC Input High Threshold fSYNC = 550kHz ISYNC(BIAS) SYNC Pin Bias Current VSYNC = 0V, VBIAS = 0V 0.1 A VIN(RIPPLE) 550kHz Narrowband Conducted Emission 1MHz Narrowband Conducted Emission 3MHz Narrowband Conducted Emission VIN = 24V, VOUT = 3.3V, IOUT = 2A, fSW = 550kHz, 5H LISN 89 69 51 dBV dBV dBV Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM8032E is guaranteed to meet performance specifications from 0C to 125C internal. Specifications over the -40C to 125C internal temperature range are assured by design, characterization and 0.7 V mV V correlation with statistical process controls. LTM8032I is guaranteed to meet specifications over the full -40C to 125C internal operating temperature range. The LTM8032MP is guaranteed to meet specifications over the full -55C to 125C internal operating temperature range. Note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. 8032fg For more information www.linear.com/LTM8032 3 LTM8032 Typical Performance Characteristics TA = 25C, unless otherwise noted. 3.3VOUT Efficiency 5VOUT Efficiency 8VOUT Efficiency 100 100 90 90 80 80 70 70 70 60 50 40 30 10 0 0.01 50 40 0 0.01 600 400 1800 1400 800 1200 600 400 1000 500 1500 OUTPUT CURRENT (mA) 0 0 2000 1000 800 600 400 200 0 500 1000 1500 OUTPUT CURRENT (mA) 0 2000 Minimum Required Input Voltage vs Output Voltage, IOUT = 2A 6.0 12 4.5 5.5 4 2 INPUT VOLTAGE (V) 5.0 INPUT VOLTAGE (V) 14 6 4.0 3.5 3.0 2.5 0 2 4 6 8 OUTPUT VOLTAGE (V) 10 8032 G07 1000 500 1500 OUTPUT CURRENT (mA) 2.0 TO RUN TO START 0 500 1000 1500 LOAD CURRENT (mA) 2000 8032 G08 2000 8032 G06 Minimum Required Input Voltage vs Load Current, VOUT = 2.5V 8 1 8032 G05 8032 G04 10 12VIN 24VIN 36VIN 1600 200 200 INPUT VOLTAGE (V) 8031 G03 INPUT CURRENT (mA) 800 10 1 0.1 OUTPUT CURRENT (A) Input Current vs Output Current, 8VOUT 12VIN 24VIN 36VIN 1000 INPUT CURRENT (mA) INPUT CURRENT (mA) 1200 1000 0 0 0.01 10 1 0.1 OUTPUT CURRENT (A) 12VIN 24VIN 36VIN 10 Input Current vs Output Current, 5VOUT 5.5VIN 12VIN 24VIN 36VIN 1200 20 8031 G02 Input Current vs Output Current, 3.3VOUT 1400 50 40 12VIN 24VIN 36VIN 10 8031 G01 1600 60 30 20 10 1 0.1 OUTPUT CURRENT (A) 60 30 5.5VIN 12VIN 24VIN 36VIN 20 EFFICIENCY (%) 90 80 EFFICIENCY (%) EFFICIENCY (%) 100 Minimum Required Input Voltage vs Load Current, VOUT = 3.3V 5.0 4.5 4.0 TO RUN TO START RUN/SS ENABLED 3.5 3.0 0 500 1000 1500 LOAD CURRENT (mA) 2000 8032 G09 8032fg 4 For more information www.linear.com/LTM8032 LTM8032 Typical Performance Characteristics TA = 25C, unless otherwise noted. Minimum Required Input Voltage vs Load Current, VOUT = 8V Minimum Required Input Voltage vs Load Current, VOUT = 5V INPUT VOLTAGE (V) INPUT VOLTAGE (V) 7.0 6.5 6.0 5.5 5.0 TO RUN TO START RUN/SS ENABLED 0 500 1500 1000 LOAD CURRENT (mA) 30 10.5 25 10.0 9.5 9.0 TO RUN TO START RUN/SS ENABLED 8.5 8.0 2000 0 500 1000 1500 LOAD CURRENT (mA) 2400 2200 2000 1000 30 800 600 400 200 0 40 30 0 10 20 30 INPUT VOLTAGE (V) 35 30 30 5 0 500 1000 2000 1500 LOAD CURRENT (mA) 2500 8032 G16 15 10 5VIN 12VIN 24VIN 36VIN 0 500 1000 1500 2500 2000 8032 G15 50 25 20 15 10 12VIN 24VIN 36VIN 5 0 Temperature Rise vs Load Current, VOUT = 8V (LGA) 45 TEMPERATURE RISE (C) 35 TEMPERATURE RISE (C) TEMPERATURE RISE (C) 40 5VIN 12VIN 24VIN 36VIN 20 LOAD CURRENT (mA) Temperature Rise vs Load Current, VOUT = 5V (LGA) 40 10 Temperature Rise vs Load Current, VOUT = 2.5V (LGA) 8032 G14 Temperature Rise vs Load Current, VOUT = 3.3V (LGA) 15 2000 25 0 40 8032 G13 20 500 1000 1500 OUTPUT CURRENT (mA) 5 INPUT VOLTAGE (V) 25 0 8032 G12 35 1800 0 0 TEMPERATURE RISE (C) 2600 20 10 1200 INPUT CURRENT (mA) OUTPUT CURRENT (mA) 2800 10 15 Input Current vs Input Voltage (Output Shorted) 3000 0 20 8032 G11 Output Current vs Input Voltage (Output Shorted) 3200 3.3VOUT 5VOUT 8VOUT 5 2000 8032 G10 1600 Bias Current vs Output Current 11.0 BIAS CURRENT (mA) 7.5 0 500 1000 2000 1500 LOAD CURRENT (mA) 2500 8032 G17 40 35 30 25 20 15 10 12VIN 24VIN 36VIN 5 0 0 500 1500 2000 1000 LOAD CURRENT (mA) 2500 8032 G18 8032fg For more information www.linear.com/LTM8032 5 LTM8032 EMISSIONS LEVEL (dBV/m) Temperature Rise vs Load Current, VOUT = 10V (LGA) 50 TEMPERATURE RISE (C) 45 40 35 30 25 Radiated Emissions 90 70 50 30 10 -10 20 15 10 Radiated Emissions 90 70 50 30 10 -10 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 8031 G21 VIN = 13V VOUT = 10V AT 2A 24VIN 36VIN 5 0 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 8031 G20 VIN = 36V VOUT = 10V AT 2A EMISSIONS LEVEL (dBV/m) Typical Performance Characteristics TA = 25C, unless otherwise noted. 0 500 1500 2000 1000 LOAD CURRENT (mA) 2500 8032 G19 35 Temperature Rise vs Load Current, VOUT = 3.3V (BGA) Temperature Rise vs Load Current, VOUT = 2.5V (BGA) 35 30 25 20 15 10 5VIN 12VIN 24VIN 36VIN 5 0 0 500 TEMPERATURE RISE (C) TEMPERATURE RISE (C) 30 20 15 10 12VIN 24VIN 36VIN 5 0 2500 1000 1500 2000 LOAD CURRENT (mA) 25 0 500 8032 G22 8032 G23 Temperature Rise vs Load Current, VOUT = 10V (BGA) Temperature Rise vs Load Current, VOUT = 5V (BGA) 40 60 50 30 TEMPERATURE RISE (C) TEMPERATURE RISE (C) 35 25 20 15 10 12VIN 24VIN 36VIN 5 0 2500 1000 1500 2000 LOAD CURRENT (mA) 0 500 1000 1500 2000 LOAD CURRENT (mA) 2500 40 30 20 10 0 24VIN 36VIN 0 500 8032 G24 1000 1500 2000 LOAD CURRENT (mA) 2500 8032 G25 8032fg 6 For more information www.linear.com/LTM8032 LTM8032 Pin Functions VIN (Bank 3): The VIN pin supplies current to the LTM8032's internal regulator and to the internal power switch. This pin must be locally bypassed with an external, low ESR capacitor of at least 2.2F. FIN (K3, L3): Filtered Input. This is the node after the input EMI filter. Use this only if there is a need to modify the behavior of the integrated EMI filter or if VIN rises or falls rapidly; otherwise, leave these pins unconnected. See the Applications Information section for more details. GND (Bank 2): Tie these GND pins to a local ground plane below the LTM8032 and the circuit components. In most applications, the bulk of the heat flow out of the LTM8032 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. See the PCB Layout and Thermal Considerations sections for more details. Return the feedback divider (RADJ) to this net. VOUT (Bank 1): Power Output Pins. Apply the output filter capacitor and the output load between these pins and GND pins. AUX (Pin H5): Low Current Voltage Source for BIAS. The AUX pin is internally connected to VOUT and is placed adjacent to the BIAS pin to ease printed circuit board routing. Although this pin is internally connected to VOUT, do not connect this pin to the load. If this pin is not tied to BIAS, leave it floating. BIAS (Pin H4): The BIAS pin connects to the internal power bus. Connect to a power source greater than 2.8V. If the output is greater than 2.8V, connect this pin to AUX. If the output voltage is less, connect this to a voltage source between 2.8V and 25V. Also, make sure that BIAS + VIN is less than 56V. RUN/SS (Pin L5): Pull RUN/SS pin to less than 0.2V to shut down the LTM8032. Tie to 2.5V or more for normal operation. If the shutdown feature is not used, tie this pin to the VIN pin. RUN/SS also provides a soft-start function; see the Applications Information section. RT (Pin G7): The RT pin is used to program the switching frequency of the LTM8032 by connecting a resistor from this pin to ground. The Applications Information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. Minimize capacitance at this pin. SHARE (Pin H7): Tie this to the SHARE pin of another LTM8032 when paralleling the outputs. Otherwise, do not connect (leave floating). SYNC (Pin L6): This is the external clock synchronization input. Ground this pin for low ripple Burst Mode(R) operation at low output loads. Tie to a stable voltage source greater than 0.7V to disable Burst Mode operation. Do not leave this pin floating. Tie to a clock source for synchronization. Clock edges should have rise and fall times faster than 1s. See synchronization section in Applications Information. PGOOD (Pin K7): The PGOOD pin is the open-collector output of an internal comparator. PGOOD remains low until the ADJ pin is within 10% of the final regulation voltage. The PGOOD output is valid when VIN is above 3.6V and RUN/SS is high. If this function is not used, leave this pin floating. ADJ (Pin J7): The LTM8032 regulates its ADJ pin to 0.79V. Connect the adjust resistor from this pin to ground. The value of RADJ is given by the equation: R ADJ = 196.71 VOUT - 0.79 where RADJ is in k. 8032fg For more information www.linear.com/LTM8032 7 LTM8032 Block Diagram FIN VIN EMI FILTER 4.7H VOUT 249k GND 10F AUX GND BIAS SHARE CURRENT MODE CONTROLLER RUN/SS SYNC RT PGOOD ADJ 8032 BD 8032fg 8 For more information www.linear.com/LTM8032 LTM8032 Operation The LTM8032 is a standalone nonisolated step-down switching DC/DC power supply. It can deliver up to 2A of DC output current with only bulk external input and output capacitors. This module provides a precisely regulated output voltage programmable via one external resistor from 0.8VDC to 10VDC. The input voltage range is 3.6V to 36V. Given that the LTM8032 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. A simplified Block Diagram is given on the previous page. The LTM8032 is designed with an input EMI filter and other features to make its radiated emissions compliant with several EMC specifications including EN55022 class B. Compliance with conducted emissions requirements may be obtained by adding a standard input filter. The LTM8032 contains a current mode controller, power switching element, power inductor, power Schottky diode and a modest amount of input and output capacitance. The LTM8032 is a fixed frequency PWM regulator. The switching frequency is set by simply connecting the appropriate resistor value from the RT pin to GND. An internal regulator provides power to the control circuitry. The bias regulator can draw power from the VIN pin, but if the BIAS pin is connected to an external voltage higher than 2.8V, bias power will be drawn from the external source (typically the regulated output voltage). This improves efficiency. The RUN/SS pin is used to place the LTM8032 in shutdown, disconnecting the output and reducing the input current to less than 1A. To further optimize efficiency, the LTM8032 automatically switches to Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to 50A in a typical application. The oscillator reduces the LTM8032's operating frequency when the voltage at the ADJ pin is low. This frequency foldback helps to control the output current during start-up and overload. The LTM8032 contains a power good comparator which trips when the ADJ pin is at 90% of its regulated value. The PGOOD output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the PGOOD pin high. Power good is valid when the LTM8032 is enabled and VIN is above 3.6V. Applications Information For most applications, the design process is straight forward, summarized as follows: 1. Look at Table 1 and find the row that has the desired input range and output voltage. 2. Apply the recommended CIN, COUT, RADJ and RT values. 3. Connect BIAS as indicated. As the integrated input EMI filter may ring in response to an application of a step input voltage, a bulk capacitance, series resistance or some clamping mechanism may be required. See the Hot-Plugging Safely section for details. While these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended system's line, load and environmental conditions. Capacitor Selection Considerations The CIN and COUT capacitor values in Table 1 are the minimum recommended values for the associated operating conditions. Applying capacitor values below those indicated in Table 1 is not recommended, and may result in undesirable operation. Using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. Again, it is incumbent upon the user to verify proper operation over the intended system's line, load and environmental conditions. Ceramic capacitors are small, robust and have very low ESR. However, not all ceramic capacitors are suitable. X5R and X7R types are stable over temperature and applied voltage and give dependable service. Other types, including Y5V and Z5U have very large temperature and voltage coefficients of capacitance. In an application 8032fg For more information www.linear.com/LTM8032 9 LTM8032 Applications Information Table 1. Recommended Component Values and Configuration VIN VOUT CIN COUT RADJ BIAS fOPTIMAL RT(OPTIMAL) fMAX RT(MIN) 3.6V to 36V 3.6V to 36V 3.6V to 36V 3.6V to 36V 3.6V to 36V 3.6V to 36V 4.0V to 36V 4.3V to 36V 5.5V to 36V 7V to 36V 10.5V to 36V 3.6V to 15V 3.6V to 15V 3.6V to 15V 3.6V to 15V 3.6V to 15V 3.6V to 15V 4.0V to 15V 4.3V to 15V 5.5V to 15V 7V to 15V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 10.5V to 24V 13V to 24V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 0.82V 1.00V 1.20V 1.50V 1.80V 2.00V 2.20V 2.50V 3.30V 5.00V 8.00V 0.82V 1.00V 1.20V 1.50V 1.80V 2.00V 2.20V 2.50V 3.30V 5.00V 0.82V 1.00V 1.20V 1.50V 1.80V 2.00V 2.20V 2.50V 3.30V 5.00V 8.00V 10.00V 0.82V 1.00V 1.20V 1.50V 1.80V 2.00V 2.20V 2.50V 3.30V 5.00V 8.00V 10.00V 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 2.2F 200F 1206 200F 1206 147F 1206 147F 1206 100F 1206 68F 1206 68F 1206 47F 1206 22F 1206 10F 1206 10F 1206 200F 1206 200F 1206 147F 1206 147F 1206 100F 1206 68F 1206 68F 1206 47F 1206 22F 1206 10F 1206 200F 1206 200F 1206 147F 1206 147F 1206 100F 1206 68F 1206 47F 1206 22F 1206 22F 1206 10F 1206 10F 1206 10F 1206 200F 1206 200F 1206 147F 1206 147F 1206 100F 1206 68F 1206 47F 1206 22F 1206 22F 1206 10F 1206 10F 1206 10F 1206 5.62M 953k 487k 280k 196k 165k 140k 115k 78.7k 47.5k 27.4k 5.62M 953k 487k 280k 196k 165k 140k 115k 78.7k 47.5k 5.62M 953k 487k 280k 196k 165k 140k 115k 78.7k 47.5k 27.4k 21.5k 5.62M 953k 487k 280k 196k 165k 140k 115k 78.7k 47.5k 27.4k 21.5k 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V AUX AUX AUX VIN VIN VIN VIN VIN VIN VIN VIN AUX AUX 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V AUX AUX AUX AUX 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V 2.8V, <25V AUX AUX AUX AUX 250k 300k 350k 400k 450k 450k 500k 550k 600k 700k 800k 250k 300k 350k 400k 450k 450k 500k 550k 600k 700k 250k 300k 350k 400k 450k 450k 500k 550k 600k 700k 800k 900k 250k 300k 350k 400k 450k 450k 500k 550k 600k 700k 800k 900k 150k 124k 105k 88.7k 78.7k 78.7k 69.8k 61.9k 54.9k 44.2k 39.2k 150k 124k 105k 88.7k 78.7k 78.7k 69.8k 61.9k 54.9k 44.2k 150k 124k 105k 88.7k 78.7k 78.7k 69.8k 61.9k 54.9k 44.2k 39.2k 34.0k 150k 124k 105k 88.7k 78.7k 78.7k 69.8k 61.9k 54.9k 44.2k 39.2k 34.0k 250k 300k 350k 400k 450k 450k 500k 600k 700k 1M 1.5M 600k 700k 800k 900k 1M 1.1M 1.25M 1.3M 1.7M 2M 400k 450k 500k 550k 650k 700k 750k 800k 1M 1.5M 1.5M 1.3M 250k 300k 350k 400k 450k 450k 500k 600k 700k 1M 1.5M 1.3M 150k 124k 105k 88.7k 78.7k 78.7k 69.8k 54.9k 44.2k 29.4k 16.2k 54.9k 44.2k 39.2k 34.0k 29.4k 26.1k 22.1k 21.0k 14.0k 10.0k 88.7k 79.0k 69.8k 61.9k 49.9k 44.2k 42.2k 39.2k 29.4k 16.2k 16.2k 21.0k 150k 124k 105k 88.7k 78.7k 78.7k 69.8k 54.9k 44.2k 29.4k 16.2k 21.0k Note: An input bulk capacitor is required. 200F is 2 x 100F, 147 is 100F||47F 8032fg 10 For more information www.linear.com/LTM8032 LTM8032 Applications Information circuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. Ceramic capacitors are also piezoelectric. In Burst Mode operation, the LTM8032's switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. Since the LTM8032 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet to a casual ear. If this audible noise is unacceptable, use a high performance electrolytic capacitor at the output. The input capacitor can be a parallel combination of a 2.2F ceramic capacitor and a low cost electrolytic capacitor. A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8032. A ceramic input capacitor combined with trace or cable inductance forms a high Q (under damped) tank circuit. If the LTM8032 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the device's rating. This situation is easily avoided; see the Hot-Plugging Safely section. Electromagnetic Compliance The LTM8032 is compliant with the radiated emissions requirements of EN55022 class B. Graphs of the LTM8032's EMC performance are given in the Typical Performance Characteristics section. Further data, operating conditions and test setup are detailed in an EMI Test report available from the Linear Technology website. Frequency Selection The LTM8032 uses a constant frequency PWM architecture that can be programmed to switch from 200kHz to 2.4MHz by using a resistor tied from the RT pin to ground. Table 2 provides a list of RT resistor values and their resultant frequencies. Operating Frequency Trade-Offs It is recommended that the user apply the optimal RT value given in Table 1 for the input and output operating condition. System level or other considerations, however, may necessitate another operating frequency. While the LTM8032 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may Table 2. Switching Frequency vs RT Value SWITCHING FREQUENCY (MHz) RT VALUE (k) 0.2 187 0.3 124 0.4 88.7 0.5 69.8 0.6 54.9 0.7 44.2 0.8 39.2 0.9 34 1.0 29.4 1.2 23.7 1.4 19.1 1.5 16.2 1.8 13.3 2 11.5 2.2 9.76 2.4 8.66 result in undesirable operation under certain operating or fault conditions. A frequency that is too high can reduce efficiency, generate excessive heat or even damage the LTM8032 if the output is overloaded or short-circuited. A frequency that is too low can result in a final design that has too much output ripple or too large of an output cap. The maximum frequency (and attendant RT value) at which the LTM8032 should be allowed to switch is given in Table 1 in the fMAX column, while the recommended frequency (and RT value) for optimal efficiency over the given input condition is given in the fOPTIMAL column. There are additional conditions that must be satisfied if the synchronization function is used. Please refer to the Synchronization section for details. BIAS Pin Considerations The BIAS pin is used to provide drive power for the internal power switching stage and operate internal circuitry. For proper operation, it must be powered by at least 2.8V. If the output voltage is programmed to be 2.8V or higher, simply tie BIAS to AUX. If VOUT is less than 2.8V, BIAS can be tied to VIN or some other voltage source. In all cases, ensure that the maximum voltage at the BIAS pin is both less than 25V and the sum of VIN and BIAS is less 8032fg For more information www.linear.com/LTM8032 11 LTM8032 Applications Information than 56V. If BIAS power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the LTM8032. To disable Burst Mode operation, tie SYNC to a stable voltage above 0.7V or synchronize to an external clock. Do not leave the SYNC pin floating. Load Sharing Minimum Input Voltage Two or more LTM8032s may be paralleled to produce higher currents. This may, however, alter the EMI performance of the LTM8032s. To do this, tie the VIN, ADJ, VOUT and SHARE pins of all the paralleled LTM8032s together. To ensure that paralleled modules start up together, the RUN/ SS pins may be tied together, as well. Synchronize the LTM8032s to an external clock to eliminate beat frequencies, if required. If the RUN/SS pins are not tied together, make sure that the same valued soft-start capacitors are used for each module. An example of two LTM8032 modules configured for load sharing is given in the Typical Applications section. The LTM8032 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. In addition, the input voltage required to turn on is higher than that required to run, and depends upon whether the RUN/SS is used. As shown in Figure 1, it takes only about 3.6VIN for the LTM8032 to run a 3.3V output at light load. If RUN/SS is tied directly to VIN, a 5.5V input voltage is required to start. If VIN is allowed to settle in the operating region first then the RUN/SS pin is enabled, the minimum input voltage to start at light load is lower, about 4.7V. A similar curve for 5VOUT operation is also provided in Figure 1. For current sharing applications using multiple LTM8032s, the ADJ pins for all regulators may be combined using one resistor to ground as determined by: 6.0 5.5 INPUT VOLTAGE (V) 196.71 N R ADJ = VOUT - 0.79 where N is the number of paralleled modules and RADJ is in k. 5.0 4.5 4.0 TO RUN TO START RUN/SS ENABLED 3.5 3.0 Burst Mode Operation 0 500 1000 1500 LOAD CURRENT (mA) 2000 8032 F01a 7.5 VOUT = 5V 7.0 INPUT VOLTAGE (V) To enhance efficiency at light loads, the LTM8032 automatically switches to Burst Mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. During Burst Mode operation, the LTM8032 delivers single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. In addition, VIN and BIAS quiescent currents are reduced to typically 25A and 60A respectively during the sleep time. As the load current decreases towards a no-load condition, the percentage of time that the LTM8032 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher efficiency. Burst Mode operation is enabled by tying SYNC to GND. VOUT = 3.3V 6.5 6.0 5.5 5.0 TO RUN TO START RUN/SS ENABLED 0 500 1500 1000 LOAD CURRENT (mA) 2000 8032 F01b Figure 1. The LTM8032 Needs More Voltage to Start Than Run 8032fg 12 For more information www.linear.com/LTM8032 LTM8032 Applications Information Soft-Start Shorted Input Protection The RUN/SS pin can be used to soft-start the LTM8032, reducing the maximum input current during start-up. The RUN/SS pin is driven through an external RC network to create a voltage ramp at this pin. Figure 2 shows the startup and shutdown waveforms with the soft-start circuit. By choosing an appropriate RC time constant, the peak start-up current can be reduced to the current that is required to regulate the output, with no overshoot. Choose the value of the resistor so that it can supply at least 20A when the RUN/SS pin reaches 2.5V. Care needs to be taken in systems where the output will be held high when the input to the LTM8032 is absent. This may occur in battery charging applications or in battery back-up systems where a battery or some other supply is diode ORed with the LTM8032's output. If the VIN pin is allowed to float and the RUN/SS pin is held high (either by a logic signal or because it is tied to VIN), then the LTM8032's internal circuitry will pull its quiescent current through its internal power switch. This is fine if your system can tolerate a few milliamps in this state. If you ground the RUN/SS pin, the internal switch current will drop to essentially zero. However, if the VIN pin is grounded while the output is held high, then parasitic diodes inside the LTM8032 can pull large currents from the output through the VIN pin, potentially damaging the device. Figure 3 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. IL 1A/DIV RUN 15k RUN/SS 0.22F VRUN/SS 2V/DIV GND VOUT 2V/DIV VIN 2ms/DIV 8023 F02 VIN VOUT VOUT RUN/SS AUX LTM8032 BIAS Figure 2. To Soft-Start the LTM8032, Add a Resistor and Capacitor to the RUN/SS Pin ADJ RT SYNC GND Synchronization The internal oscillator of the LTM8032 can be synchronized by applying an external 250kHz to 2MHz clock to the SYNC pin. Do not leave this pin floating. The resistor tied from the RT pin to ground should be chosen such that the LTM8032 oscillates 20% lower than the intended synchronization frequency (see the Frequency Selection section). The LTM8032 will not enter Burst Mode operation while synchronized to an external clock, but will instead skip pulses to maintain regulation. 8032 F03 Figure 3. The Input Diode Prevents a Shorted Input from Discharging a Back-Up Battery Tied to the Output. It Also Protects the Circuit from a Reversed Input. The LTM8032 Runs Only When the Input is Present 8032fg For more information www.linear.com/LTM8032 13 LTM8032 Applications Information PCB Layout as possible to the FIN terminals, such that its ground connection is as close as possible to that of the CIN capacitor. Most of the headaches associated with PCB layout have been alleviated or even eliminated by the high level of integration of the LTM8032. The LTM8032 is nevertheless a switching power supply and care must be taken to minimize EMI and ensure proper operation. Even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. See Figure 4 for a suggested layout. 3. Place the COUT capacitor as close as possible to the VOUT and GND connection of the LTM8032. 4. Place the CIN and COUT capacitors such that their ground currents flow directly adjacent or underneath the LTM8032. 5. Connect all of the GND connections to as large a copper pour or plane area as possible on the top layer. Avoid breaking the ground connection between the external components and the LTM8032. Ensure that the grounding and heat sinking are acceptable. A few rules to keep in mind are: 1. Place the RADJ and RT resistors as close as possible to their respective pins. PGOOD RT GND RADJ 6. Use vias to connect the GND copper area to the board's internal ground plane. Liberally distribute these GND vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. 2. Place the CIN capacitor as close as possible to the VIN and GND connection of the LTM8032. If a capacitor is connected to the FIN terminals, place it as close COUT SYNC AUX BIAS RUN/SS FIN VIN OPTIONAL FIN CAPACITOR VOUT CIN GND 8032 F04 Figure 4. Layout Showing Suggested External Components, GND Plane and Thermal Vias (LGA Package) 8032fg 14 For more information www.linear.com/LTM8032 LTM8032 Applications Information Hot-Plugging Safely The small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8032. However, these capacitors can cause problems if the LTM8032 is plugged into a live or fast rising or falling supply (see Linear Technology Application Note 88 for a complete discussion). The low loss ceramic capacitor combined with stray inductance in series with the power source forms an under-damped tank circuit, and the voltage at the VIN pin of the LTM8032 can ring to twice the nominal input voltage, possibly exceeding the LTM8032's rating and damaging the part. A similar phenomenon can occur inside the LTM8032 module, at the output of the integrated EMI filter, with the same potential of damaging the part. If the input supply is poorly controlled or the user will be plugging the LTM8032 into an energized supply, the input network should be designed to prevent this overshoot. Figure 5 shows the waveforms that result when an LTM8032 circuit is connected to a 24V supply through six feet of 24-gauge twisted pair. The first plot (5a) is the response with a 2.2F ceramic capacitor at the input. The input voltage rings as high as 35V and the input current peaks at 20A. One method of damping the tank circuit is to add another capacitor with a series resistor to the circuit. An alternative solution is shown in Figure 5b. A 0.7 resistor is added in series with the input to eliminate the voltage overshoot (it also reduces the peak input current). A 0.1F capacitor improves high frequency filtering. For high input voltages its impact on efficiency is minor, reducing efficiency less than one-half percent for a 5V output at full load operating from 24V. By far the most popular method of controlling overshoot is shown in Figure 5c, where an aluminum electrolytic capacitor has been connected to FIN. This capacitor's high equivalent series resistance damps the circuit and eliminates the voltage overshoot. The extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. Figure 5c shows the capacitor added to the VIN terminals, but placing the electrolytic capacitor at the FIN terminals can improve the LTM8032's EMI filtering as well as guard against overshoots caused by the Q of the integrated filter. 8032fg For more information www.linear.com/LTM8032 15 LTM8032 Applications Information CLOSING SWITCH SIMULATES HOT PLUG IIN + LOW IMPEDANCE ENERGIZED 24V SUPPLY LTM8032 VIN VIN 20V/DIV DANGER RINGING VIN MAY EXCEED ABSOLUTE MAXIMUM RATING 4.7F IIN 10A/DIV STRAY INDUCTANCE DUE TO 6 FEET (2 METERS) OF TWISTED PAIR 20s/DIV (5a) 0.7 + 0.1F LTM8032 VIN VIN 20V/DIV 4.7F IIN 10A/DIV 20s/DIV (5b) + 22F 35V AI.EI. + FIN LTM8032 VIN VIN 20V/DIV 4.7F IIN 10A/DIV 20s/DIV 8032 F05 (5c) Figure 5. A Well Chosen Input Network Prevents Input Voltage Overshoot and Ensures Reliable Operation When the LTM8032 is Hot-Plugged to a Live Supply 8032fg 16 For more information www.linear.com/LTM8032 LTM8032 Applications Information Thermal Considerations The LTM8032 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. The amount of current derating is dependent upon the input voltage, output power and ambient temperature. The temperature rise curves given in the Typical Performance Characteristics section can be used as a guide. These curves were generated by an LTM8032 mounted to a 36cm2 4-layer FR4 printed circuit board. Boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system's line, load and environmental operating conditions. The thermal resistance numbers listed in the Pin Configuration are based on modeling the Module package mounted on a test board specified per JESD51-9 "Test Boards for Area Array Surface Mount Package Thermal Measurements." The thermal coefficients provided in this page are based on JESD 51-12 "Guidelines for Reporting and Using Electronic Package Thermal Information." For increased accuracy and fidelity to the actual application, many designers use FEA to predict thermal performance. To that end, the Pin Configuration typically gives four thermal coefficients: * JA - Thermal resistance from junction to ambient. * JCbottom - Thermal resistance from junction to the bottom of the product case. * JCtop - Thermal resistance from junction to top of the product case. * JB - Thermal resistance from junction to the printed circuit board. While the meaning of each of these coefficients may seem to be intuitive, JEDEC has defined each to avoid confusion and inconsistency. These definitions are given in JESD 51-12, and are quoted or paraphrased in the following: * JA is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as "still air" although natural convection causes the air to move. This value is determined with the part mounted to a JESD 51-9 defined test board, which does not reflect an actual application or viable operating condition. * JCbottom is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. In the typical Module regulator, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient environment. As a result, this thermal resistance value may be useful for comparing packages but the test conditions don't generally match the user's application. * JCtop is determined with nearly all of the component power dissipation flowing through the top of the package. As the electrical connections of the typical Module regulator are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. As in the case of JCbottom, this value may be useful for comparing packages but the test conditions don't generally match the user's application. * JB is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the Module regulator and into the board, and is really the sum of the JCbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. The board temperature is measured a specified distance from the package, using a two sided, two layer board. This board is described in JESD 51-9. 8032fg For more information www.linear.com/LTM8032 17 LTM8032 Applications Information The most appropriate way to use the coefficients is when running a detailed thermal analysis, such as FEA, which considers all of the thermal resistances simultaneously. None of them can be individually used to accurately predict the thermal performance of the product, so it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature versus load graphs given in the LTM8032 data sheet. A graphical representation of these thermal resistances is given in Figure 6. The blue resistances are contained within the Module regulator, and the green are outside. The die temperature of the LTM8032 must be lower than the maximum rating of 125C, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8032. The bulk of the heat flow out of the LTM8032 is through the bottom of the module and the pads into the printed circuit board. Consequently a poor printed circuit board design can cause excessive heating, resulting in impaired performance or reliability. Please refer to the PCB Layout section for printed circuit board design suggestions. Finally, be aware that at high ambient temperatures the internal Schottky diode will have significant leakage current increasing the quiescent current of the LTM8032. JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD) JUNCTION-TO-CASE (TOP) RESISTANCE JUNCTION CASE (TOP)-TO-AMBIENT RESISTANCE JUNCTION-TO-BOARD RESISTANCE JUNCTION-TO-CASE CASE (BOTTOM)-TO-BOARD (BOTTOM) RESISTANCE RESISTANCE At BOARD-TO-AMBIENT RESISTANCE 8032 F06 MODULE REGULATOR Figure 6 8032fg 18 For more information www.linear.com/LTM8032 LTM8032 Typical Applications 0.82V Step-Down Converter VIN* 3.6VDC TO 24VDC VOUT VIN 2.2F FIN LTM8032 VOUT 0.82V 200F 2A AUX RUN/SS BIAS SHARE PGOOD RT SYNC GND ADJ 5.62M 150k 8032 TA02 *RUNNING VOLTAGE RANGE. SEE APPLICATIONS FOR START-UP DETAILS 1.8V Step-Down Converter VIN* 3.6VDC TO 24VDC VOUT VIN 2.2F FIN LTM8032 RUN/SS VOUT 1.8V 100F 2A AUX BIAS SHARE PGOOD RT SYNC GND ADJ 78.7k *RUNNING VOLTAGE RANGE. SEE APPLICATIONS FOR START-UP DETAILS 196k 8032 TA03 8032fg For more information www.linear.com/LTM8032 19 LTM8032 Typical applications 2.5V Step-Down Converter VIN* 4.3VDC TO 36VDC 2.2F FIN LTM8032 RUN/SS 3.3V 47F VOUT 2.5V 2A 22F VOUT 3.3V 2A VOUT VIN AUX BIAS SHARE PGOOD RT SYNC GND ADJ 115k 61.9k 8032 TA04 *RUNNING VOLTAGE RANGE. SEE APPLICATIONS FOR START-UP DETAILS 3.3V Step-Down Converter VIN* 5.5VDC TO 36VDC VOUT VIN FIN RUN/SS 2.2F AUX LTM8032 BIAS SHARE PGOOD RT SYNC GND ADJ 54.9k 78.7k *RUNNING VOLTAGE RANGE. SEE APPLICATIONS FOR START-UP DETAILS 8032 TA08 5V Step-Down Converter VIN* 7VDC TO 36VDC VOUT VIN 10F FIN RUN/SS 2.2F VOUT 5V 2A AUX LTM8032 BIAS SHARE PGOOD RT SYNC GND ADJ 44.2k *RUNNING VOLTAGE RANGE. SEE APPLICATIONS FOR START-UP DETAILS 47.5k 8032 TA05 8032fg 20 For more information www.linear.com/LTM8032 LTM8032 Typical applications 8V Step-Down Converter VIN* 10.5VDC TO 36VDC VOUT VIN 10F FIN RUN/SS 2.2F VOUT 8V 2A AUX LTM8032 BIAS SHARE PGOOD RT SYNC GND ADJ 39.2k 27.4k *RUNNING VOLTAGE RANGE. SEE APPLICATIONS FOR START-UP DETAILS 8032 TA06 Two LTM8032s Operating in Parallel VIN* 5.5VDC TO 36VDC VOUT 3.3V 3.5A VOUT VIN FIN RUN/SS AUX LTM8032 BIAS 2.2F SHARE PGOOD RT SYNC GND ADJ 54.9k 40k OPTIONAL SYNC TIE TO GND IF NOT USED VOUT VIN 47F FIN RUN/SS 2.2F AUX LTM8032 BIAS SHARE PGOOD RT SYNC GND ADJ 54.9k 8032 TA07 *RUNNING VOLTAGE RANGE. SEE APPLICATIONS FOR START-UP DETAILS 8032fg For more information www.linear.com/LTM8032 21 LTM8032 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. LGA Package 71-Lead (15mm x 9mm x 2.82mm) (Reference LTC DWG # 05-08-1823 Rev A) SEE NOTES 7 2.670 - 2.970 7 aaa Z 6 5 4 3 2 1 PAD 1 O (0.635) A PAD 1 CORNER B 4 C D E 15.00 BSC 12.700 BSC F G H MOLD CAP SUBSTRATE J 0.27 - 0.37 DETAIL A PADS SEE NOTES X 9.00 BSC Y DETAIL A PACKAGE SIDE VIEW PACKAGE TOP VIEW aaa Z K 1.270 BSC Z bbb Z 2.40 - 2.60 3 L 1.27 BSC 7.620 BSC DETAIL A PACKAGE BOTTOM VIEW 0.635 0.025 SQ. 71x 3.810 2.540 1.270 0.000 1.270 2.540 3.810 eee S X Y 6.350 5.080 3.810 DETAIL A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 2.540 3 LAND DESIGNATION PER JESD MO-222, SPP-010 AND SPP-020 1.270 4 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 0.000 1.270 LTMXXXXXX Module COMPONENT PIN 1 TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION LGA 71 1212 REV A 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 71 2.540 3.810 5.080 6.350 7 ! PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG Module PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY SYMBOL TOLERANCE aaa 0.15 bbb 0.10 eee 0.05 SUGGESTED PCB LAYOUT TOP VIEW 8032fg 22 For more information www.linear.com/LTM8032 LTM8032 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. BGA Package 71-Lead (15mm x 9.00mm x 3.42mm) (Reference LTC DWG # 05-08-1885 Rev A) A aaa Z E Y Z X SEE NOTES DETAIL A A2 SEE NOTES 7 6 5 4 3 2 7 1 PIN 1 3 A A1 PIN "A1" CORNER B ccc Z 4 C D b b1 MOLD CAP E SUBSTRATE D G Z // bbb Z F F H1 H2 H DETAIL B J e Ob (71 PLACES) K ddd M Z X Y eee M Z L aaa Z e PACKAGE TOP VIEW 3.810 2.540 1.270 0.3175 0.3175 1.270 2.540 3.810 0.000 PACKAGE BOTTOM VIEW 2. ALL DIMENSIONS ARE IN MILLIMETERS DIMENSIONS 5.080 3.810 2.540 1.270 0.000 1.270 2.540 3.810 5.080 6.350 SUGGESTED PCB LAYOUT TOP VIEW NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 DETAIL A 6.350 0.630 0.025 O 71x b G DETAIL B PACKAGE SIDE VIEW 4.765 5.395 SYMBOL A A1 A2 b b1 D E e F G H1 H2 aaa bbb ccc ddd eee MIN 3.22 0.50 2.72 0.71 0.60 0.27 2.45 NOM 3.42 0.60 2.82 0.78 0.63 15.0 9.0 1.27 12.7 7.62 0.32 2.50 MAX 3.62 0.70 2.92 0.85 0.66 0.37 2.55 0.15 0.10 0.20 0.30 0.15 TOTAL NUMBER OF BALLS: 71 NOTES 3 BALL DESIGNATION PER JESD MS-028 AND JEP95 4 DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. SOLDER BALL COMPOSITION CAN BE 96.5% Sn/3.0% Ag/0.5% Cu OR Sn Pb EUTECTIC 7 ! PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG Module PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY LTMXXXXXX Module COMPONENT PIN "A1" TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION BGA 71 1212 REV A 8032fg For more information www.linear.com/LTM8032 23 LTM8032 Package Description Table 3. LTM8032 Pinout (Sorted by Pin Number) PIN SIGNAL DESCRIPTION PIN SIGNAL DESCRIPTION A1 VOUT E7 GND A2 VOUT F1 GND A3 VOUT F2 GND A4 VOUT F3 GND A5 GND F4 GND A6 GND F5 GND A7 GND F6 GND B1 VOUT F7 GND B2 VOUT G1 GND B3 VOUT G2 GND B4 VOUT G3 GND B5 GND G4 GND B6 GND G5 GND B7 GND G6 GND C1 VOUT G7 RT C2 VOUT H1 GND C3 VOUT H2 GND C4 VOUT H3 GND C5 GND H4 BIAS C6 GND H5 AUX C7 GND H6 GND D1 VOUT H7 SHARE D2 VOUT J5 GND D3 VOUT J6 GND D4 VOUT J7 ADJ D5 GND K1 VIN D6 GND K2 VIN D7 GND K3 FIN E1 GND K5 GND E2 GND K6 GND E3 GND K7 PGOOD E4 GND L1 VIN E5 GND L2 VIN E6 GND L3 FIN L5 RUN/SS L6 SYNC L7 GND 8032fg 24 For more information www.linear.com/LTM8032 LTM8032 Revision History (Revision history begins at Rev D) REV DATE DESCRIPTION D 8/11 Added BGA package. Changes reflected throughout the data sheet. E 9/11 Updated BGA Pin Configuration diagram. 2 F 2/12 G 1/14 PAGE NUMBER 1 to 26 Indicate Figure 4 is Layout Example for LGA Package 14 Consolidate BGA and LGA Pinout Table 24 Added SnPb terminal finish product option 1, 2 8032fg Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more information www.linear.com/LTM8032 tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 25 LTM8032 Package Photographs LGA BGA Related Parts PART NUMBER DESCRIPTION COMMENTS LTM8033 EN55022B Certified 36V, 3A Step-Down Module Regulator 0.8V VOUT 24V, Synchronizable, 11.25mm x 15mm x 4.3mm LGA LTM4606 EN55022B Certified 28V, 6A Step-Down Module Regulator 0.6V VOUT 5V, Synchronizable, 15mm x 15mm x 2.8mm LGA LTM4612 EN55022B Certified 36V, 5A Step-Down Module Regulator 3.3V VOUT 15V, Synchronizable, 15mm x 15mm x 2.8mm LGA LTM4613 EN55022B Certified 36V, 8A Step-Down Module Regulator 3.3V VOUT 15V, Synchronizable, 15mm x 15mm x 4.3mm LGA LTM8023 36V, 2A Step-Down Module Regulator 0.8V VOUT 10V, Synchronizable, 9mm x 11.25mm x 2.8mm LGA 8032fg 26 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTM8032 (408) 432-1900 FAX: (408) 434-0507 www.linear.com/LTM8032 LT 0114 REV G * PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2009