1- of-8 Deco der
fax id: 7013
CY54/74FCT138T
Cypress Semiconductor Corporation 3901 North First Street San Jose CA 95134 408-943-2600
May 1994 – Revised March 17, 1997
1CY54/74FCT138T
Features
Function, pinout, a n d drive compatibl e with FCT and
F logic
FCT-C speed at 5.0 ns max. (Com’l),
FCT-A speed at 5.8 ns max. (Com’l)
Reduced VOH (typi cally = 3.3V) versions of equiv alent
FCT functions
Edge-rate con trol circuitry for significantly improved
noise c h aracteristics
Power-off disable feature
ESD > 2000V
Matched rise and fall times
Fully compatible with TTL inp ut and outpu t logic levels
Extended commerci al r an ge of 40°C to +85°C
Sink current 64 mA (Com’l),
32 mA (Mil)
Source current 32 mA ( Com’l ),
12 mA (Mil)
Dual 1-of-8 decoder with enables
Functional Description
The FCT138T is a 1-of-8 decoder. The FCT138T accepts
three binary weighted inputs (A0, A1, A2) and, when enabled,
provides eight mutually exclusive active LOW outputs
(O0–O7). The FCT138T features three enable inputs, two
active LOW (E1, E2) an d one active HIGH (E3).
All inputs will be HIGH unless E1 and E2 are LOW and E3 is
HIGH. This multiple enable function allows easy parallel
expansion of the device to a 1-of-32 (5 lines to 32 lines)
decoder with just four FCT138T devices and one inverter.
The outputs are designed with a power-off disable feature to
allow for live insertion of b oards.
Pin Description
Name Description
AAddress Inputs
E1E2Enable Inputs (Active LOW)
E3Enable Input (Active HIGH)
OOutputs
Logic Block Diagram Pin Configurations
1
2
3
4
5
6
7
8
A1
A2
E1
E2
E3
O7
VCC
GND
FCT138T–2
Top View
4
8
9
10
11
12
765
15 16 17 18
3
2
1
20
13 14 19
E3
E2
E1
O2
O4
O5
O1
O6
NC
A1
NC
NC
VCC
O0
O7
GND A0
O3
Top View DIP/SOIC/QSOP
A2
LCC
NC
16
15
14
13
12
11
10
9
O4
O5
O6
O7O0
O1
O2
O3
E1
A2A1A0E2E3
FCT138T–1
A0
O4
O5
O6
O0
O1
O2
O3
FCT138T–3
CY54/74FCT138T
2
]
Maximum Ratings[2, 3]
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–65°C to +135°C
Supply Volta ge to Gr ound Pote ntial............... –0.5V to +7.0V
DC Input Voltage............................................ –0.5V to +7.0V
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin).......120 mA
Power Dissipation. ...................... ................................... 0.5W
Static Discharge Voltage...........................................>2001V
(per MIL-STD-883, Method 3015)
Function Table[1]
Inputs Outputs
E1E2E3A0A1A2O0O1O2O3O4O5O6O7
H
X
X
X
H
X
X
X
L
X
X
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
H
L
L
H
H
L
L
L
L
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
Operating Range
Range Range Ambient
Temperature VCC
Commercial All –40°C to +8 5°C 5V ± 5%
Military[4] All –55°C to +125°C 5V ± 10%
Electrical Characteristics Over the Operating Range
Parameter Description Test Condition s Min. Typ.[5] Max. Unit
VOH Output HIGH Voltage VCC= Min., IOH=–32 mA Com’l 2.0 V
VOH Output HIGH Voltage VCC= Min., IOH=–15 mA Com’l 2.4 3.3 V
VOH Output HIGH Voltage VCC= Min., IOH=–12 mA Mil 2.4 3.3 V
VOL Output LOW Voltage VCC= Min., IOL=64 mA Com’l 0.3 0.55 V
VCC= Min., IOL=32 mA Mil 0.3 0.55 V
VIH Input HIGH Voltage 2.0 V
VIL Input LOW Voltage 0.8 V
VHHysteresis[6] All inputs 0.2 V
VIK In put Clamp Diode Voltage VCC= Min., IIN=–18 mA –0.7 –1.2 V
IIInput HIGH Current VCC=Max., VIN=VCC 5µA
IIH Input HIGH Current VCC=Max., VIN=2.7V ±1µA
IIL Input LOW Current VCC=Max., VIN=0.5V ±1µA
IOS Output Short Circ uit Current[7] VCC=Max., VOUT=0.0V –60 –120 –225 mA
IOFF Power-Off Disable VCC=0V, VOUT=4.5V ±1µA
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic vo ltage level, preferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25°C ambient.
6. This parameter is guaranteed but not tested.
7. Not more than one output should be s horted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or s ample
and hold techniques are preferable in order to minim ize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametr ic tests. In any sequence of parameter
tests, IOS tests shoul d be performed l ast.
CY54/74FCT138T
3
Capacitance[6]
Parameter Description Typ.[5] Max. Unit
CIN Input Capaci tance 5 10 pF
COUT Output Capacitance 9 12 pF
Power Supply Characteristics
Parameter Description Test Condi tions Typ.[5] Max. Unit
ICC Quiescent Power Supply Current VCC=Max., VIN<0.2V,
VIN > VCC–0.2V 0.1 0.2 mA
ICC Quiescent Power Supply Current
(TTL inputs) VCC=Max., V IN=3.4V,[8]
f1=0, Outputs Open 0.5 2.0 mA
ICCD Dynamic Power Supply
Current[9] VCC= Max., One Input Toggling,
50% Duty Cycl e, Outputs Open,
VIN < 0 . 2V or VIN > VCC–0.2V
0.06 0.12 mA/MHz
ICTotal Power Supply Current[10] VCC=Max., f1=10 MHz,
50% Dut y Cycle, O utp uts Open, Toggle
E1, E2, or E3, One Output Toggling,
VIN < 0. 2V or VIN > VCC–0.2V
0.7 1.4 mA
VCC=Max., f1=10 MHz,
50% Dut y Cycle, O utp uts Open, Toggle
E1, E2, or E3, One Output Toggling,
VIN=3.4V or VIN=GND
1.0 2.4 mA
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC=I
QUIESCENT + IINPUTS + IDYNAMIC
IC=I
CC+ICCDHNT+ICCD(f0/2 + f1N1)
ICC = Quiescent Current with CMOS input levels
ICC = Po wer Supp ly Current for a TTL HIGH input (VIN=3.4V)
DH = Duty Cycle for TTL inputs HIGH
NT = Number of TTL inputs at DH
ICCD = Dynamic Current caused by an input transition pair (HLH or LHL)
f0= Clock frequency for registered devices, otherwise zero
f1= Inpu t signal frequency
N1= Numbe r of inputs cha nging at f1
All currents are in milliamps and all frequencies are in megahertz.
CY54/74FCT138T
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Document #: 38-00297-B
Switching Characteristics Over the Operating Range
Parameter Description
FCT138T FCT138AT
Unit Fig.
No.[12]
Military Commercial Military Commercial
Min.[11] Max. Min.[11] Max. Min.[11] Max. Min.[11] Max.
tPLH
tPHL Pro pagation Dela y
A to O 1.5 12.0 1.5 9.0 1.5 7.8 1.5 5.8 ns 1, 2
tPLH
tPHL Pro pagation Dela y
E1 or E2 to O 1.5 12.5 1.5 9.0 1.5 8.0 1.5 5.9 ns 1, 5
tPLH
tPHL Pro pagation Dela y
E3 to O 1.5 12.5 1.5 9.0 1.5 8.0 1.5 5.9 ns 1, 5
Parameter Description
FCT138CT
Unit Fig. No.[12]
Military Commercial
Min.[11] Max. Min.[11] Max.
tPLH
tPHL Propagation Delay A to O 1.5 6.0 1.5 5.0 ns 1, 2
tPLH
tPHL Propagation Delay E1 or E2 to O 1.5 6.1 1.5 5.0 ns 1, 5
tPLH
tPHL Propagation Delay E3 to O 1.5 6.1 1.5 5.0 ns 1, 5
Orde rin g Inf orm a tio n
Speed
(ns) Order ing Code Package
Name Package Type Operating
Range
5.0 CY74FCT138CTQC Q1 1 6-Lead (150-Mil) QSO P Commercial
CY74FCT138CTSOC S1 1 6-Lead (300-Mil) Molded SOIC
5.8 CY74FCT138ATPC P1 16- Lead (300-Mil) Molded DIP Commercial
CY74FCT138ATQC Q1 16- Lead (150-Mil) QSOP
CY74FCT138ATSOC S1 16- Lead (300-Mil) Molded SOIC
6.0 CY54FCT138CTDMB D2 16-Lead (300-Mil) CerDIP Military
CY54FCT138CTLMB L61 20-Pin Square Leadless Chip Carrier
9.0 CY74FCT138TSOC S1 1 6-Lead (300-Mil) Molded SOIC Commercial
Notes:
11. Minimum limits are guaranteed but not tested on Propagation Delays.
12. See “Parameter Measurement Information” in the General Information Section.
CY54/74FCT138T
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Package Diagrams
16-Lead (300-Mil) CerDIP D2
MIL-STD-1835 D-2 Config.A 20-Pin Square Leadless Chip Carrier L61
MIL-STD-1835 C-2A
16-Lead (300-Mil) Molded DIP P1
CY54/74FCT138T
© Cypress Semiconductor Corporation, 1997. Th e information contained her ein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry othe r than circui try embodi ed in a Cypress Semi conductor prod uct. Nor do es it convey or im ply an y li cens e under p atent or other rights . Cypress Semi conductor does not authori ze
its products for use as criti cal components in life-support systems where a malfunction or failure may reasonably be expected to result in sign ificant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypr ess Semiconductor again st all charges.
Package Diagrams (continued)
16-Lead Quarter Size Outline Q1
16-Lead Molded SOIC S1