Integrated Device Technology, Inc. CMOS STATIC RAM dt 16K (2K x 8 BIT) IDT6116SA IDT6116LA FEATURES: * High-speed access and chip select times Military: 20/25/35/45/55/70/90/120/150ns (max.) Commercial: 15/20/25/35/45ns (max.) Low-power consumption Battery backup operation 2V data retention voltage (LA version only) Produced with advanced CMOS high-performance technology CMOS process virtually eliminates alpha particle soft-error rates Input and output directly TTL-compatible Static operation: no clocks or refresh required Available in ceramic and plastic 24-pin DIP, 24-pin Thin Dip and 24-pin SOIC and 24-pin SOU Military product compliant to MIL-STD-833, Class B DESCRIPTION: The IDT6116SA/LA is a 16,384-bit high-speed static RAM organized as 2K x 8. It is fabricated using IDT's high-perfor- mance, high-reliability CMOS technology. Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode. When CS goes HIGH, the circuit will automatically go to, and remain in, a standby power made, as jong as CS remains HIGH. This capability provides significant system level power and cooling savings. The low-power (LA) versian also offers a battery backup data retention capability where the circuit typically consumes only 1pLW to 4uW operating off a 2V battery. All inputs and outputs of the IDT6116SA/LA are TTL- compatible. Fully static asynchronous circuitry is used, requir- ing no clocks or refreshing for operation. The IDT61 16SA/LA is packaged in 24-pin 600 and 300 mil plastic or ceramic DIP and a 24-lead gull-wing SOIC, anda 24 -lead J-bend SOJ providing high board-level packing densi- ties. Military grade product is manufactured in compliance to the latest version of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. FUNCTIONAL BLOCK DIAGRAM ADDRESS DECODER VOo INPUT DATA CIRCUIT VO7 CONTROL CIRCUIT The IDT logo is aregistered trademark of Integrated Device Technology, Inc, MILITARY AND COMMERCIAL TEMPERATURE RANGES (1996 Integraled Device Technology, Inc. Vcc 128 X 128 MEMORY ARRAY GND VO CONTROL 3089 drw 01 MARCH 1996 3089/1 MM 4825771 0023750 4oT a a aIDT6116SA/LA . CMOS STATIC RAM 16K (2K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS A? Cy4 aed 24 Fvec As cy 2 23 = Aa as 3 P24-2 22 | Ag As C4 p24-1 21 WE A3 5 De42 201 OF a2 C6 p24-1 19 Daio aiG7 so22 18s Ao U8 & 17 | 07 voo Ca $024-4 16 (1 1/06 vOo1 E10 15 1 Os VvO2 cB] 140 O4 GND q 12 13 A VO3 3089 drw 02 DIP/SOIC/SOJ TOP VIEW PIN DESCRIPTIONS Ao-A13 1/Oo0-1/O7 Address | Data Select Write Enable Enable Power CAPACITANCE (Ta = +25C, F = 1.0 MHz) Symbol Parameter Conditions | Max. | Unit CIN Input Capacitance VIN = OV 8 pF Cio VO Capacitance VOUT = 0V 8 pF NOTE: 3089 tbl 03 1. This parameter is determined by device characterization, but is not production tested. ABSOLUTE MAXIMUM RATINGS) Symbol Rating Commercial| Military | Unit Terminal Voltage Vterm)| with Respect to GND|-0.5 to + 7.0|-0.5 to +7.0| V Operating TA Temperature Oto+70 j-55to +125) C Temperature TBIAS Under Bias -55 to + 125 |-65 to +135) C Storage TsTG Temperature 55 to + 125/-65 to +150] C Power PT Dissipation 1.0 1.0 Ww lout DC Output Current 50 50 mA NOTES: 3089 tbl 04 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT- INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions 3089 tbl 01 above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VTERM must not exceed Vcc +0.5V. TRUTH TABLE) Mode cs OE We vo Standby H xX Xx High-Z Read L L H DATAGUT Read L H H High-Z Write L Xx L DATAIN NOTE: 3089 tb! 02 1. H= Vin, L = Vit, X = Don't Care, 51 2 Mm 4825771 0023751 366IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE RECOMMENDED Dc OPERATING CONDITIONS Ambient Symbol Parameter Min. | Typ. Max. [Unit Grade Temperature GND vec Veo Supply Voltage 4.5 5.0 552 | V Military 55C to +125C ov 5.0V + 10% GND Supply Ground 0 0 0 Vv Commercial | 0C to +70C ov 5.0V + 10% Vid__| Input High Voltage | 22 | 3.5 [Vec+05] v nee ios VIL Input Low Voltage | -o.50) [7 0.8 Vv NOTES: 3089 bl 06 1. Vit (min.) = -3.0V for pulse width less than 20ns, once per cycle. 2. VIN must not exceed Vcc +0.5V. DC ELECTRICAL CHARACTERISTICS Vcc = 5.0V + 10% IDT6116SA IDT6116LA Symbol Parameter Test Conditions Min. Max. | Min. Max. Unit MIL. _ 10 _ 5 Mui Input Leakage Current Vcc = Max., VIN = GND to Voc COM'L. 5 _ 2 LA Vcc = Max. MIL. 10 _ 5 IILOL | Output Leakage Current CS = Vin, Vout = GND to Voc COM'L, | 5 2 yA VoL Output Low Voltage lo. = 8mA, Vec = Min. _ 0.4 0.4 Vv VOH Output High Voltage loH =4mA, Vcc = Min. 2.4 _ 2.4 _ Vv 3089 th! 07 DC ELECTRICAL CHARACTERISTICS ) Vcc = 5.0V + 10%, Vic = 0.2V, VHC = Vec - 0.2V 6116SA15@) 6116SA20 6116SA25 6116SA35 6116LA15@) 6116LA20 6116LA25 6116LA35 Symbol Parameter Power | Com'l. Nil. Com'l, Mil. Com'l. Mil. Com't. Mil. Unit lcc1 | Operating Power Supply SA 105 105 130 80 90 80 90 mA Current, CS < Vit, Outputs Open, LA 95 95 120 75 85 75 85 Vcc = Max.,f=0 Iec2 Dynamic Operating SA 150 _ 130 150 120 135 100 115 mA Current, CS < ViL, Vcc = Max., LA 140 {20 140 410 125 95 105 Outputs Open, f = fuax(4) IsB Standby Power Supply SA 40 _ 40 50 40 45 25 35 mA Current (TTL Level) CS = Vin, Vcc = Max., LA 35 _ 35 45 35 40 25 30 Outputs Open, f = fuax(4) IsB1_ | Full Standby Power SA 2 2 10 2 10 2 10 mA Supply Current _ (CMOS Level), CS 2 Vuc,| LA 0.1 _ 0.1 0.9 0.4 0.9 0.1 0.9 Vec =Max., VIN = VHC or Vins Vic, f=0 NOTES: 1, All values are maximum guaranteed values. 2. OC to + 70C temperature range only. 3. -55C to + 125C temperature range only. 4. fmax = 1/tRc, only address inputs are cycling at fax, f = 0 means address inputs are not changing. 3089 tbl 08 5.1 MM 442577h 0023752 212 a ea eeIDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT} DC ELECTRICAL CHARACTERISTICS ") (Continued) Voc =5.0V + 10%, Vic = 0.2V, VHe = Vcc - 0.2V MILITARY AND COMMERCIAL TEMPERATURE RANGES 6116SA45 6116SA55) 6116SA70 | 6116SA90" | 6116SA120 | 6116SA1 50) 6116LA45 6116LA55 6116LA70 | 6116LA90 | 6116LA120 | 61 16LA150 Symbol Parameter PowerlCom'| mit. | Com'l| Mil. | Com't.| Mil, | Com'l.| Mil. | Com'l. Mil, | Com'l. | Mil. | Unit Icc1 Operating Power Supply | SA | 80 |} 90 | 90 _ 90 _ 90 _ 90 90 | mA Current, CS VIL, Outputs Open, LA | 75 | 8 _ 85 | 85 _ 85 _ 85 85 Voc =Max.,f=0 . lece Dynamic Operating SA } 100 | 100 | 100 | 100 _ 100 _ 100 _ 90 | mA Current, CS < VIL, Voc = Max., LA | 90 | 95 _ 90 _ 90 85 _ 85 _ 85 Outputs Open, f = imax) Isa Standby Power Supply SA | 25 | 25 | 2 | 2 25 25 _ 25 | mA Current (TTL Level) CS 2 VIH, Vcc = Max., LA | 20 | 20 | 20 _ 20 _ 25 15 _ 15 Outputs Open, f = fMax \sB1 Full Standby Power SA 2 10 _ 10 _- 10 _ 10 _ 10 _ 10 | mA Supply Current (CMOS Level), CS2 VHc,| LA 0.1 | 0.9 {09 | 09 _ 0.9 _ 0.9 _ 0.9 Veco =Max., VIN > VHC or VIN < Vic, f= 0 NOTES: 3089 th! 09 4, All values are maximum guaranteed values. 2. 0C to + 70C temperature range only. 3. -55C to + 125C temperature range only. 4. fwax = 1/ARc, only address inouts are toggling at fwax, f = 0 means address inputs are not changing. DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES (LA Version Only) VLC = 0.2V, VHC = Voc - 0.2V , Typ. Max. Vcc Vec Symbol Parameter Test Conditions Min. 2.0V 3.0V 2.0V 3.0V Unit VOR Voc for Data Retention = 2.0 _ _ _ _ Vv IccDR Data Retention Current MIL. _ 0.5 1.5 200 300 pA CS > Vue COM'L. 0.5 15 20 30 tcpR') Data Deselect to Data Vin = VHC or < VLC 0 _ _ _ ns Retention Time tR) Operation Recovery Time trc) _ _ _ _ ns (ut Input Leakage Current _ _ _ 2 2 HA NOTES: 3089 tbl 10 1. Ta=+ 25C 2. tac = Read Cycle Time. 3. This parameter is guaranteed by device characterization, but is not production tested. 5.1 4 Me 4825771 0023753 155IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES LOW Vcc DATA RETENTION WAVEFORM DATA RETENTION MODE Vcc _ 45y Vor2 2V 77 45V tcDR | as 7 VoR a 7 LL1L2>5 VIH VIH 3089 drw 03 AC TEST CONDITIONS Input Pulse Levels GND to 3.0V Input Rise/Fall Times Sns Input Timing Reference Levels 1.5V Output Reference Levels 1.5V AC Test Load See Figures 1 and 2 3089 tbl 11 5V 5V 4800 480Q DATA out DATAouT 255 30pF* 2550 5pF* 3089 drw 04 3089 drw 05 Figure 1. AC Test Load Figure 2. AC Test Load (for totz, tcLz, tonz, twuz, tcnz & tow) Including scope and jig. 5.1 5 MH 482577) 0023754 O55 am EEE SAS SSSSA'SS dACrz 9gIDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES AC ELECTRICAL CHARACTERISTICS (Vcc = 5V + 10%, All Temperature Ranges) 6116SA15) 6116SA20 6116SA25 6116SA35 6116LA15() 6116LA20 6116LA25 6116LA35 Symbol| Parameter Min. | Max. Min. | Max. Min. | Max. Min. Max. | Unit READ CYCLE tRC Read Cycle Time 15 _ 20 25 _ 35 _ ns taa Address Access Time 15 _ 19 _ 25 _ 35 ns {acs Chip Select Access Time _ 15 _ 20 = 25 _ 35 ns tcLz) | Chip Setect to Output in 5 _ 5 _ 5 5 _ ns Low-Z tOE Output Enable to Output | = 10 10 = 13 _ 20 ns Valid toLz) | Output Enable to Output 0 0 - 5 _ 5 ns in Low-Z tcHz) | Chip Deselect to Output _ 10 11 12 15 ns in High-Z toHz) | Output Disable to Output}; = 8 _ 8 _ 10 13 ns in High-Z tOH Output Hold from 5 _ 5 _ 5 _ 5 _ ns Address Change tpu Chip Select to Power-Up 0 _ 0 _ 0 _ 0 _ ns Time tpo) Chip Deselect to Power- _ 15 _ 20 _ 25 _ 35 ns Down Time 3089 thi 12 AC ELECTRICAL CHARACTERISTICS (Vcc = SV + 10%, All Temperature Ranges) (Continued) 61168A45 | 6116SA55@ | 6116SA702)| 6116SA90 | 6116SA120)| 61 16SA150@) 6I16LA45 | 6116LA55 | 6116LA70@| 6116LA90) 6116LA120@| 6116LA150 Symbol Parameter Min. Max. | Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Unit READ CYCLE {RC Read Cycle Time 45 _ 55 _ 70 90 | 120 _ 150 ns tAA Address Access Time _ 45 _ 55 _ 70 90 - 420 _- 150 } ns tacs Chip Select Access Time} 45 _ 50 _ 65 _ 90 }) 120 - 150 | ns tce.z) | Chip Select to Output in | 5 _ 5 _ 5 = 5 | 5 5 | ns Low-Z {OE Output Enable to Output}; 25 _ 40 _ 50 _ 60 | 80 _ 100} ns Valid to.z | Output Enable to Output] 5 | 5 |]5 ])]-] 5 |5 | 5 | ns in Low-Z tcuz) | Chip Deselect to Output | | 20 | 30 | | 35 | 40 | 40 | 40 | ns in High-Z tonz) | Output Disable to Output) | 15 | 30 | | 34 40 | 40 } 40 | ns in High-Z tOH Output Hold from 5 _ 5 _ 5 _ 5 5 _ 5 ns Address Change NOTES: 3089 tbl 13 1. 0C to + 70C temperature range only. 2. -55C to + 125C temperature range only. 3, This parameter guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested. 5A 6 M@ 4825771 0023755 TelIDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT} MILITARY AND COMMERCIAL TEMPERATURE RANGES TIMING WAVEFORM OF READ CYCLE No, 1(1:3) tRC ADDRESS aK DATA out Iec Voc Supply Currents Isp 3089 drw 06 TIMING WAVEFORM OF READ CYCLE NO. 2 (12:4) tRC | ADDRESS tOH DATA out PREVIOUS DATA VALID 3089 drw 07 TIMING WAVEFORM OF READ CYCLE NO. 3 (1:34) FOSSA ALLL tacs | 6) ta tcnz DATA out DATA VALID 3089 drw 08 NOTEs: 1. WE is HIGH for Read cycle. . Device is continously selected, GS is LOW. . Address valid prior to or coincident with CS transition LOW. . OE is Low. . Transition is measured +500mV trom steady state. aohon 51 7 MH 4825771 0023756 Ibo me NN __<_$<$<_<_$_$<_$_&_$&__ OE eeiDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES AC ELECTRICAL CHARACTERISTICS (Vcc = 5V + 10%, All Temperature Ranges) 6116SA15 6116SA20 6116SA25 6116SA35 6116LA15( 6116LA20 6116LA25 6116LA35 Symbol Parameter Min. | Max. Min. | Max. Min. | Max. Min. Max. | Unit WRITE CYCLE two Write Cycle Time 15 20 _- 25 _ 35 _ ns tcw Chip Select to End-of- 13 15 _ 17 _ 25 _ ns Write taw Address Valid to End- 14 _ 15 _ 17 _ 25 _ ns of-Write AS Address Set-up Time 0 - 0 _ 0 - 0 _ ns twp Write Pulse Width 12 _ 12 _ 15 _ 20 _ ns twR Write Recovery Time 0 - 0 _ 0 _ 0 - ns twuz) 1 Write to Output 7 _ 8 16 _ 20 ns in High-Z tow Data to Write Time 12 _ 12 _ 13 15 _ ns Overlap toH@) | Data Hold from Write 0 _ 0 _ ) _ 0 _ ns Time tow4)! Output Active from 0 _ 0 _ 0 0 _ ns End-of-Write 3089 thi 14 AC ELECTRICAL CHARACTERISTICS (Vcc = 5V + 10%, All Temperature Ranges) 6116SA45 | 6116SA55) | 61 16SA70@) | 6116SA90@) | 6116SA120@ | 6116SA1 500) 611GLA45 | 6116LA55@ | 6116LA70@ 6116LA902 | 6116LA120@ | 6116LA1 50?) Symbol Parameter Min. | Max.| Min. 1 Max.| Min.| Max. | Min. | Max.| Min. 1 Max. | Min. | Max. | Unit WRITE CYCLE two Write Cycle Time 45 =_ 55 _ 70 _ 90 _ 120 _ 150 _ ns tow Chip Select to End of 30 _ 40 _ 40 _ 55 _ 70 _ 90 _ ns Write taw Address Valid to End 30 _ 45 _ 65 _ 80 _ 105 _ 120 ns of Write tAS Address Set-up Time 0 _ 5 _ 15 _ 16 _ 20 _ 20 _ ns twP Write Pulse Width 25 _ 40 _ 40 _ 55 _ 70 _ 90 _- ns twR Write Recovery Time 0 - 5 _ 5 _ 5 = 5 _ 10 ns twuz!) | Write to Output 25 _ 30 | 35 40 _ 40 _ 40 | ns in High-Z {pw Data to Write Time 20 _ 25 _ 30 _ 30 _ 35 40 _ ns Overlap tox | Data Hold from Write 0 _ 5 - 5 5 _ 5 = 10 |ns Time tow)] Output Active from 0 _ 0 _ 0 0 _ 0 0) |ns End of Write NOTES: 3089 tb! 15 4. 0C to +70C temperature range only. ~55C to +125C temperature range only. 2. 3. This parameter guaranteed with AC Load (Figure 2) by device characteri 4. The specitication for tox must be met by the device supplying write data tot over voltage and temperature, the actual toH will always be smaller than the actual tow. zation, but is not production tested. he RAM under all operation conditions. Although tbH and tow values will vary 54 MB 4825771 0023757 674IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES TIMING WAVEFORM OF WRITE CYCLE NO. 1, (WE CONTROLLED TIMING) (1: 2.5; 7) ADDRESS OK ~ 5 taw | cs Sk ZEAL a ne 3 i tas twel Le tw be toyz (6) tof i I tyyy'5) toe (4) 4 PREVIOUS DATA VALID DATA ) VALID ~~ tow ion DATA IN DATA VALID 3089 drw 09 TIMING WAVEFORM OF WRITE CYCLE NO. 2, (CS CONTROLLED TIMING) 1 2.3.5. 7) two ADDRESS DATA tw DATA VALID 3089 drw 10 NOTES: . WE or CS must be HIGH during all address transitions. - Awrite occurs during the overlap of a LOW CS and a LOW WE. tWA is measured from the earlier of CS or WE going HIGH to the end of the write cycle. . During this period, the /O pins are in the output state and the input signals must not be applied. . Ifthe CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high-impedance state. . Transition is measured +500mV from steady state. . OEis continuously HIGH. If OE is Low during a WE controlled write cycle, the write pulse width must be the larger of twe or (twHz + tow) to allow the VO drivers to turn off and data to be placed on the bus for the required tow. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the write pulse is the specified twe. For a CS controlled write cycle, OE may be LOW with no degradation to tow. NOORONM a 51 Me 4825771 0029758 730 EEE EEIIIEEES'S'SY~CCSC eeIDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION 1DT 6116 XX XXX Xx X Device Type Power Speed Package Process/ Temperature Range Blank Commercial (0C to +70C) B Military (-55C to + 125C) Compliant to MIL-STD-883, Class B TP 300 mil Plastic DIP (P24-1) P 600 mil Plastic DIP (P24-2) TD 300 mil CERDIP (024-1) D 600 mil CERDIP (D24-2) SO 300 mil Small Outline IC, Gull-Wing Bend (S024-2) Y 300 mil SOJ, J-Bend (SO24-4) 15 Commercial Only 20 25 35 45 : 55 Military Only Speed in nanoseconds 70 ~= Military Only 90 ~ Military Only 120 Military Only 150 Military Only |SA Standard Power |LA Low Power 3089 drw 14 5. 10 W@ 4825771 0023759 b7?