AUIRFR8403 AUIRFU8403 AUTOMOTIVE GRADE Features Advanced Process Technology New Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * HEXFET(R) Power MOSFET VDSS RDS(on) typ. max. ID (Silicon Limited) ID (Package Limited) Description Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and wide variety of other applications. Applications Electric Power Steering (EPS) Battery Switch Start/Stop Micro Hybrid Heavy Loads DC-DC Converter Base part number Package Type AUIRFU8403 I-Pak AUIRFR8403 D-Pak 40V 2.4m 3.1m 127A 100A G S G S D I-Pak AUIRFU8403 D-Pak AUIRFR8403 G Gate Standard Pack Form Tube Tube Tape and Reel Left D D D Drain S Source Orderable Part Number Quantity 75 75 3000 AUIRFU8403 AUIRFR8403 AUIRFR8403TRL Absolute Maximum Ratings Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25C, unless otherwise specified. Symbol ID @ TC = 25C ID @ TC = 100C Parameter Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Package Limited) IDM PD @TC = 25C Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor VGS Gate-to-Source Voltage TJ TSTG Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Avalanche Characteristics Single Pulse Avalanche Energy (Thermally Limited) EAS EAS (tested) Single Pulse Avalanche Energy (Tested Limited) Avalanche Current IAR EAR Repetitive Avalanche Energy Thermal Resistance Symbol RJC RJA RJA Parameter Junction-to-Case Junction-to-Ambient ( PCB Mount) Junction-to-Ambient Max. 127 90 Units A 100 520 99 0.66 W W/C 20 V -55 to + 175 C 300 114 148 See Fig. 14, 15, 24a, 24b Typ. --- --- --- Max. 1.52 50 110 mJ A mJ Units C/W HEXFET(R) is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2017-10-03 AUIRFR/U8403 Static @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage IDSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance IGSS RG Min. 40 --- --- 2.2 --- --- --- --- --- Typ. Max. Units Conditions --- --- V VGS = 0V, ID = 250A 0.03 --- V/C Reference to 25C, ID = 5mA 2.4 3.1 m VGS = 10V, ID = 76A 3.0 3.9 V VDS = VGS, ID = 100A --- 1.0 VDS = 40V, VGS = 0V A --- 150 VDS = 40V,VGS = 0V,TJ =125C --- 100 VGS = 20V nA --- -100 VGS = -20V 1.5 --- Dynamic Electrical Characteristics @ TJ = 25C (unless otherwise specified) gfs Forward Trans conductance Qg Total Gate Charge Qgs Gate-to-Source Charge Qgd Gate-to-Drain Charge Qsync Total Gate Charge Sync. (Qg - Qgd) td(on) Turn-On Delay Time Rise Time tr td(off) Turn-Off Delay Time Fall Time tf Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Coss eff. (ER) Effective Output Capacitance (Energy Related) Coss eff. (TR) Effective Output Capacitance (Time Related) Diode Characteristics Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage dv/dt Peak Diode Recovery dv/dt trr Reverse Recovery Time Qrr Reverse Recovery Charge IRRM Reverse Recovery Current --- 66 18 22 44 10 32 31 23 3171 477 331 573 681 Min. Typ. Max. Units --- --- --- --- --- --- --- --- --- --- 99 --- --- --- --- --- --- --- --- --- --- --- --- VDS = 10V, ID = 76A ID = 76A VDS = 20V nC VGS = 10V 283 --- --- --- --- --- --- --- --- --- --- --- --- --- S VDD = 26V ID = 76A ns RG = 2.7 VGS = 10V VGS = 0V VDS = 25V pF = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 0V to 32V VGS = 0V, VDS = 0V to 32V Conditions MOSFET symbol --- 127 showing the A integral reverse --- 520 p-n junction diode. 0.9 1.3 V TJ = 25C,IS = 76A,VGS = 0V 5.1 --- V/ns TJ = 175C,IS = 76A,VDS = 40V 25 --- TJ = 25C VR = 34V, ns 26 --- TJ = 125C IF = 76A 20 --- TJ = 25C di/dt = 100A/s nC 21 --- TJ = 125C 1.2 --- A TJ = 25C Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 100A by source bonding technology. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140) Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11) Limited by TJmax , starting TJ = 25C, L = 0.039mH, RG = 50, IAS = 76A, VGS =10V. Part not recommended for use above this value. ISD 76A, di/dt 1255A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 Ris measured at TJ approximately 90C. Pulse drain current is limited by source bonding technology. 2 2017-10-03 AUIRFR/U8403 1000 1000 100 BOTTOM 10 1 4.3V 60s PULSE WIDTH 100 BOTTOM 10 4.3V 60s PULSE WIDTH Tj = 25C Tj = 175C 0.1 1 0.1 1 10 100 0.1 V DS, Drain-to-Source Voltage (V) 100 2.0 R DS(on) , Drain-to-Source On Resistance (Normalized) T J = 175C 100 T J = 25C 10 1 VDS = 10V 60s PULSE WIDTH 0.1 ID = 76A VGS = 10V 1.6 1.2 0.8 0.4 2 3 4 5 6 7 8 -60 -20 VGS, Gate-to-Source Voltage (V) = C gd Coss = Cds + Cgd 10000 Ciss C oss 1000 100 140 180 14.0 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss 60 Fig. 4 Normalized On-Resistance vs. Temperature Fig. 3 Typical Transfer Characteristics 100000 20 T J , Junction Temperature (C) VGS, Gate-to-Source Voltage (V) C, Capacitance (pF) 10 Fig. 2 Typical Output Characteristics 1000 ID, Drain-to-Source Current (A) 1 V DS, Drain-to-Source Voltage (V) Fig. 1 Typical Output Characteristics C rss 100 ID = 76A 12.0 VDS = 32V VDS = 20V 10.0 8.0 6.0 4.0 2.0 0.0 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 3 VGS 15V 10V 7.0V 6.0V 5.5V 5.0V 4.5V 4.3V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 7.0V 6.0V 5.5V 5.0V 4.5V 4.3V 0 10 20 30 40 50 60 70 80 90 QG, Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 2017-10-03 AUIRFR/U8403 10000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 T J = 175C 100 T J = 25C 10 1 OPERATION IN THIS AREA LIMITED BY R (on) DS 1000 100sec 100 1msec 10 10msec 1 DC Tc = 25C Tj = 175C Single Pulse 0.1 VGS = 0V 0.01 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.1 1.6 VSD , Source-to-Drain Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage Limited By Package ID, Drain Current (A) 100 80 60 40 20 0 25 50 75 100 125 150 175 Fig. 9 Maximum Drain Current vs. Case Temperature Id = 5.0mA 49 48 47 46 45 44 43 42 41 40 -60 -20 20 60 100 140 180 T J , Temperature ( C ) Fig 10. Drain-to-Source Breakdown Voltage 500 EAS , Single Pulse Avalanche Energy (mJ) 0.5 0.4 0.4 0.3 Energy (J) 100 50 TC , Case Temperature (C) 0.3 0.2 0.2 0.1 0.1 ID 13A 24A BOTTOM 76A TOP 400 300 200 100 0 0.0 -5 0 5 10 15 20 25 30 35 40 45 VDS, Drain-to-Source Voltage (V) Fig. 11 Typical COSS Stored Energy 4 10 Fig 8. Maximum Safe Operating Area V(BR)DSS , Drain-to-Source Breakdown Voltage (V) 140 120 1 VDS , Drain-to-Source Voltage (V) 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) Fig 12. Maximum Avalanche Energy vs. Drain Current 2017-10-03 AUIRFR/U8403 Thermal Response ( Z thJC ) C/W 10 1 D = 0.50 0.20 0.10 0.05 0.1 0.02 0.01 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 1E-005 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Avalanche Current (A) Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse) 100 0.01 10 0.05 0.10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current Vs. Pulse width EAR , Avalanche Energy (mJ) 120 TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 76A 100 80 60 40 20 0 25 50 75 100 125 150 175 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.infineon.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 24a, 24b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 13, 14). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) Starting T J , Junction Temperature (C) Fig 15. Maximum Avalanche Energy Vs. Temperature 5 PD (ave) = 1/2 ( 1.3*BV*Iav) = T/ ZthJC Iav = 2T/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav 2017-10-03 4.5 ID = 76A VGS(th) , Gate threshold Voltage (V) RDS(on), Drain-to -Source On Resistance (m ) AUIRFR/U8403 8.0 6.0 T J = 125C 4.0 2.0 T J = 25C 0.0 4 6 8 10 12 14 16 18 4.0 3.5 3.0 2.5 ID = 100A ID = 250A ID = 1.0mA ID = 1.0A 2.0 1.5 1.0 20 -75 -25 VGS, Gate -to -Source Voltage (V) 125 175 225 90 6 4 TJ = 25C TJ = 125C IF = 51A V R = 34V 80 TJ = 25C TJ = 125C 70 QRR (nC) 5 IF = 51A V R = 34V 3 2 60 50 40 30 20 1 10 0 0 200 400 600 800 0 1000 200 400 600 800 1000 diF /dt (A/s) diF /dt (A/s) Fig. 19 - Typical Stored Charge vs. dif/dt Fig. 18 - Typical Recovery Current vs. dif/dt 80 6 5 IF = 76A V R = 34V 4 TJ = 25C TJ = 125C IF = 76A V R = 34V TJ = 25C TJ = 125C 60 QRR (nC) IRRM (A) 75 Fig. 17 - Threshold Voltage vs. Temperature Fig 16. On-Resistance vs. Gate Voltage IRRM (A) 25 T J , Temperature ( C ) 3 2 40 20 1 0 0 0 200 400 600 800 diF /dt (A/s) Fig. 20 - Typical Recovery Current vs. dif/dt 6 1000 0 200 400 600 800 1000 diF /dt (A/s) Fig. 21 - Typical Stored Charge vs. dif/dt 2017-10-03 R DS(on), Drain-to -Source On Resistance ( m) AUIRFR/U8403 10.0 VGS = VGS = VGS = VGS = VGS = 8.0 5.5V 6.0V 7.0V 8.0V 10V 6.0 4.0 2.0 0.0 0 100 200 300 400 500 ID, Drain Current (A) Fig 22. Typical On-Resistance vs. Drain Current 7 2017-10-03 AUIRFR/U8403 Fig 23. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs V(BR)DSS 15V L VDS tp DRIVER D.U.T RG IAS 20V tp + V - DD 0.01 Fig 24a. Unclamped Inductive Test Circuit Fig 25a. Switching Time Test Circuit A I AS Fig 24b. Unclamped Inductive Waveforms Fig 25b. Switching Time Waveforms Id Vds Vgs Vgs(th) Qgs1 Qgs2 Fig 26a. Gate Charge Test Circuit 8 Qgd Qgodr Fig 26b. Gate Charge Waveform 2017-10-03 AUIRFR/U8403 D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches)) D-Pak (TO-252AA) Part Marking Information Part Number AUIRFR8403 YWWA IR Logo XX Date Code Y= Year WW= Work Week XX Lot Code 9 2017-10-03 AUIRFR/U8403 I-Pak (TO-251AA) Package Outline (Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information Part Number AUIRFU8403 YWWA IR Logo XX Date Code Y= Year WW= Work Week XX Lot Code 10 2017-10-03 AUIRFR/U8403 D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION TRL 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. 11 2017-10-03 AUIRFR/U8403 Qualification Information Qualification Level Moisture Sensitivity Level Machine Model Human Body Model ESD Charged Device Model RoHS Compliant Automotive (per AEC-Q101) Comments: This part number(s) passed Automotive qualification. Infineon's Industrial and Consumer qualification level is granted by extension of the higher Automotive level. D-Pak MSL1 I-Pak Class M2 (+/- 200V) AEC-Q101-002 Class H1C (+/- 2000V) AEC-Q101-001 Class C5 (+/- 2000V) AEC-Q101-005 Yes Highest passing voltage. Revision History Date Comments 10/12/2015 Updated datasheet with corporate template Corrected ordering table on page 1. 10/03/2017 Corrected typo error on part marking on page 9 and 10. Published by Infineon Technologies AG 81726 Munchen, Germany (c) Infineon Technologies AG 2015 All Rights Reserved. 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