Eice DR IV ER TM High voltage gate driver IC with reinforced isolation 1E DS -S R C f a mil y Real-time adjustable gate current control IC 1EDS20I12SV 1EDU20I12SV 1EDI20I12SV EiceDRIVERTM Final dat a sheet <Revision 2.1>, 22.10.2018 Indust rial Po wer C o ntrol Edition 22.10.2018 Published by Infineon Technologies AG 81726 Munich, Germany (c) 2018 Infineon Technologies AG All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie") . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 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EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC Revision History Page or Item Subjects (major changes since previous revision) <Revision 2.1>, 22.10.2018 all Changed document status for final datasheet Trademarks of Infineon Technologies AG AURIXTM, BlueMoonTM, C166TM, CanPAKTM, CIPOSTM, CIPURSETM, COMNEONTM, EconoPACKTM, CoolMOSTM, CoolSETTM, CORECONTROLTM, CROSSAVETM, DAVETM, EasyPIMTM, EconoBRIDGETM, EconoDUALTM, EconoPIMTM, EiceDRIVERTM, eupecTM, FCOSTM, HITFETTM, HybridPACKTM, IRFTM, ISOFACETM, IsoPACKTM, MIPAQTM, ModSTACKTM, my-dTM, NovalithICTM, OmniTuneTM, OptiMOSTM, ORIGATM, PRIMARIONTM, PrimePACKTM, PrimeSTACKTM, PRO-SILTM, PROFETTM, RASICTM, ReverSaveTM, SatRICTM, SIEGETTM, SINDRIONTM, SIPMOSTM, SMARTiTM, SmartLEWISTM, SOLID FLASHTM, TEMPFETTM, thinQ!TM, TRENCHSTOPTM, TriCoreTM, X-GOLDTM, X-PMUTM, XMMTM, XPOSYSTM. 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MIPSTM of MIPS Technologies, Inc., USA. muRataTM of MURATA MANUFACTURING CO., MICROWAVE OFFICETM (MWO) of Applied Wave Research Inc., OmniVisionTM of OmniVision Technologies, Inc. OpenwaveTM Openwave Systems Inc. RED HATTM Red Hat, Inc. RFMDTM RF Micro Devices, Inc. SIRIUSTM of Sirius Satellite Radio Inc. SOLARISTM of Sun Microsystems, Inc. SPANSIONTM of Spansion LLC Ltd. SymbianTM of Symbian Software Limited. TAIYO YUDENTM of Taiyo Yuden Co. TEAKLITETM of CEVA, Inc. TEKTRONIXTM of Tektronix Inc. TOKOTM of TOKO KABUSHIKI KAISHA TA. UNIXTM of X/Open Company Limited. VERILOGTM, PALLADIUMTM of Cadence Design Systems, Inc. VLYNQTM of Texas Instruments Incorporated. VXWORKSTM, WIND RIVERTM of WIND RIVER SYSTEMS, INC. ZETEXTM of Diodes Zetex Limited. Last Trademarks Update 2010-10-26 Final datasheet 3 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC Table of Contents 1 Block diagram..................................................................................................................................... 7 2 2.1 2.2 Pin configuration, description, and functionality ........................................................................... 8 Terminal configuration .......................................................................................................................... 8 Terminal functionality ........................................................................................................................... 9 3 3.1 3.2 3.2.1 3.2.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.9.1 3.9.2 3.9.3 3.9.4 3.9.5 3.9.6 3.9.7 3.9.8 3.9.9 3.9.10 Functional description ..................................................................................................................... 13 Introduction ......................................................................................................................................... 13 IC Supply ............................................................................................................................................ 13 Input side ............................................................................................................................................ 14 Output side ......................................................................................................................................... 14 Non-inverting and inverting input terminals INP and INN .................................................................. 14 Driver output terminal ON .................................................................................................................. 14 SPEED setting.................................................................................................................................... 15 Preboost setting ................................................................................................................................. 16 Gate turn-off terminal OFF ................................................................................................................. 16 Terminal EN ....................................................................................................................................... 17 Protection and diagnosis features ...................................................................................................... 17 Undervoltage lockout (UVLO) ............................................................................................................ 17 Ready and status output terminals..................................................................................................... 17 Fault indication (terminal /FLT) .......................................................................................................... 18 Watchdog ........................................................................................................................................... 18 I/O signature check ............................................................................................................................ 18 Two-level turn-off (TLTO) ................................................................................................................... 19 Desaturation shut down protection..................................................................................................... 19 IGBT overcurrent detection ................................................................................................................ 19 Overcurrent protection ON/OFF ......................................................................................................... 20 Soft turn-off......................................................................................................................................... 20 4 4.1 4.2 4.3 4.3.1 4.3.2 4.3.3 4.3.4 4.3.5 4.3.6 4.3.7 Electrical parameters ....................................................................................................................... 21 Absolute maximum ratings ................................................................................................................. 21 Operating range ................................................................................................................................. 22 Electrical characteristics ..................................................................................................................... 23 Voltage supply .................................................................................................................................... 23 Logic input and output ........................................................................................................................ 24 Gate driver .......................................................................................................................................... 24 Desaturation protection ...................................................................................................................... 26 Overcurrent protection disable ........................................................................................................... 26 Current sense ..................................................................................................................................... 26 Two-level turn-off................................................................................................................................ 27 5 5.1 5.2 Insulation characteristics ................................................................................................................ 28 Reinforced insulation requirements according to VDE 0884-10 (Certificate 40043864, 1EDS20I12SV only) ........................................................................................................................... 28 Recognized under UL 1577 (File E311313, 1EDS20I12SV and 1EDU20I12SV only) ..................... 28 6 Timing diagrams............................................................................................................................... 29 7 7.1 Package ............................................................................................................................................. 32 PG-DSO-36-64 ................................................................................................................................... 32 Final datasheet 4 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC List of Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Block diagram for the 1EDS-SRC family ............................................................................................. 7 Terminal configuration of the 1EDS-SRC family (Top View) ............................................................... 8 Typical application .............................................................................................................................. 13 Timing diagram for turn-on ................................................................................................................. 15 External circuit for setting of preboost current (left: unipolar supply; right: bipolar supply) ............... 16 I/O signature check ............................................................................................................................ 18 Timing of turn-on and turn-off propagation delay without two-level turn-off mode ............................ 29 Timing of EN turn-on and shut down propagation delay .................................................................... 29 Timing of short pulse suppression terminal INP and SIGI (TP < TFILIN) .............................................. 29 Timing of short pulse suppression terminal INN (TP < TFILIN) ............................................................. 29 Timing of short pulse suppression terminal EN (TP < TFILIN) .............................................................. 30 Timing for fault reset at terminal EN................................................................................................... 30 Timing of CS events incl. terminals SOFF, /FLT and EN................................................................... 30 Timing for DESAT events incl. terminals SOFF, /FLT and EN (timing is same for related INN input signal) ................................................................................................................................................. 31 Timing for two-level turn-off incl. terminals CZ and OFF (top: TTLSET < TTLLIM, bottom: TTLSET > TTLLIM)31 Package drawing ................................................................................................................................ 32 PCB reference layout (left: top layer, right: bottom layer) .................................................................. 33 List of Tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Table 12 Table 13 Table 14 Table 15 Table 16 Terminal Description ............................................................................................................................ 8 Switching speed levels on input and output side ............................................................................... 16 Driver IC status for EN, INP, and INN ................................................................................................ 17 Driver IC status UVLO at VCC1, VCC2 and PADP (EN = high) ........................................................ 18 Abs. maximum ratings ........................................................................................................................ 21 Operating parameters ........................................................................................................................ 22 Voltage supply .................................................................................................................................... 23 Logic input and output ........................................................................................................................ 24 Gate driver .......................................................................................................................................... 24 Desaturation protection ...................................................................................................................... 26 Overcurrent protection disable ........................................................................................................... 26 Current sense ..................................................................................................................................... 26 Two-level turn-off................................................................................................................................ 27 Insulation characteristics .................................................................................................................... 28 Reinforced isolation limits .................................................................................................................. 28 Recognized under UL 1577 ............................................................................................................... 28 Final datasheet 5 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC EiceDRIVERTM Real-time adjustable gate current control IC Main features 1EDS20I12SV 1EDU20I12SV Overview 1EDI20I12SV PG-DSO36 Single-channel isolated IGBT Driver Supports IGBT up to 1200 V IGBT off-state: 2 A pull down to rail Overcurrent protection for sense IGBTs and conventional IGBTs Desaturation detection Soft turn-off shut down: 1 A pull down to rail Two-level turn-off Operation at high ambient temperature up to 105C Compatible PWM inputs for 3.3 V, 5 V, and 15 V logic voltages Product highlights Optimized short circuit control for 3-level inverters Online adjustable current source slew rate control during IGBT turn-on Reinforced isolation according VDE 0884-10 (VIORM = 1420 V, 1EDS20I12SV only) UL certification according UL1577 (VISO = 5 kV, 1EDS20I12SV and 1EDU20I12SV only) Potential applications AC and brushless DC motor drives High-voltage DC/DC converters UPS systems Welding Servo drives Description The 1EDS20I12SV is a single-channel IGBT driver in a PG-DSO-36-64 package with a reinforced galvanically isolated barrier according to VDE0884-10 and UL1577. The driver IC controls up to three external p-channel MOSFET as a controlled current source during turn-on. The IC is therefore able to control precisely the turn-on process in order to avoid excessive dvCE/dt or diC/dt transients. The IC has a peak sinking capability of 2 A for turning off the IGBT. An external PNP transistor can be used to support IGBT with currents ratings higher than 75 A. The 1EDU20I12SV offers the same set of function including a galvanically isolated barrier according to UL1577. The 1EDI20I12SV offers the same set of functions including the unique slew rate control with the exception that its isolation barrier offers functional isolation. All three devices together are the 1EDS-SRC family. The logic input pins of the 1EDS-SRC family are 3.3 V, 5 V, and 15 V CMOS-compatible. The data transfer across the galvanic isolation barrier is accomplished with the integrated coreless transformer technology. The 1EDS-SRC family provides several protection features such as IGBT desaturation shut down protection for IGBT, overcurrent protection for sense IGBT, soft turn-off shut down, and two-level turn-off. Final datasheet 6 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC Block diagram 1 VCC1 VCC2 UVLO / Bias UVLO / Bias /FLT CS DESAT / CS Detection circuits RDY2 DESAT Safety Logic OCOFF RDY1 MAIN LOGIC / CT Transceiver PADP PADP MAIN LOGIC / CT Transceiver INN PRB RSENSE ON ON INP PADN Input stage ON CT Isolated Transmission path (bidirectional) Control loop VCC2 GATE TLTO EN TLTO CZ Control loop PADN VZ PADN CZ VZ OFF SPEED PADN VEE2 VCC1 SIGI SOFF VCC1 Signature Logic SIGO VEE2 GND1 GND2 Input Side Figure 1 Output Side Block diagram for the 1EDS-SRC family Final datasheet 7 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 2 Pin configuration, description, and functionality 2.1 Terminal configuration VEE2 1 36 GND1 DESAT 2 35 PADN OFF 3 34 VCC1 OCOFF 4 33 PADP CS 5 32 INN GATE 6 31 INP SOFF 7 30 EN GND2 8 VEE2 9 29 SPEED 1EDS20I12SV 1EDI20I12SV RSENSE 10 27 /FLT VCC2 11 26 RDY1 ON 12 25 RDY2 NC 13 24 NC PRB 14 Figure 2 28 GND1 23 SIGI CZ 15 22 SIGO VZ 16 21 TST1 TST2 17 20 VEE2 18 19 GND1 NC Terminal configuration of the 1EDS-SRC family (Top View) Table 1 Terminal Description Terminal number 1 Terminal name VEE2 2 DESAT Desaturation shut down protection 3 OFF Gate turn-off 4 OCOFF Overcurrent protection on/off 5 CS Sense IGBT overcurrent 6 GATE Gate voltage sense 7 SOFF Gate soft turn-off 8 GND2 Signal ground, output side 9 VEE2 Negative power supply, output side 10 RSENSE Sense resistor input 11 VCC2 Positive power supply, output side Final datasheet Description Negative power supply, output side 8 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC Table 1 Terminal Description Terminal number Terminal name ON 12 Description Gate control for external p-channel MOSFET 13 NC Not connected, connection to GND2 recommended 14 PRB Preboost current adjustment 15 CZ Two-level turn-off time set 16 VZ Two-level turn-off voltage set 17 TST2 Reserved terminal, to be connected to VEE2 18 VEE2 Negative power supply, output side 19 GND1 Ground, input side 20 NC Not connected, connection to GND1 recommended 21 TST1 Reserved terminal, to be connected to GND1 22 SIGO Signature test output 23 SIGI Signature test input 24 NC Not connected, connection to GND1 recommended 25 RDY2 Ready signal, monitoring the output side 26 RDY1 Ready signal, monitoring the input side 27 /FLT Fault output 28 GND1 Ground, input side 29 SPEED Setting of IGBT gate current level (analog) 30 EN Enable, shutdown, and fault reset input 31 INP Non-inverting driver input 32 INN Inverting driver input 33 PADP Input side logic reference voltage 34 VCC1 Positive power supply, input side 35 PADN Input side logic reference ground 36 GND1 Ground, input side 2.2 Terminal functionality GND1 Logic ground terminal of the input side. PADN Input side logic reference ground. Direct connection to GND1 is required. VCC1 5 V power supply for the input side. The reference terminal for VCC1 is GND1. PADP 3.3 V, 5 V or 15 V input side logic reference voltage. The reference terminal for PADP is PADN. Final datasheet 9 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC INN inverting driver input INN control signal for the driver output while INP is set to high. The IGBT is turned on, if INN is set to low, and is turned off, if INN is set to high, respectively. A minimum pulse width is required to prevent from glitches while controlling the IGBT. An internal pull-up resistor ensures that the IGBT is kept in off-state, if terminal INN is left unconnected. The reference terminal for INN is PADN. INP non-inverting driver input INP control signal for the driver output while INN is set to low. The IGBT is turned on, if INP is set to high, and is turned off, if INP is set to low, respectively. A minimum pulse width is required to suppress glitches while controlling the IGBT. An internal pull-down resistor ensures that the IGBT is kept in off-state, if terminal INP is left unconnected. The reference terminal for INP is PADN. EN input Terminal EN needs to be set high for INP and INN to control the IGBT switching. The EN input terminal serves two purposes: Feature 1: Enable / shutdown of the output side. The IGBT is turned off by a soft turn-off, if terminal EN is set to low. A minimum pulse width is defined to help suppress glitches on terminal EN. The IGBT is switched on without preboost on the rising edge of terminal EN, if terminal INP is set high and terminal INN is set low before activating EN. Feature 2: Resets the desaturation or overcurrent condition signaled on terminal /FLT, if terminal EN is set to low for more than 870 ns. A reset of signal /FLT is asserted at the rising edge of terminal EN. The reference terminal for EN is PADN. SPEED IGBT on-state gate current setting sent from input side. This is an analog input terminal. The reference voltage of the internal ADC is PADP.The reference terminal for SPEED is PADN. /FLT fault output Open-drain output terminal to signal desaturation of conventional IGBTs or overcurrent of sense IGBTs. Terminal /FLT is set low, if desaturation or overcurrent occurs. The /FLT terminal has to be connected via a pullup resistor to PADP. The reference terminal for /FLT is GND1. RDY1 ready status Open-drain output to signal the proper operation of the input side. RDY1 is set to high if the input side terminals VCC1 and PADP are above their respective undervoltage thresholds. The RDY1 terminal should be connected a via pull-up resistor to PADP. The reference ground terminal for RDY1 is GND1. RDY2 ready status Open-drain output to signal the proper operation of the output side. RDY2 is set to high, if the output side supply is above the UVLO2 level and the internal chip data transmission is operating properly. The RDY2 terminal should be connected via a pull-up resistor to PADP. The reference ground terminal for RDY2 is GND1. SIGI I/O signature check input terminal. The reference terminal for SIGI is GND1. Final datasheet 10 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC SIGO I/O signature check output terminal The reference terminal for SIGO is GND1. TST1 Terminal TST1 is a reserved terminal and has to be connected to GND1. TST2 TST2 is a reserved terminal and has to be connected to VEE2. VEE2 Negative power supply terminal for the output side: All VEE2 terminals must be connected to GND2, if no separate negative supply voltage is used. DESAT Monitoring of the IGBT saturation voltage VCE(sat) to detect desaturation caused by a short: The IGBT is shut down by activating soft turn-off, if the voltage at this pin is above a given threshold. Two additional filters provide a large robustness against noise and coupling effects. One of these filters is adjustable in terms of the filter time. The reference terminal for DESAT is GND2. OFF Gate turn-off terminal in normal operation mode The reference terminal for OFF is VEE2. OCOFF Input terminal to inhibit the automatic turn-off of the IGBT in case of a desaturation or current sense failure. The fault status continues to be signaled on terminal /FLT. This feature is deactivated by an internal pull-down resistor to GND2, if the terminal is left open. The reference terminal for OCOFF is GND2 CS Current sense comparator input terminal for sense IGBTs or standard IGBTs with external emitter shunts. The reference terminal for CS is GND2. This feature is deactivated, if terminal CS is connected to GND2. GATE Input terminal for sensing the gate voltage at resistor ROFF, for example according to Figure 3. The reference terminal for GATE is GND2. PRB The preboost current is adjusted by means of a voltage divider between GND2 and VEE2 for a bipolar supply. The voltage divider is connected to VCC2 and VEE2 for unipolar supply. The reference terminal for PRB is VEE2. SOFF Output terminal for IGBT soft turn-off in case of short circuit or overcurrent events The reference terminal for SOFF is VEE2. GND2 Reference ground terminal of the output side. Final datasheet 11 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC RSENSE Current sense feedback input of the turn-on gate current control loop. The reference terminal for RSENSE is VCC2. VCC2 Positive power supply terminal of the output side. ON Terminal for the connection to the gate terminal of an external p-channel MOSFET, such as OptiMOSTM BSD314SPE. This transistor is used to control the IGBT turn-on gate current. The reference terminal for ON is VCC2. CZ This terminal sets the two-level turn-off timing via an external capacitor against VEE2. A short between terminals CZ and VEE2 deactivates the two-level turn-off. The reference terminal for CZ is VEE2. VZ Voltage adjustment terminal for the two-level turn-off feature: This terminal can be connected to VEE2 via a resistor of 27 k (VTLTO = 9.3 V), shorted against VEE2 (VTLTO = 11.4 V), or left floating (VTLTO = 10.3 V). The reference terminal for VZ is VEE2. Final datasheet 12 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 3 Functional description 3.1 Introduction The 1EDS-SRC family is an advanced IGBT gate driver family with various control and protection features to allow the design of highly reliable systems. The integrated circuit consists of two galvanically isolated sides, called input side and output side. The input side is typically interfaced with a CMOS-compatible DSP or a microcontroller. The galvanically isolated output side is connected to the high voltage domain. The adjustable gate current source allows the tuning of the IGBT turn-on slew rate to control the EMI of power electronic systems. The turn-off process is accomplished with an internal MOSFET stage capable of driving 2 A. An internal MOSFET switch capable of driving 1 A could be connected to an external gate resistor with higher resistance to prevent from an overvoltage at the IGBT in case of a short circuit or an overcurrent shut down. The driver also includes IGBT desaturation protection for conventional IGBTs and overcurrent protection for sense IGBTs with the fault status signal at the input side. Two ready status output terminals indicate whether the driver is properly supplied and operates normally. A two-level turn-off feature with adjustable delay protects against excessive overvoltage at turn-off in case of an overcurrent or a short. The same delay is applied at turnon to prevent pulse width distortions. 5V 5V VCC2 VCC1 VCC2 RDESAT /FLT DESAT RDY2 CS RDY1 OCOFF DDESAT RS ON PADP CDESAT CD RSENSE C1 Control Unit RD T1 T2 INP GATE INN CZ EN RSOFF VZ PADN ROFF RF SPEED CF SIGI OFF SOFF PRB SIGO RPRB2 GND1 GND Figure 3 3.2 RPRB1 VCC2 VEE2 C3 C2 GND2 Typical application IC Supply There are three supply voltage domains available having individual undervoltage lockout levels. The IC is in a safe state during undervoltage lockout of any domain under all circumstances, meaning that the gate drive outputs are never activated before each part of the IC is ready to operate. Final datasheet 13 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 3.2.1 Input side The driver is supplied with 5 V between terminals VCC1 to GND1. This supply voltage manages the basic functions of the input side. The input side contains a second voltage domain for the logic input signals INP, INN, and EN. This special voltage domain is supplied by the terminals PADP and PADN and can range from 3.3V over 5V to 15V. It is mandatory to connect directly the terminals PADN and GND1. It is important to note, that the voltage domains VCC1 and PADP have independent undervoltage lockout levels and both domains must be supplied appropriately for operation. VCC1 can be shorted to GND1 in order to deactivate the driver. No turn-on signals will be transmitted from the input to the output side even if terminal VCC1 is left floating. Therefore, the IGBT won't be turned on. 3.2.2 Output side The EiceDRIVERTM 1EDS-SRC family is designed to support both bipolar and unipolar power supply configurations. The driver IC is typically supplied with a positive voltage of 15 V on terminal VCC2 and a negative voltage of -8 V on terminal VEE2, if configured for bipolar supply. The driver IC is typically supplied with a positive voltage of 15 V on terminal VCC2 for a unipolar supply configuration. VEE2 and GND2 have to be connected together as short as possible for unipolar supply. 3.3 Non-inverting and inverting input terminals INP and INN There are two input modes to control the IGBT. In non-inverting mode, terminal INP controls the driver output while terminal INN is set to low. In inverting mode, terminal INN controls the driver output while terminal INP is set to high. A low signal at terminal INN will activate the output ON. A minimum input pulse width is defined to suppress potential glitches. 3.4 Driver output terminal ON The output side contains an integrated feedback control for the IGBT gate current. The gate current control is completed by the external current sense resistor and a p-channel MOSFET. Several resistors and MOSFETs can be placed in parallel in order to limit the individual power dissipation. The recommended P-channel transistor is BSD314SPE (OptiMOSTM-P 3, 30 V, 140 m). The entire turn-on procedure of an IGBT is separated into three phases according to Figure 4: the preboost, the turn-on, and the VCC2 clamping phase. The preboost phase controls a high current to drive the gate of the IGBT. The gate voltage is increased from its starting point to a voltage lower than the gate-emitter threshold voltage of the IGBT, i.e. VGATE < VGE(th), within a period of typ. 135 ns. It is important that the IGBT is not turned on during the preboost phase. The value of the preboost current IPRB is proportional to the voltage VPRB at terminal PRB. The preboost current IPRB is defined as: = | 2 | 3 (1) The change from the preboost phase into the turn-on phase needs less than typically 25 ns. This time must be considered for the setting of the preboost current amplitude in order not to overcharge the gate during the preboost phase. The gate current during the turn-on phase can be selected out of 11 levels for the proper adjustment of the turnon transition. The fine granularity between levels 1 and 10 allows accurate slope control. It behaves similar as a traditional driver at level 11. The driver controls the voltage drop across the sense resistor RS. The corresponding gate current Igg is = (2) The selection of the gate current for the turn-on phase is accomplished with terminal SPEED on the input side. Terminal SPEED is an input terminal with voltage levels between 0 V and 3.3 V. The lowest voltage at terminal SPEED corresponds with the highest gate current level, e.g. by connecting SPEED to GND1. Final datasheet 14 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC VCC2 tracking vRS(t) RS RSENSE external turn-on ON igg(t) GATE Rg int vON(t) vGE(t) GND2 1EDS-SRC Phases: vRS igg preboost Preboost level turn-on current source VCC2 clamping preboost value = f(VEE2, RPRB1, RPRB2) Typ. 135 ns t Typ. 25 ns v vON VCC2 VMiller VON,ON VGE(th) vGE 0 t VEE2 t0 Figure 4 t3 t1 t2 Timing diagram for turn-on Finally, the IGBT gate voltage saturates at VCC2 in the VCC2 clamping phase. The driver clamps the gate voltage of the external P-channel transistor 6 V below VCC2 according to Figure 4. This provides a low-resistive connection between the gate of the IGBT and terminal VCC2 It is good board layout engineering to keep tightest proximity of the control loop consisting of driver IC, sense resistor, p-channel MOSFET, and the VCC2 / VEE2 blocking capacitors to avoid oscillations. 3.5 SPEED setting The 11 levels of gate current can be selected by applying an analog voltage VSPEED at terminal SPEED according to the table below. Final datasheet 15 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC Table 2 Switching speed levels on input and output side Voltage at terminal SPEED Typ. reference VRSENSE VVCC2-0.197 % of turn-on gate current amplitude 20% Level 1 3.3 V Level 2 2.91 V VVCC2-0.287 29% Level 3 2.63 V VVCC2-0.376 38% Level 4 2.35 V VVCC2-0.466 46% Level 5 2.08 V VVCC2-0.556 56% Level 6 1.80 V VVCC2-0.645 64% Level 7 1.52 V VVCC2-0.735 73% Level 8 1.25 V VVCC2-0.825 82% Level 9 0.97 V VVCC2-0.912 91% Level 10 0.69 V VVCC2-1.003 100% Level 11 0 VVCC2-1.543 154% 3.6 Preboost setting The preboost control is always active, both in bipolar or unipolar power supply configuration. The only exception is, if the IGBT is turned on via EN according to section 3.8 The preboost current may be set by a simple voltage divider for bipolar gate supply as well as for unipolar supply. In case of bipolar power supply, connect the voltage divider between GND2, PRB, and VEE2. In case of a unipolar power supply, use VCC2, PRB, and VEE2 according to Figure 5. VCC2 VCC2 RPRB1 PRB GND2 RPRB1 RPRB2 PRB GND2 1EDS-SRC Figure 5 RPRB2 VEE2 1EDS-SRC VEE2 External circuit for setting of preboost current (left: unipolar supply; right: bipolar supply) The selected preboost current amplitude should charge the IGBT gate from the negative voltage VEE2 to a value between 0 V and VGE(th) of the IGBT within 135 ns. The corresponding IGBT gate charge curves should be consulted for the various collector-emitter voltages VCE for best accuracy. 3.7 Gate turn-off terminal OFF The driver IC is able to sink a minimum gate current of 2 A peak. The closed loop controlled sink MOSFET establishes the two-level turn-off function according to section 3.9.6 by controlling the second level during the turn-off process for an adjustable time period TTLSET. An external turn-off boost transistor is recommended for larger sink current capability. Final datasheet 16 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 3.8 Terminal EN Terminal EN is used to enable the input side for normal operation. A soft turn-off is initiated, when the signal at terminal EN is logic low regardless of the status of signals at terminals INP and INN. The status of EN is dominant over all communications over the insulation barrier. If therefore a shutdown is initiated via terminal EN during normal operation and an overcurrent is detected simultaneously, the IGBT is turned off via soft turn-off. However, /FLT is not activated as the chip is already being reset. /FLT will be activated after IC enable, if the overcurrent still exists on the next IGBT turn-on command. Signals on terminal EN have also priority over INN and INP. The signals at terminal EN have to pass a noise filter. The EN signal is suppressed, if the pulse duration is shorter than the filter time and the driver reacts as described in Table 3. Table 3 Driver IC status for EN, INP, and INN EN INP INN Result high high high regular turn-off / soft off* high low low regular turn-off / soft off* high high low turn-on high high low turn-on high high low turn-on without preboost low high low Soft off * soft turn-off only in case of simultaneous CS / DESAT event A second function of the EN terminal is to reset the driver IC after an overcurrent event, which was triggered by the DESAT or CS function. The IC is reset by holding EN low. The fault indication at terminal /FLT follows on the next rising edge of signal EN 3.9 Protection and diagnosis features 3.9.1 Undervoltage lockout (UVLO) The device is equipped with a system of defined undervoltage lockout (UVLO) levels on both the input and output side to ensure proper operation of the IGBT. Any triggering of UVLO will turn-off the IGBT by means of the soft turn-off function. All signals at INP and INN are ignored until the voltage at terminals VCC1 recovers above VUVLOH1 at terminals VCC1 and VUVLOH3 at terminal PADP. The IGBT is switched off via terminal OFF in case of an UVLO event at pin VCC2. Signals from the input side are ignored until VCC2 recovers to the power-up level of VUVLOH2. The IC will perform an immediate turn-on after recovery of VCC2 according to Table 4. 3.9.2 Ready and status output terminals The ready signal RDY1 for the input side covers the following conditions: UVLO status of the input side supply voltage domains at terminals VCC1 and PADP Establishment of correct signal transmission from input side to output side across the insulation barrier The ready signal RDY2 for the output side indicates after a short delay: UVLO status of the output side supply voltage VCC2 Establishment of bidirectional signal transmission across the insulation barrier Both signals are monitoring signals only and need not to be reset actively. Final datasheet 17 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC Table 4 Driver IC status UVLO at VCC1, VCC2 and PADP (EN = high) VCC1 VCC2 PADP RDY1 RDY2 Result UVLO good good low X SOFF and 5s watchdog UVLO good good high high acc. INP / INN (turn-on with preboost) UVLO good UVLO low high OFF good UVLO good high low activate OFF and SOFF simultaneously good UVLO good high high acc. INP / INN (turn-on with preboost) UVLO UVLO good low high OFF X X UVLO low high SOFF and 5s watchdog good good UVLO high high acc. INP / INN (turn-on with preboost) 3.9.3 Fault indication (terminal /FLT) Terminal /FLT is the indicator for a triggered DESAT or CS event. It is pulled low by an internal FET. The /FLT function is reset by means of a low signal at terminal EN. 3.9.4 Watchdog The bidirectional signal transmission across the insulation barrier is monitored by watchdogs on the input and output side. These are the most important ones: The IGBT is switched off via terminal SOFF and additionally switched off via terminal OFF, if the transmission fails for a given duration. A watchdog activates the terminal OFF after typically 5 s in any case of a soft turn-off event. 3.9.5 I/O signature check The I/O signature check is a feature that allows the confirmation of switching commands sent by the microcontroller to the driver IC. The SIGO output terminal is an exclusive-or (XOR) combination of the terminals INN, INP, and EN according to Figure 6. The desaturation status on terminal DESAT and the correct voltage at terminal PADP are also monitored. EN INN VPADP VPADN A N D INP DESAT/CS* 1:FAIL 0:NO FAIL VPADP UVLO (<2,7V) 0:FAIL 1:NO FAIL VPADN SIGI AND AND X O R X O R GND1 SIGO Figure 6 I/O signature check Final datasheet 18 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC To save PCB space, the SIGI and SIGO terminals of a series of drivers can be interconnected via a daisy chain. In this case, terminal SIGI of the first driver in the daisy chain should be connected to VCC1 or GND1. Terminal SIGI of the next driver should be connected to terminal SIGO of the previous driver. Terminal SIGO of the last driver in the daisy chain should be connected to the microcontroller. The I/O signature check does not monitor the status of the IGBT. Monitored status INN / INP and EN DESAT PADP undervoltage The reference terminals are VCC1 and GND1. 3.9.6 Two-level turn-off (TLTO) The TLTO function is activated, if a capacitor is applied between terminal CZ and terminal VEE2. It affects any turn-on and turn-off process, which is either initiated by the input signals INP, INN or EN or by any protection function on the output side. Connecting terminal CZ with terminal VEE2 will deactivate the two-level turn-off function. The two-level turn-off introduces a second (lower) gate voltage level during the turn-off process according to Figure 15This additional level ensures lower collector-emitter voltage overshoots during turn-off. The second gate voltage level reduces the collector current of the IGBT when reaching this level. The obtained diC/dt is therefore slower and generates less induced overvoltage. The required timing, which can be adjusted by the capacitance value at terminal CZ, depends on stray inductance and overcurrent at the beginning of the two-level turn-off period. Three voltage levels are available: The voltage level is set to 11.4 V, if terminal VZ is connected to VEE2, the voltage level is set to 10.3 V, if terminal VZ is floating, the voltage level is set to 9.3 V, if terminal VZ is connected to VEE2 via a 27 k resistor The second voltage level is set in a way that turn-off losses are the same as during normal turn-off for nominal current values. The turn-on signal is delayed by the duration of the two-level turn-off in order to achieve identical pulse lengths. The duration of the plateau is set by the capacitor connected between terminals CZ and VEE2. The IC starts charging the capacitance on CZ for obtaining the two-level set time TTLSET, when a turn-on signal is given. The IC starts the turn-on sequence and resets the capacitor at terminal CZ as soon as the voltage at terminal CZ exceeds 2.5 V. The IC activates additionally a soft turn-off sequence, if a turn-off is initiated due to a desaturation condition on terminal DESAT. 3.9.7 Desaturation shut down protection Desaturation protection ensures the protection of the IGBT in case of a short. When the desaturation voltage on terminal DESAT rises and reaches 9 V, the output is driven low by soft turn-off and the /FLT output terminal is activated. The blanking time is determined by the combination of the highly precise internal current source and an external capacitor. Desaturation protection is only set active at TDESATleb = 400ns after the preboost phase. 3.9.8 IGBT overcurrent detection The IGBT overcurrent detection is a protection feature that senses the emitter current on current-sense IGBTs or standard IGBTs via using an emitter shunt resistor. The voltage is measured by a comparator that triggers at 0.35 V. The current sense signal at terminal CS is ignored while the IGBT is off. An external blanking circuit is necessary to prevent false tripping during turn-on. With non-sensing IGBT types, a low resistance shunt is used to sense the emitter current. When a short is detected, the IGBT is switched off by a soft turn-off. Both the desaturation and the current sense features can be used at the same time. This function is therefore not limited to current sensing. It can be used for any shut down condition as well. The fault status is signaled on terminal Final datasheet 19 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC /FLT. The fault status has to be reset via terminal EN. IGBT overcurrent detection is only active 400ns after the preboost phase. 3.9.9 Overcurrent protection ON/OFF The IGBT is switched off via a soft turn-off in case of a CS or DESAT event, if terminal OCOFF is connected to GND2 or left unconnected. If terminal OCOFF is connected to VCC2, the IGBT is not switched off in such cases. However, the signaling of CS or DESAT events to output /FLT is done in any case. The IGBT can be turned off externally instead, e.g. via control input EN. 3.9.10 Soft turn-off The IGBT can be turned off smoothly via an external higher-ohmic gate resistor attached to terminal SOFF. The soft turn-off speed can be adjusted by selecting the appropriate resistor value. The soft turn-off reduces the voltage overshoot considerably and may be used in combination with the two-level turn-off function of the IC. The regular turn-off function at terminal OFF supports the soft turn-off as soon as the voltage between terminals GATE and VEE2 drops below 3 V. An additional safety feature is installed by means of a watchdog timer, which starts at the same time the soft turn-off is triggered. The watchdog turns off the IGBT in any case via terminal OFF after 5 s. If the soft-off function is not used, both the terminals SOFF and OFF can be combined to increase the turn-off current capability of the IC. Trigger conditions for a soft turn-off: Desaturation condition at terminal DESAT Overcurrent condition at terminal CS Driver Enable OFF (EN equals GND1) UVLO1 of the input side supply VCC1 UVLO of the input side logic reference PADP Internal signal transmission error Final datasheet 20 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 4 Electrical parameters 4.1 Absolute maximum ratings Note: Absolute maximum ratings are defined as ratings, which may lead to destruction of the integrated circuit when being exceeded. Unless otherwise noted all parameters refer to GND1 and to TA = 25C. Table 5 Abs. maximum ratings Parameter Offset voltage VGND1 - VVEE2 1EDI20I12SV and 1EDU20I12SV only Symbol VOFFSET Min. Max. Unit -1200 1200 V Positive power supply input side VVCC1 -0.3 6.5 PADP voltage PADN voltage VPADP VPADN -0.3 -0.3 16.05 0.3 VVCC2 -0.3 20.3 VVEE2 -12 0.3 Maximum power supply voltage output side (VVCC2 - VVEE2) Vmax2 - Voltage at terminals INN, INP, EN, RDY1, RDY2, /FLT Voltage at terminals SIGI, SIGO, SPEED VTERMINAL -0.3 -0.3 28 VPADP VVCC1 Voltage at terminal DESAT1 Voltage at terminals OCOFF 1, GATE 2, OFF 2, SOFF 2 Voltage at terminal GATE 3 Voltage at terminals CS 1, VZ 2, CZ 2, PRB 2 Voltage at terminal RSENSE, ON4 -5 -0.3 -0.3 -0.3 -7 VVCC2 VVCC2 5.5 5.5 VVCC2 Positive power supply output side 1 Negative power supply output side 1 Open drain output current (/FLT, RDY2, RDY1) IOD - 10 Output current at terminals SIGO DC output current at terminal ON (VVCC2 - VVEE2 = 20 V) ISIGO -6 6 ION,DC - 10 Peak output current at terminal OFF (tp = 2 s, f = 20 kHz) IOFF - 2.4 Peak output current at terminal SOFF (tp = 2 s, f = 20 kHz) ISOFF - 1.05 Junction temperature TJ -40 -40 125 150 TS -55 125 PD,tot - 980 mW Thermal resistance (Both chips active), TA = 25 C Rth(j-a) - 102 K/W value th(j-top) - 6.69 1EDS20I12SV 1EDI20I12SV Storage temperature Total power dissipation5 1 with respect to terminal GND2 2 with respect to terminal VEE2 mA A C 3 with respect to terminal OFF 4 with respect to terminal VCC2 5 Power dissipation is derated linearly with 9.8 mW/C above an ambient temperature of T = 25C. See Figure 17 for A reference layouts for these thermal data. Thermal performance may change significantly with layout and heat dissipation of components in close proximity. Final datasheet 21 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC Table 5 Abs. maximum ratings Parameter ESD Capability HBM 1 CDM 2 Common mode transient immunity 4.2 Symbol VESD Min. Max. Unit - 750 V 1000 |dVISO/dt| - 50 kV/s Operating range Note: The IC operates as described in the functional description within the operating range. Unless otherwise noted all parameters refer to terminal GND1 and TA = 25C. Table 6 Operating parameters Parameter Positive power supply input side Input side logic reference voltage ranges VPADP - VPADN Symbol VVCC1 Min. Typ. Max. Unit 4.85 5 5.5 V VPAD 3 3.3 5.5 Control voltage by terminal SPEED at terminal RSENSE VIN,RSENSE 7 15 VVCC2- - 1.7 Voltage at terminal SPEED 3 VSPEED 0 - 3.3 VVCC2 0 15 20 Negative power supply output side Power supply voltage output side (VVCC2 - VVEE2) VVEE2 -12 -8 0 Vmax2 - - 25 Output current at terminal SIGO ISIGO -3 - 3 mA Ambient temperature TA -40 - 105 C Positive power supply output side 4 4 15.75 VVCC20.2V 1 According to EIA/JESD22-A114-B According to EIA/JESD22-C101 3 With respect to voltage V PADN 4 With respect to voltage V GND2 2 Final datasheet 22 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 4.3 Electrical characteristics Note: The electrical characteristics given below include the spread of values for the junction temperature range of -40C TJ 125C. All values refer to the supply condition of VVCC1 = VPADP = 5 V, VPADN = VGND1 = 0 V, VVCC2 = 15 V, VVEE2 = -8 V and the given test conditions. Typical values represent the median values at TA = 25C under the above mentioned supply conditions. Unless otherwise noted all voltages are given with respect to their respective reference terminal (GND1 for terminals 19 to 36, GND2 for terminals 1 to 18). 4.3.1 Voltage supply Table 7 Voltage supply Parameter UVLO threshold for VCC1 UVLO hysteresis VCC1 UVLO threshold VCC2 UVLO hysteresis VCC2 UVLO threshold for PADP Symbol VUVLOH1 power up power down VUVLOL1 (VUVLOH1 - VUVLOL1) VUVLO1,hys VUVLOH2 power up power down VUVLOL2 (VUVLOH2 - VUVLOL2) VUV,hys2 VUVLOH3 power up power down VUVLOL3 Quiescent current input side VCC1 IQ1 Quiescent current input side VCC1 Values Unit Min. Typ. Max. - 4.63 4.85 3.5 4.47 - 0.08 - - - 11.9 12.6 10.4 11.0 - 0.3 - - - - 2.95 1.6 - - - 9.6 13 - 9.6 13 Test condition V mA VINP = VPADP, VINN = VPADN VRDY1 = VRDY2 = VFLT = VPADP VINP = VPADP = 15 V VFLT = VRDY1 = VRDY2 = 5 V, VINN = VPADN Quiescent current output side VCC2 IQ2 - 7.3 9.5 VINP = VPADP, VINN = VPADN VRDY1 = VRDY2 = VFLT = VPADP Quiescent current output side in UVLO mode IQ2,UVLO - 4.5 6 VVCC2 = 10.4 V Quiescent current output side VEE2 IQ3 - 4.7 - Quiescent current PADP IQ4 - 1 - VINP = VPADP, VINN = VPADN VRDY1 = VRDY2 = VFLT = VPADP VINP = VPADP, VINN = VPADN VRDY1 = VRDY2 = 5 V VFLT = 5 V Final datasheet 23 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 4.3.2 Logic input and output Table 8 Logic input and output Parameter Symbol Values Unit Min. Typ. Max. Test condition Low level input voltage terminals INP, INN, EN VIL 1.5 - - High level input voltage terminals INP, INN, EN VIH - - 3.5 Low level input voltage terminal SIGI 1.5 - - High level input voltage terminal SIGI VIL,SIGI VIH,SIGI - - 3.5 Low level output voltage terminal SIGO V OL,SIGO VGND1 0.1 High level output voltage terminal SIGO V OH,SIGO 4.7 Low level output voltage terminal /FLT Low level output voltage terminals RDY1, RDY2 VOL,FLT 4.3 - 0.3 VVCC1 0.08 0.3 IIH,SIGO = - 3 mA IIL,pin = 3 mA - 0.1 0.3 IIL,pin = 3 mA Input bias current INP VOL,RDY1, VOL,RDY2 IIH,INP 30 60 100 Input bias current EN IIH,EN 30 60 100 VEN = 5 V Input bias current INN IIL,INN -1200 -700 -350 VINN = 0V Input bias current SPEED IIH,SPEED 6 10 16 VSPEED = 5 V Input filter time terminals INP, INN, SIGI TFILIN 22 - - Input filter time terminal EN TFILEN 45 - - VEN = 5 V Fault reset duration terminal EN TEN,RST 870 - - VEN = 0V, VVEE2=0V Propagation delay EN to ON (Turn-On) Shut down propagation delay EN to SOFF (Turn-Off) TEN,ON - 530 - TEN,SOFF - 530 680 4.3.3 Gate driver Table 9 Gate driver Parameter Voltage of sense resistor for gate current level 1 Voltage of sense resistor for gate current level 2 Voltage of sense resistor for gate current level 3 Voltage of sense resistor for gate current level 4 1 Voltage of sense resistor for gate current level 5 1 Symbol VRSENSE Values Min. Typ. Max. VVCC20.165 VVCC20.250 VVCC20.340 VVCC20.420 VVCC20.510 VVCC20.197 VVCC20.287 VVCC20.376 VVCC20.466 VVCC20.556 VVCC20.230 VVCC20.324 VVCC20.413 VVCC20.512 VVCC20.601 V IIL,SIGO = 3 mA A ns VINP = 5 V VTERMINAL = 5 V VVEE2 = 0 V Unit Test condition V VSPEED = 3.3 V VSPEED = 2.91 V VSPEED = 2.63 V VSPEED = 2.35 V VSPEED = 2.08 V Default state after power on (VVCC1 > VUVLOH1) Final datasheet 24 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC Voltage of sense resistor for gate current level 6 Voltage of sense resistor for gate current level 7 Voltage of sense resistor for gate current level 8 VRSENSE Voltage of sense resistor for gate current level 9 Voltage of sense resistor for gate current level 10 VVCC20.600 VVCC20.680 VVCC20.770 VVCC20.825 VVCC20.910 VVCC21.420 VVCC20.645 VVCC20.735 VVCC20.825 VVCC20.912 VVCC21.003 VVCC21.543 VVCC20.691 VVCC20.790 VVCC20.880 VVCC20.999 VVCC21.095 VVCC21.667 V - VVEE2 +0.03 VVEE2 +0.3 VVEE2 +2.3 VVEE2+ 7.6 VVEE2 +0.06 VVEE2 +0.6 VVEE2 +1.9 VVEE2 +7.2 VVCC2 6.5 60 VVEE2+ 0.09 VVEE2+ 0.85 VVEE2+ 6 mV Voltage of sense resistor for gate current level 11 VSPEED hysteresis VSPEED,hys - Low level output voltage terminal OFF VOFFL - - - - Low level output voltage terminal SOFF VSOFFL - - - - VSPEED = 1.80 V VSPEED = 1.52 V VSPEED = 1.25 V VSPEED = 0.97 V VSPEED = 0.69 V VSPEED = 0 V V IOFFL = 20 mA IOFFL = 200 mA IOFFL = 1 A - IOFFL = 2 A 1 VVEE2+ 0.18 VVEE2+ 1.7 VVEE2+ 4.9 ISOFFL = 20 mA - ISOFFL = 1 A 1 ISOFFL = 200 mA ISOFFL = 500 mA Turn-on clamping voltage terminal ON VON,ON - Turn-off threshold voltage terminal GATE 2 VGATE,th - 3 - Active Shut Down Voltage (VCC2 open) VACTSD - 1.4 2.4 Output current of terminal ON ION+ 50 - - Output current of terminal ON ION- - - -50 Preboost time TPRB - 135 180 ns TSPEED - - 120 s IGBT is turn on Fall time1 TFALL - 8 - ns Turn-on propagation delay without PMOS TPDON - 500 540 CLOAD = 1 nF TA=25C, VVEE2=0V Turn-on propagation delay over junction temperature1 TPDONt - - 570 VVEE2 = 0V Turn-off propagation delay TPDOFF - 485 535 TA=25C, VVEE2=0V Turn-off propagation delay over junction temperature1 Matching delay (TPDON - TPDOFF) TPDOFFt - - 565 VVEE2 = 0 V MT - 15 30 VVEE2 = 0 V Speed setting propagation 1 2 delay1 VVCC2 5.0 IOFF = 200 mA, VVEE2 = 0 V, mA tp=2 s The Parameter is not subject to production test - verified by design / characterization Reference to VVEE2 Final datasheet 25 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 4.3.4 Desaturation protection Table 10 Desaturation protection Parameter Symbol Values Unit Min. Typ. Max. Test condition Desaturation trigger level VDESAT 8.4 9 9.4 V Blanking capacitor charge current 450 500 550 A VDESAT = 2 V Blanking capacitor discharge current IDESAT,C IDESAT,D - 12.5 - mA VDESAT = 6 V Desaturation leading edge blanking time 1 TDESATleb - 400 - ns TDESATFIL - 230 - DESAT to /FLT propagation delay DESAT shut down propagation delay to SOFF TDESATFLT - 760 995 VVEE2 = 0 V TSOFF - 360 540 VVEE2 = 0 V DESAT shut down watch dog TDESATOFF - 5.2 8 Desaturation filter time 1 4.3.5 Overcurrent protection disable Table 11 Overcurrent protection disable Parameter Symbol Values Min. Typ. Max. High level input voltage terminal OCOFF VIH,OCOFF 11.4 12.5 13 Low level input voltage terminal OCOFF VIL,OCOFF 7 7.5 8.2 Input bias current OCOFF IIH,OCOFF - 150 250 4.3.6 Current sense Table 12 Current sense Parameter Symbol Current sense trigger threshold Input bias current CS Over current detection blanking time 1 Shut down propagation delay CS to SOFF Propagation delay CS to /FLT 1 1 1 Values s OCOFF = low, VVEE2 = 0 V Unit Test condition V A VOCOFF = 15 V Unit Test condition VSOFF < 5 V VCS = 0 V Min. Typ. Max. VCS 320 350 380 mV IIH,CS -200 -125 -45 A TCS,blank - 420 - ns TCS - 280 540 TCS,FLT - 760 995 The Parameter is not subject to production test Final datasheet 26 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 4.3.7 Two-level turn-off Table 13 Two-level turn-off Parameter Symbol Two-level voltage terminal VZ VTLTO Values Unit Test condition V Min. Typ. Max. 10.7 11.4 12.1 9.6 10.3 11.0 Terminal VZ connected to VEE2 VZ open 8.6 9.3 10.0 RVZ = 27 k Two-level turn-off threshold voltage 1 VTLTO,th - 2.5 - Two-level turn-off charging current ICZ -1150 -950 -750 A Two-level turn-off time limitation TTLLIM 3 5 7 s dVTLTO/dt - 20 - Two-level voltage slope 1 2 2 VCZ = VEE2 + 1V VVEE2 = 0 V V/s CLOAD = 10 nF Referenced to VVEE2 The parameter is not subject to production test - verified by design / characterization Final datasheet 27 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 5 Insulation characteristics Insulation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application. Surface mount classification is class A in accordance with CECCOO802. Table 14 Insulation characteristics Parameter Symbol Characteristic Installation classification per EN 60664-1, Table 1 For rated mains voltage 150 Vrms For rated mains voltage 300 Vrms For rated mains voltage 600 Vrms For rated mains voltage 1000 Vrms Overvoltage categories I-IV I-IV I-III I-II Climatic Classification according to IEC 68 40 / 105 / 21 Pollution degree (EN 60664-1) 2 CLR CPG CTI Minimum external clearance Minimum external creepage Minimum Comparative Tracking Index 8.5 mm 8.5 >400 5.1 Reinforced insulation requirements according to VDE 0884-10 (Certificate 40043864, 1EDS20I12SV only) Table 15 Reinforced isolation limits Parameter Maximum Repetitive Insulation Voltage Input to output test voltage, method b Vpd(m) = VIORM * 1.875 , productive test, tm = 1 sec, Partial discharge < 5 pC Highest allowable overvoltage Maximum Surge Isolation Voltage Insulation resistance at Ts, VIO = 500 V Unit Symbol Characteristic Unit VIORM Vpd(m) 1420 V (peak) VIOTM VIOSM RIO 8000 2662 >6000 > 109 Notes This coupler is suitable for "reinforced insulation" only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits. 5.2 Recognized under UL 1577 (File E311313, 1EDS20I12SV and 1EDU20I12SV only) Table 16 Recognized under UL 1577 Parameter Symbol Insulation withstand voltage / 1 min VISO 5000 Insulation test voltage / 1 s VISO 6000 Final datasheet 28 Characteristic Unit V (rms) V (rms) <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC Timing diagrams 6 INP INN TPDON ON ON TPDOFF OFF Figure 7 Timing of turn-on and turn-off propagation delay without two-level turn-off mode TEN,ON SOFF Timing of EN turn-on and shut down propagation delay INP SIGI TP TP TP INP SIGI TP TFILIN TFILIN TFILIN TP SIGO TFILIN TP SIGO Timing of short pulse suppression terminal INP and SIGI (TP < TFILIN) INN TP TFILIN TP INN TFILIN TP TFILIN TP TFILIN TP SIGO SIGO Figure 10 TEN,SOFF EN ON Figure 9 TPDOFF OFF EN Figure 8 TPDON TP Timing of short pulse suppression terminal INN (TP < TFILIN) Final datasheet 29 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC TP < TFILIN TP EN TP TFILIN EN TFILIN TFILIN TP SIGO SIGO Figure 11 TP TFILIN TP Timing of short pulse suppression terminal EN (TP < TFILIN) TP < TEN,RST TP > TEN,RST TP TP EN EN TEN,RST TEN,RST /FLT /FLT Figure 12 TP TP > TFILIN Timing for fault reset at terminal EN TCS,blank VCS CS SOFF TCS TCS,FLT /FLT TEN,RST EN Figure 13 Timing of CS events incl. terminals SOFF, /FLT and EN Final datasheet 30 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC INP TSOFF SOFF TDESATOFF OFF TDESATFIL TDESATleb VDESAT DESAT TDESATleb TDESATFLT /FLT TEN,RST EN Figure 14 Timing for DESAT events incl. terminals SOFF, /FLT and EN (timing is same for related INN input signal) INP INP TTLTO,th TTLTO,th CZ CZ TTLSET>TTLLIM VTLTOx OFF TTLSET TTLSET OFF TTLLIM ON ON INP TTLTO,th TTLTO,th CZ TTLSET>TTLLIM VTLTOx TTLSET VTLTOx TTLSET OFF TTLLIM TTLLIM ON Figure 15 Timing for two-level turn-off incl. terminals CZ and OFF (top: TTLSET < TTLLIM, bottom: TTLSET > TTLLIM) Final datasheet 31 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC 7 Package 7.1 PG-DSO-36-64 Figure 16 Package drawing Final datasheet 32 <Revision 2.1>, 22.10.2018 EiceDRIVERTM 1EDS-SRC family Slew rate control IGBT driver IC Figure 17 Dimension [mm] 25.0 31.5 1.5 therm [W/mK] Material FR4 0.3 Metallization [m] 35 388 Vias = 0.3 mm; plating 25 m; 14 pcs. Package Attach [50m] Solder 55 PCB reference layout (left: top layer, right: bottom layer) Thermal performance may change significantly with layout and heat dissipation of components in close proximity. Final datasheet 33 <Revision 2.1>, 22.10.2018 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG