935287981518 - NXP SEMICONDUCTORS

1. General description

The TJA1054 is the interface be tween the protocol controller and the physical bu s wires in

a Controller Area Network (CAN). It is primarily intended for low-speed applications up to

125 kBd in passenger cars. The device provides differential receive and transmit

capability but will switch to single-wire transmitter and/or receiver in error conditions.

The TJA1054T is pin and downwards comp atible with the PCA82C252T and the

TJA1053T. This means that these two devices can be replaced by the TJA1054T with

retention of all functions.

The most important improvements of the TJA1054 with respect to the PCA82C252 and

TJA1053 are:

•Very low EME due to a very good matching of the CANL and CANH output signals

•Good EMI, especially in low power modes

•Full wake-up capability during bus failures

•Extended bus failure management including short-circuit of the CANH bus line to VCC

•Support for easy system fault diagnosis

•Two-edge sensit ive wake -u p inp u t sign al via pin WA K E

2. Features and benefits

2.1 Optimized for in-car low-speed communication

Baud rate up to 125 kBd

Up to 32 nodes can be connected

Supports unshielded bus wires

Very low ElectroMagnetic Emission (EME) due to built-in slope control function and a

very good matching of the CANL and CANH bus outputs

Very high ElectroMagnetic Immunity (EMI) in normal and low power operating modes

Fully integrated receiver filters

Transmit Data (TxD) dominant time-out function

2.2 Bus failure management

Supports single-wire transmission modes with ground offset voltages up to 1.5 V

Automatic switching to single-wire mode in the event of bus failures, even when the

CANH bus wire is short-circuited to VCC

Automatic reset to differential mode if bus failure is removed

Full wake-up capability during failure modes

TJA1054

Fault-tolerant CAN transceiver

Rev. 4 — 3 August 2010 Product data sheet

Product data sheet Rev. 4 — 3 August 2010 2 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

2.3 Protections

Bus pins short-circuit safe to battery and to ground

Thermally protected

Bus lines protected against transients in an automotive environment

An unpowered node does not disturb the bus lines

2.4 Support for low power modes

Low current slee p mode an d standby mode with wa ke -u p via th e bu s lines

Power-on reset flag on the output

3. Quick reference data

[1] All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested

at Tamb = 125 °C for dies on wafer level, and above this for cased products 100 % tested at Tamb =25°C,

unless otherwise specified.

[2] For bare die, all parameters are only guaranteed if the back side of the die is connected to ground.

[3] A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if

VBAT =5.3Vto27V see Table 5.

Table 1. Quick reference data

VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB =V

CC; Tvj =

−

C to +150

C; all voltages are

defined with respect to ground; positive currents flow into the device; unless otherwise specified.[1][2]

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage 4.75 - 5.25 V

VBAT battery supply voltage on

pin BAT no time limit −0.3 - +40 V

operating mode [3] 5.0 - 27 V

load dump - - 40 V

IBAT battery supply current on

pin BAT sleep mode; VCC =0V;

VBAT =12V -3050μA

VCANH voltage on pin CANH VCC = 0 V to 5.0 V;

VBAT ≥0 V; no time limit;

with respect to

any other pin

−40 - +40 V

VCANL voltage on pin CANL VCC = 0 V to 5.0 V;

VBAT ≥0 V; no time limit;

with respect to

any other pin

−40 - +40 V

ΔVCANH voltage drop on pin CANH ICANH =−40 mA - - 1.4 V

ΔVCANL voltage drop on pin CANL ICANL =40mA - - 1.4 V

tPD(L) propagation delay TXD

(LOW) to RXD (LOW) -1- μs

trbus line output rise time between 10 % and 90 %;

C1 = 10 nF; see Figure 5 -0.6- μs

tfbus line output fall time between 10 % and 90 %;

C1 = 1 nF; see Figure 5 -0.3- μs

Tvj virtual junction

temperature [4] −40 - +150 °C

Product data sheet Rev. 4 — 3 August 2010 3 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

[4] Junction temperature in accordance with “IEC 60747-1”. An alternative definition is: Tvj =T

amb +P×Rth(vj-a)

where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable

combinations of power dissipation (P) and ambient temperature (Tamb).

4. Ordering information

5. Block diagram

Table 2. Ordering information

Type number Package

Name Description Version

TJA1054T SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

TJA1054T/S900 SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

TJA1054U - bare die; 1990 ×2700 ×375 μm-

Fig 1. Block diagram

mgl421

FAILURE DETECTOR

PLUS WAKE-UP

PLUS TIME-OUT

WAKE-UP

STANDBY

CONTROL

INH 1

WAKE 7

STB 5

EN 6

TXD

VCC

ERR 4

RXD 3

TEMPERATURE

PROTECTION

DRIVER

RECEIVER

BAT

VCC

GND

FILTER

TIMER

FILTER

TJA1054

RTL

CANH

CANL

RTH

Product data sheet Rev. 4 — 3 August 2010 4 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

6. Pinning information

6.1 Pinning

6.2 Pin description

Fig 2. Pin configuration

TJA1054T

INH BAT

TXD GND

RXD CANL

ERR CANH

STB V

EN RTL

WAKE RTH

001aaf610

7 8

Table 3. Pin descripti on

Symbol Pin Description

INH 1 inhibit output for switching an external voltage regulator if a

wake-up signal occurs

TXD 2 transmit data input for activating the driver to the bus lines

RXD 3 receive data output for reading out the data from the bus lines

ERR 4 error, wake-up and power-on indication output; active LOW in

normal operating mode when a bus failure is detected; active LOW

in standby and sleep mode when a wake-up is detected; active

LOW in power-on standby when a VBAT power-on event is

detected

STB 5 standby digital control signal input; together with the input signal

on pin EN this inp ut determines the state of the transceiver;

see Table 5 and Figure 3

EN 6 enable digital control signal input; together with the input signal on

pin STB this input determines the state of the transceiver;

see Table 5 and Figure 3

WAKE 7 local wake-up signal input (active LOW); both falling and rising

edges are detected

RTH 8 termination resistor connection; in case of a CANH bus wire error

the line is terminated with a predefined impedance

RTL 9 termination resistor connection; in case of a CANL bus wire error

the line is terminated with a predefined impedance

VCC 10 supply voltage

CANH 11 HIGH-level CAN bus line

CANL 12 LOW-level CAN bus line

GND 13 ground

BAT 14 battery supply voltage

Product data sheet Rev. 4 — 3 August 2010 5 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

7. Functional description

The TJA1054 is the int erfa c e between the CAN prot oco l con tr olle r an d the physical wires

of the CAN bus (see Figure 7). It is primarily intended for low-speed applications, up to

125 kBd, in passenger cars. The device provides differential transmit capability to the

CAN bus and differential receive capability to the CAN controller.

To reduce EME, the rise and fall slopes are limited . This allows the use of an unshielded

twisted pair or a parallel pair of wires for the bus lines. Moreover, the device supports

transmission capability on either bus line if one of the wires is corrupted. The failure

detection logic automatically selects a suitable transmission mode.

In normal operatin g mode (no wiring failures) the dif ferential receiver is outp ut on pin RXD

(see Figure 1). The differential receiver inputs are connected to pins CANH and CANL

through integrated filters. The filtered input signals are also used for the single-wire

receivers. The receivers connecte d to pins CANH and CANL have threshold voltages that

ensure a maximum noise margin in single-wir e mode.

A timer function (TxD dominant time-out function) has been integrated to prevent the bus

lines from being driven into a permane nt dominan t state (thus blocking the entire network

communication) due to a situation in wh ich pin TXD is permanently forced to a LOW level,

caused by a hardware and/or software application failure.

If the duration of the LOW level on pin TXD exceeds a certain time, the transmitter will be

disabled. The timer will be reset by a HIGH level on pin TXD.

7.1 Failure detector

The failure detector is fully active in the normal operating mode. Af ter the detection of a

single bus failure the detector switches to the appropriate mode (see Table 4). The

differential receiver thres ho ld vo ltage is set at −3.2 V typical (VCC = 5 V). This ensures

correct reception with a noise margin as high as possible in the normal operating mode

and in the event of fa ilur es 1, 2, 5 and 6a. These failures, or recovery from them, do not

destroy ongoing transmissions. The outp ut drivers remain active, the termination does no t

change and the re ce iver rem a ins in differential mod e (se e Table 4).

Failures 3, 3a and 6 are detected by co mparators connected to the CANH and CANL bus

lines. Failures 3 and 3a are detected in a two-step approach. If the CANH bus line

exceeds a cert ain volt age level, the dif ferenti al comparator signals a continuous dominant

condition. Because of inter operability reasons with the predecessor products

PCA82C252 and TJA1053, after a first time-out the transceiver switches to single-wire

operation through CANH. If the CANH bus line is still exceeding the CANH detection

voltage for a seco nd time-out, the T JA1054 switches to CANL operation; the CANH driver

is switched off and the RTH bias changes to the pull-down current source. The time-outs

(delays) are needed to avoid false triggering by external RF fields.

Product data sheet Rev. 4 — 3 August 2010 6 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

[1] A weak termination implies a pull-down current source behavior of 75 μA typical.

[2] A weak termination implies a pull-up current source behavior of 75 μA typical.

Failure 6 is detected if the CANL bus line exceeds its comparator threshold for a certain

period of time. This delay is needed to avoid false triggering by external RF fields. After

detection of failure 6, the reception is switched to the single-wire mode through CANH;

the CANL driver is switched off and the RTL bias changes to the pull-up current source.

Recovery from failures 3, 3a and 6 is detected automatically after reading a consecutive

recessive level by corresponding comparators for a certain period of time.

Failures 4 and 7 initially result in a permanent dominant level on p in RXD. After a time-out

the CANL driver is switched off and the RTL bias changes to the pull-up current source.

Reception continues by switching to the single-wire mode via pins CANH or CANL. When

failures 4 or 7 are removed, the recessive bus levels are restored. If the differential

voltage remain s belo w th e recessive thresho ld le vel for a ce rtain period of time, reception

and transmission switch back to the differential mode.

If any of the wiring failure occurs, the output signal on pin ERR will be set to LOW. On

error recovery, the output signal on pin ERR will be set to HIGH again. In case of an

interrupted open bus wire, this failure will be detected and signalled only if there is an

open wire between the transmitting and receiving node(s). Thus, duri ng open wire

failures, pin ERR typically toggles.

During all single-wire transmissions, EMC performance (both immunity and emission) is

worse than in the differential mode. The integrated receiver filters suppress any HF noise

induced into the bus wires. The cut- of f frequency of these filter s is a compr omise between

propagation delay and HF suppression. In single-wire mode, LF noise cannot be

distinguished from the required signal.

Ta ble 4. Bus failures

Failure Description Termination

CANH (RTH) Termination

CANL (RTL) CANH

driver CANL

driver Receiver

mode

1 CANH wire

interrupted on on on on differential

2 CANL wire interrupted on on on on differential

3 CANH short-circuited

to battery weak[1] on off on CANL

3a CANH short-circuited

to VCC

weak[1] on off on CANL

4 CANL short-circuited

to ground on weak[2] on off CANH

5 CANH short-circuited

to ground on on on on differential

6 CANL short-circuited

to battery on weak[2] on off CANH

6a CANL short-circuited

to VCC

on on on on differential

7 CANL and CANH

mutually

short-circuited

on weak[2] on off CANH

Product data sheet Rev. 4 — 3 August 2010 7 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

7.2 Low power modes

The transceive r provides three low power modes which can be entered and exited via

STB and EN (see Table 5 and Figure 3).

The sleep mode is the mode with the lowest power consumption. Pin INH is switched to

HIGH-impedance for deactivatio n of the external voltage regulator. Pin CANL is biased to

the battery voltage via pin RTL. If the supply voltage is provided, pins RXD and ERR will

signal the wake-up interrupt.

The sta ndby mode operates in th e same way as the sleep mode but with a HIGH leve l on

pin INH.

The power-on sta ndby mode is the same as the st andby mode, howe ver, in this mode the

battery power-on flag is shown on pin ERR instead of the wake-up interrupt signal. The

output on pin RXD will show the wake-up interrupt. This mode is only for reading out the

power-on flag.

[1] If the supply voltage VCC is present

[2] Wake-up interrupts are released when entering normal operating mode.

[3] A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if

VBAT =5.3Vto27V.

[4] In case the goto-sleep command was used before. When VCC drops, pin EN will become LOW, but due to

the fail-safe functionality this does not effect the internal functions.

[5] VBAT power-on flag will be reset when entering normal operating mode.

Wake-up requests are re cognized by the transceiver through two possible channels:

•The bus lines for remote wake-up

•Pin WAKE for local wake-up

In order to wake-up the transceiver remotely through the bus lines, a filter mechanism is

integrated. This mechan ism makes sure th at noise and any present bus failure conditions

do not result into an erroneous wake-up. Because of this mechanism it is not sufficient to

simply pull the CANH or CANL bus lines to a dominant level for a certain time. To

guarantee a successful remote wake-up under all conditions, a message frame with a

dominant phase of at least the maximum specified t(CANH) or t(CANL) in it is required.

Ta ble 5. Normal operating and low power mo des

Mode Pin STB Pin EN Pin ERR Pin RXD Pin RTL

switched

LOW HIGH LOW HIGH

Goto-sleep

command LOW HIGH wake-up

interrupt

signal[1][2][3]

wake-up

interrupt

signal[1][2][3]

VBAT

Sleep LOW LOW[4]

Standby LOW LOW

Power-on

standby HIGH LOW VBAT

power-on

flag[1][5]

wake-up

interrupt

signal[1][2][3]

VBAT

Normal

operating HIGH HIGH error flag no error

flag dominant

received

data

recessive

received

data

VCC

Product data sheet Rev. 4 — 3 August 2010 8 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

A local wake-up through pin WAKE is detected by a rising or falling edge with a

consecutive level exceeding the maximum specified tWAKE.

On a wake-up request the transceiver will set the output on pin INH to HIGH which can be

used to activate the external supply voltage regulator.

If VCC is provided the wake-up request can be read on the ERR or RXD outputs, so the

external microcontroller can activate the transceiver (switch to normal operating mode) via

pins STB and EN.

To prevent a false remote wake-up due to transients or RF fields, the wake-up voltage

levels have to be maintained for a certain period of time. In the low power modes the

failure detection circuit remains partly active to prevent an increased power consumption

in the event of failur es 3, 3a, 4 and 7.

To prevent a false local wake-up during an open wire at pin WAKE, this pin has a weak

pull-up current source towards VBAT. However, in order to prevent EMC issues, it is

recommended to connect a not used pin WAKE to pin BAT. INH is set to floating only if

the goto-sleep command is entered successfully. To enter a successful goto-sleep

command under all conditions, this command must be kept stable for the maximum

specified th(sleep).

Pin INH will be set to a HIGH level again by the following events only:

•VBAT power-on (cold start)

•Rising or falling edge on pin WAKE

•A message fram e with a do mina nt ph ase of at least the maximum specified t(CANH) or

t(CANL), while pin EN or pin STB is at a LOW level

•Pin STB goes to a HIGH level with VCC ac tive

To pr ovide fail-safe functionality, the signals on pins STB and EN will internally be set to

LOW when VCC is below a certain threshold voltage (VCC(stb)).

7.3 Power-on

After po wer-on (VBAT switched on) the signal on pin INH will become HIGH and an internal

power-on flag will be set. This flag can be read in the power-on standby mode through

pin ERR (STB = 1; EN = 0) and will be reset by entering the normal operating mode.

7.4 Protections

A current limiting circuit protects the transmitter output stages against short-circuit to

positive and negative battery voltage.

If the junction temperature exceeds the typical value of 165 °C, the transmitter output

stages are d isabled. Because the transmitter is r esponsible for the major p art of the power

dissipation, this will result in a reduced power dissipation and hence a lower chip

temperature. All other parts of the device will continue to operate.

The pins CANH and CANL are protected against electrical transients which may occur in

an automotive environment.

Product data sheet Rev. 4 — 3 August 2010 9 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

8. Limiting values

Mode 10 stands for: Pin STB = HIGH and pin EN = LOW.

(1) Mode change via input pins STB and EN.

(2) Mode change via input pins STB and EN; it should be noted that in the sleep mode pin INH is

inactive and possibly there is no VCC. Mode control is only possible if VCC of the transceiver is

active.

(3) Pin INH is activated after wake-up via bus input pin WAKE.

(4) Transitions to normal mode clear the internal wake-up: interrupt and battery fail flag are

cleared.

(5) Transitions to sleep mode: pin INH is deactivated.

Fig 3. Mode control

mbk94

POWER-ON

STANDBY

NORMAL (4)

GOTO

SLEEP (5)

STANDBY

SLEEP

(1)

(2)

(3)

Ta ble 6. Limitin g values

In accordance with the Absolute Maximum Rating System (IEC 60134).[1]

Symbol Parameter Conditions Min Max Unit

VCC supply voltage −0.3 +6 V

VBAT battery supply voltage −0.3 +40 V

VTXD voltage on pin TXD −0.3 VCC +0.3 V

VRXD voltage on pin RXD −0.3 VCC +0.3 V

VERR voltage on pin ERR −0.3 VCC +0.3 V

VSTB voltage on pin STB −0.3 VCC +0.3 V

VEN voltage on pin EN −0.3 VCC +0.3 V

VCANH voltage on pin CANH with respect to any

other pin −40 +40 V

VCANL voltage on pin CANL with respect to any

other pin −40 +40 V

Vtrt(n) transient voltage on

pins CANH and CANL see Figure 6 −150 +100 V

Product data sheet Rev. 4 — 3 August 2010 10 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

[1] All voltages are defined with respect to pin GND, unless otherwise specified. Positive current flows into the

device.

[2] Only relevant if VWAKE <V

GND −0.3 V; current will flow into pin GND.

[3] Junction temperature in accordance with “IEC 60747-1”. An alternative definition is: Tvj =T

amb +P×Rth(vj-a)

where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable

combinations of power dissipation (P) and ambient temperature (Tamb).

[4] Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ resistor.

[5] Equivalent to discharging a 200 pF capacitor through a 10 Ω resistor and a 0.75 μH coil.

9. Thermal characteristics

VI(WAKE) input voltage on pin WAKE with respect to any

other pin −VBAT +0.3 V

II(WAKE) input current on pin WAKE [2] −15 - mA

VINH voltage on pin INH −0.3 VBAT +0.3 V

VRTH voltage on pin RTH with respect to any

other pin −0.3 VBAT +1.2 V

VRTL voltage on pin RTL with respect to any

other pin −0.3 VBAT +1.2 V

RRTH termination resistance on

pin RTH 500 16000 Ω

RRTL termination resistance on

pin RTL 500 16000 Ω

Tvj virtual junction temperature [3] −40 +150 °C

Tstg storage temperature −55 +150 °C

VESD electrostatic discharge

voltage human body model [4] −2+2 kV

machine mode l [5] −100 +100 V

Ta ble 6. Limitin g values …continued

In accordance with the Absolute Maximum Rating System (IEC 60134).[1]

Symbol Parameter Conditions Min Max Unit

Ta ble 7. Thermal characteristics

Symbol Parameter Conditions Typ Unit

Rth(j-a) thermal resistance from junction to ambient in free air 120 K/W

Rth(j-s) thermal resist ance from junction to substrate

bare die in free air 40 K/W

Product data sheet Rev. 4 — 3 August 2010 11 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

10. Static characteristics

Table 8. Static characteristics

VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB =V

CC; Tvj =

−

C to +150

C; all voltages are defined with respect to

ground; positive currents flow into the device; unless otherwise specified.[1][2][3]

Symbol Parameter Conditions Min Typ Max Unit

Supplies (pins VCC and BAT)

VCC supply voltage 4.75 - 5.25 V

VCC(stb) supply voltage for forced

standby mode (fail-safe) 2.75 - 4.5 V

ICC supply current normal operating mode;

VTXD =V

CC (recessive) 4711mA

normal operating mode;

VTXD = 0 V (dominant); no load 10 17 27 mA

low power modes at VTXD =V

CC 0010μA

VBAT battery supply voltage

on pin BAT no time limit −0.3 - +40 V

operating mode 5.0 - 27 V

load dump - - 40 V

IBAT battery supply current

on pin BAT all modes and in low power

modes at

VRTL =V

WAKE =V

INH =V

BAT

VBAT =12 V 10 30 50 μA

VBAT = 5 V to 27 V 5 30 125 μA

VBAT = 3.5 V 5 20 30 μA

VBAT =1V 0 0 10 μA

sleep mode; VCC =0V;

VBAT =12V - 30 50 μA

VBAT(Pwon) power-on flag voltage

on pin BAT low power modes

power-on flag set - - 1 V

power-on flag not set 3.5 - - V

Itot supply current plus

battery current low power modes; VCC =5V;

VBAT =V

WAKE =V

INH =12V -3060μA

Pins STB, EN and TXD

VIH HIGH-level input voltage 0.7VCC -V

CC +0.3 V

VIL LOW-level input voltage −0.3 - 0.3VCC V

IIH HIGH-level input current

pins STB and EN VI = 4 V - 9 20 μA

pin TXD VI = 4 V −200 −80 −25 μA

IIL LOW-level input current

pins STB and EN VI=1V 4 8 - μA

pin TXD VI=1V −800 −320 −100 μA

Product data sheet Rev. 4 — 3 August 2010 12 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

Pins RXD and ERR

VOH) HIGH-level output

voltage

on pin E RR IO=−100 μAV

CC −0.9 - VCC V

on pin RXD IO=−1mA V

CC −0.9 - VCC V

VOL LOW-level output

voltage

on pin E RR IO=1.6mA 0 - 0.4 V

on pin RXD IO=7.5mA 0 - 1.5 V

Pin WAKE

IIL LOW-level input current VWAKE =0V; V

BAT =27V −10 −4−1μA

Vth(wake) wake-up threshold

voltage VSTB = 0 V 2.5 3.2 3.9 V

Pin INH

ΔVHHIGH-level voltage drop IINH =−0.18 mA - - 0.8 V

ILleakage current sleep mode; VINH =0V - - 5 μA

Pins CANH and CANL

VCANH voltage on pin CANH VCC = 0 V to 5.0 V; V BAT ≥0V;

no time limit; with respect to

any other pin

−40 - +40 V

VCANL voltage on pin CANL VCC = 0 V to 5.0 V; V BAT ≥0V;

no time limit; with respect to

any other pin

−40 - +40 V

ΔVCANH voltage drop on pin

CANH ICANH =−40 mA - - 1.4 V

ΔVCANL voltage drop on pin

CANL ICANL =40mA - - 1.4 V

Vth(dif) differential receiver

threshol d vo ltage no failures and

bus failures 1, 2, 5 and 6a;

see Figure 4

VCC =5V −3.5 −3.2 −2.9 V

VCC = 4.75 V to 5.25 V −0.70VCC −0.64VCC −0.58VCC V

VO(reces) recessive output voltage VTXD =V

on pin CANH RRTH <4kΩ--0.2V

on pin CANL RRTL <4kΩVCC −0.2 - - V

VO(dom) dominant output voltage VTXD =0V; V

EN =V

on pin CANH ICANH =−40 mA VCC −1.4 - - V

on pin CANL ICANL =40mA - - 1.4 V

IO(CANH) output current on

pin CANH normal operating mode;

VCANH =0V; V

TXD =0V −110 −80 −45 mA

low power modes;

VCANH =0V;V

CC =5V -−0.25 - μA

Table 8. Static characteristics …continued

VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB =V

CC; Tvj =

−

C to +150

C; all voltages are defined with respect to

ground; positive currents flow into the device; unless otherwise specified.[1][2][3]

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 4 — 3 August 2010 13 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

IO(CANL) output current on

pin CANL normal operating mode;

VCANL =14V; V

TXD =0V 45 70 100 mA

low power modes;

VCANL =12V; V

BAT =12V -0-μA

Vd(CANH)(sc) detection voltage for

short-circuit to battery

voltage on pin CANH

normal operating mode;

VCC =5V 1.5 1.7 1.85 V

low power modes 1.1 1.8 2.5 V

Vd(CANL)(sc) detection voltage for

short-circuit to battery

voltage on pin CANL

normal operating mode

VCC = 5 V 6.6 7.2 7.8 V

VCC = 4.75 V to 5.25 V 1.32VCC 1.44VCC 1.56VCC V

Vth(wake) wake-up threshold

voltage

on pin CANL lo w power modes 2.5 3.2 3.9 V

on pin CANH low power modes 1.1 1.8 2.5 V

ΔVth(wake) difference of wake-up

threshold voltages low power modes 0.8 1.4 - V

Vth(CANH)(sc) single-ended receiver

threshold voltage on

pin CANH

normal operating mode and

failures 4, 6 and 7

VCC = 5 V 1.5 1.7 1.85 V

VCC = 4.75 V to 5.25 V 0.30VCC 0.34VCC 0.37VCC V

Vth(CANL)(sc) single-ended receiver

threshold voltage on

pin CANL

normal operating mode and

failures 3 and 3a

VCC = 5 V 3.15 3.3 3.45 V

VCC = 4.75 V to 5.25 V 0.63VCC 0.66VCC 0.69VCC V

Ri(CANH)(sc) single-end ed input

resistance on pin CANH normal operating mode 110 165 270 kΩ

Ri(CANL)(sc) single-end ed input

resistance on pin CANL normal operating mode 110 165 270 kΩ

Ri(dif) differential input

resistance normal operating mode 220 330 540 kΩ

Pins RTH and RTL

Rsw(RTL) switch-on resistance on

pin RTL and VCC

normal operating mode;

|IO|<10mA -50100Ω

Rsw(RTH) switch-on resistance on

pin RTH and ground normal operating mode;

|IO|<10mA -50100Ω

VO(RTH) output voltage on

pin RTH low power modes; IO=1mA - 0.7 1.0 V

IO(RTL) output current on

pin RTL low power modes; VRTL =0V −1.25 −0.65 −0.3 mA

Ipu(RTL) pull-up current on

pin RTL normal operatin g mode and

failures 4, 6 and 7 -75-μA

Table 8. Static characteristics …continued

VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB =V

CC; Tvj =

−

C to +150

C; all voltages are defined with respect to

ground; positive currents flow into the device; unless otherwise specified.[1][2][3]

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 4 — 3 August 2010 14 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

[1] All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 °C for dies on

wafer level, and above this for cased products 100 % tested at Tamb =25°C, unless otherwise specified.

[2] For bare die, all parameters are only guaranteed if the back side of the die is connected to ground.

[3] A local or remote wake-up event will be signalled at the transceiver p ins RXD and ERR if VBAT =5.3Vto27V (see Table 5).

11. Dynamic characteristics

Ipd(RTH) pull-down current on

pin RTH normal operating mode and

failures 3 and 3a -75-μA

Thermal shutdown

Tj(sd) shutdown junction

temperature 155 165 180 °C

Table 8. Static characteristics …continued

VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB =V

CC; Tvj =

−

C to +150

C; all voltages are defined with respect to

ground; positive currents flow into the device; unless otherwise specified.[1][2][3]

Symbol Parameter Conditions Min Typ Max Unit

Table 9. Dynamic characteristics

VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB =V

CC; Tvj =

−

C to +150

C; all voltages are defined with respect to

ground; unless otherwise specified.[1][2][3]

Symbol Parameter Conditions Min Typ Max Unit

tt(r-d) transition time for

recessive to dominant (on

pins CANL and CANH)

between 10 % and 90 %; R1 = 100 Ω;

C1 = 10 nF; C2 = not present;

see Figure 5

0.35 0.65 - μs

tt(d-r)) transition time for dominant

to recessive (on pins CANL

and CANH)

between 10 % and 90 %; R1 = 100 Ω;

C1 = 10 nF; C2 = not present;

see Figure 5

0.2 0.3 - μs

tPD(L) propagation delay TXD

(LOW) to RXD (LOW) no failures and failures 1, 2, 5 and 6a;

R1 = 100 Ω; see Figure 4 and Figure 5

C1 = 1 nF; C2 = not present - 0.75 1.5 μs

C1=C2=3.3nF - 1 1.75 μs

failures 3, 3a, 4, 6 and 7; R1 = 100 Ω;

see Figure 4 and Figure 5

C1 = 1 nF; C2 = not present - 0.85 1.4 μs

C1=C2=3.3nF - 1.1 1.7 μs

tPD(H) propagation delay TXD

(HIGH) to RXD (HIGH) no failures and failures 1, 2, 5 and 6a;

R1 = 100 Ω; see Figure 4 and Figure 5

C1 = 1 nF; C2 = not present - 1.2 1.9 μs

C1=C2=3.3nF - 2.5 3.3 μs

failures 3, 3a, 4, 6 and 7; R1 = 100 Ω;

see Figure 4 and Figure 5

C1 = 1 nF; C2 = not present - 1.1 1.7 μs

C1=C2=3.3nF - 1.5 2.2 μs

trbus line outpu t rise time between 1 0 % and 90 %; C1 = 10 nF;

see Figure 5 -0.6- μs

tfbus line output fall time between 10 % and 90 %; C1 = 1 nF;

see Figure 5 -0.3- μs

treact(sleep) reaction time of goto sleep

command [4] 5- 50μs

Product data sheet Rev. 4 — 3 August 2010 15 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

[1] All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 °C for dies on

wafer level, and above this for cased products 100 % tested at Tamb =25°C, unless otherwise specified.

[2] For bare die, all parameters are only guaranteed if the back side of the die is connected to ground.

[3] A local or remote wake-up event will be signalled at the transceiver p ins RXD and ERR if VBAT =5.3Vto27V (see Table 5).

[4] To guarantee a successful mode transition under all conditions, the maximum specified time must be applied.

tdis(TxD) disable time of TxD

permanent dominant timer normal operati ng mode; VTXD =0V 0.75 - 4 ms

tCANH dominant time for remote

wake-up on pin CANH low power modes; VBAT =12V [4] 7- 38μs

tCANL dominant time for remote

wake-up on pin CANL low power modes; VBAT =12V [4] 7- 38μs

tWAKE required time on pin

WAKE fo r local wake-up low power modes; VBAT =12V; for

wake-up after receiving a falling or

rising edge

[4] 7- 38μs

tdet failure detection time normal operating mode

failures 3 and 3a 1.6 - 8.0 ms

failures 4, 6 and 7 0.3 - 1.6 ms

low power modes; VBAT =12V

failures 3 and 3a 1.6 - 8.0 ms

failures 4 and 7 0.1 - 1.6 ms

trec failure recovery time normal operating mode

failures 3 and 3a 0.3 - 1.6 ms

failures 4 and 7 7 - 38 μs

failure 6 125 - 750 μs

low power modes; VBAT =12V

failures 3, 3a, 4 and 7 0.3 - 1.6 ms

ndet pulse-count difference

between CANH and CANL

for failure detection

normal operating mode and

failures 1, 2, 5 and 6a;

pin ERR becomes LOW

-4 -

nrec number of consecutive

pulses on CANH and

CANL simultaneously for

failure recovery

failures 1, 2, 5 and 6a - 4 -

Table 9. Dynamic characteristics …continued

VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB =V

CC; Tvj =

−

C to +150

C; all voltages are defined with respect to

ground; unless otherwise specified.[1][2][3]

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 4 — 3 August 2010 16 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

12. Test information

Vdiff =V

CANH −VCANL

Fig 4. Timing diagram for dynamic characteristics

015aaa17

−5 V

−3.2 V

2.2 V

0.7VCC

0.3VCC

0 V

5 V

1.4 V

3.6 V

0 V

VCC

VTXD

VCANL

VCANH

ΔVCAN

VRXD

tPD(L) tPD(H)

Termination resistors R1 (100 Ω) are not connected to pin RTH or pin RTL for testing purposes

because the minimum load allowed on the CAN bus lines is 500 Ω per transceiver.

The capacitive bus load of 10 nF is split into 3 equal capacitors (3.3 nF) to simulate the bus

cable.

Fig 5. Test circuit for dynamic characteristics

mgl42

20 pF

RXD

STB

TXD

WAKE 7

INH BAT VCC

11410

GND ERR

13 4

RTL

RTH

CANL

CANH

+5 V

R1 C1

TJA1054

Product data sheet Rev. 4 — 3 August 2010 17 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

12.1 Quality information

This product has been qualified to the appropriate Automotive Electronics Council (AEC)

standard Q100 or Q101 and is suitable for use in automotive applications.

The waveforms of the applied transients on pins CANH and CANL will be in accordance with

ISO 7637 part 1: test pulses 1, 2, 3a and 3b.

Fig 6. Test circuit for automotive transients

mgl426

20 pF

RXD

STB

TXD

WAKE 7

INH BAT VCC

11410

GND ERR

13 4

RTL

RTH

CANL

CANH

+5 V

+12 V

1 nF

10 μF

GENERATOR

1 nF

125 Ω

511 Ω

TJA1054

Fig 7. Application diagram

mgl42

100 nF

TXD RXD STB ERR EN INH

35461

TJA1054

CAN TRANSCEIVER

BAT

VCC

VDD

GND

WAKE

P8xC592/P8xCE598

CAN CONTROLLER

CTX0 CRXO Px.x Px.x Px.x

811129

RTLCANLCANHRTH

CAN BUS LINE

+5 V

BATTERY

VBAT

Product data sheet Rev. 4 — 3 August 2010 18 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

13. Bare die information

[1] All coordinates (μm) represent the position of the center of each pad with respect to the bottom left-hand

corner of the top aluminium layer (see Figure 8).

Table 10. Bonding pad locations

Symbol Pad Coordinates[1]

x y

INH 1 106 317

TXD 2 111 169

RXD 3 750 111

ERR 4 1347 111

STB 5 2248 103

EN 6 2521 240

WAKE 7 2521 381

RTH 8 2550 1269

RTL 9 2359 1840

VCC 10 1886 1809

CANH 11 872 1840

CANL 12 437 1840

GND 13a 80 1356

GND 13b 80 1241

BAT 14 106 772

Fig 8. Bonding pad locations

TJA1054U

23 4 5

1112

13 a

13 b

mgw50

y2700 μm

1990

μm

Product data sheet Rev. 4 — 3 August 2010 19 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

14. Package outline

Fig 9. Package outline SOT108-1 (SO14)

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10

1.45

1.25 0.25 0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8 1.27 6.2

5.8

0.7

0.6

0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

detail X

vMA

(A )

076E06 MS-012

pin 1 index

0.069 0.010

0.004

0.057

0.049 0.01 0.019

0.014

0.0100

0.0075

0.35

0.34

0.16

0.15 0.05

1.05

0.041

0.244

0.228

0.028

0.024

0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27

03-02-19

0 2.5 5 mm

scale

O14: plastic small outline package; 14 leads; body width 3.9 mm SOT108

-1

Product data sheet Rev. 4 — 3 August 2010 20 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

15. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

15.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is often preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on on e printed wiring board; however, it is not

suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

15.2 Wave and reflow soldering

W ave soldering is a joining te chnology in which the joints are m ade by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

•Through-hole components

•Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solde r lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads ha ving a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

•Board specifications, including the board finish, solder masks and vias

•Package footprints, including solder thieves and orientation

•The moisture sensitivity level of the packages

•Package placement

•Inspection and repair

•Lead-free soldering ve rsus SnPb soldering

15.3 Wave soldering

Key characteristics in wave soldering are:

•Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

•Solder bath specifications, including temperature and impurities

Product data sheet Rev. 4 — 3 August 2010 21 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

15.4 Reflow soldering

Key characteristics in reflow soldering are :

•Lead-free ve rsus SnPb soldering; note th at a lead-free reflow process usua lly leads to

higher minimum peak temperatures (see Figure 10) than a SnPb process, thus

reducing the process window

•Solder paste printing issues including smearing, release, and adjusting th e process

window for a mix of large and small components on one board

•Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature) an d cooling down. It is imperative that the peak

temperature is high enoug h for the solder to make reliable solder joint s (a solder paste

characteristic). In addition, the peak temperature must be low en ough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on p ackage thickness and volume and is classified in accordance with

Table 11 and 12

Moisture sensitivity precautions, as indicated on the packing, must be respe cted at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 10.

Ta ble 11. SnPb eutectic process (from J-STD-020C)

Package thickness (mm) Package reflow temperature (°C)

Volume (mm3)

< 350 ≥ 350

< 2.5 235 220

≥ 2.5 220 220

Table 12. Lead-free process (from J-ST D-020C)

Package thickness (mm) Package reflow temperature (°C)

Volume (mm3)

< 350 350 to 2000 > 2000

< 1.6 260 260 260

1.6 to 2.5 260 250 245

> 2.5 250 245 245

Product data sheet Rev. 4 — 3 August 2010 22 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

For further informa tion on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

16. Revision history

MSL: Moisture Sensitivity Level

Fig 10. Temperature profiles for large and small components

001aac84

temperature

time

minimum peak temperature

= minimum soldering temperature

maximum peak temperature

= MSL limit, damage level

peak

temperature

Table 13. Revision history

Document ID Release date Data sheet status Change notice Supersedes

TJA1054 v.4 20100803 Product data sheet - TJ A1054_3

Modifications: •The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

•Legal texts have been adapted to the new company name where appropriate .

•Value of parameter VESD (machine model) changed in Table 6.

•Typing error corrected in Table 8 in the conditions column for IBAT.

TJA1054_3

(9397 750 11721) 20040323 Product specification - TJA1054_2

TJA1054_2

(9397 750 08965) 20011120 Product specification - TJA1054_1

TJA1054_1

(9397 750 03636) 19990211 Preliminary specification - -

Product data sheet Rev. 4 — 3 August 2010 23 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

17. Legal information

17.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

17.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not b e relied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semicond uctors sales

office. In case of any inconsistency or conflict wit h the short data sheet, th e

full data sheet shall pre va il.

Product specificat io n — The information and data provided in a Product

data sheet shall define the specification of the product as agr eed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to off er functions and qualities beyond those described in the

Product data sheet.

17.3 Disclaimers

Limited warr a nty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warrant ies, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect , incidental,

punitive, special or consequ ential damages (including - wit hout limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ ag gregate and cumulative l iability toward s

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconduct ors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suit able for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in perso nal injury , death or severe property or environmental

damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and ope ration of their applications

and products using NXP Semiconductors product s, and NXP Semiconductors

accepts no liability for any assistance with applicati ons or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suit able and fit for the custome r’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Custo mers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party custo m er(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individua l agreement. In case an individual

agreement is concluded only the ter m s and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing i n this document may be interpreted or

construed as an of fer t o sell product s that is open for accept ance or the gr ant,

conveyance or implication of any license under any copyrights, patents or

other industrial or inte llectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulatio ns. Export might require a prior

authorization from national authorities.

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contain s data from the objective specification for product develop ment.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

Product data sheet Rev. 4 — 3 August 2010 24 of 25

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

Bare die — All die are tested on compliance with their related technical

specifications as stated in this data sheet up to the point of wafer sawing and

are handled in accordance with the NXP Semiconductors storage and

transportation conditions. If the re are data sheet limits not guaranteed, these

will be separately indicated in the dat a sheet. There are no post-p acking tests

performed on individual die or wafers.

NXP Semiconductors has no control of third party procedures in the sawing,

handling, packing or assembly of the die. Accordingly, NXP Semiconductors

assumes no liability for device functionality or performance of the die or

systems after third party sawing, handling, packing or assembly of the die. It

is the responsibility of the customer to test and qualify their application in

which the die is used.

All die sales are conditione d upon and sub ject to the custo mer enter ing into a

written die sale agreement with NXP Semiconductors through its legal

department.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

17.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respective ow ners.

18. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors TJA1054

Fault-tolerant CAN transceiver

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 3 August 2010

Document identifier: TJA1054

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

19. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

2.1 Optimized for in-car low-speed

communication . . . . . . . . . . . . . . . . . . . . . . . . . 1

2.2 Bus failure management . . . . . . . . . . . . . . . . . . 1

2.3 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2.4 Support for low power modes. . . . . . . . . . . . . . 2

3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 3

5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

7 Functional description . . . . . . . . . . . . . . . . . . . 5

7.1 Failure detector. . . . . . . . . . . . . . . . . . . . . . . . . 5

7.2 Low power modes . . . . . . . . . . . . . . . . . . . . . . 7

7.3 Power-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

7.4 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9

9 Thermal characteristics . . . . . . . . . . . . . . . . . 10

10 Static characteristics. . . . . . . . . . . . . . . . . . . . 11

11 Dynamic characteristics . . . . . . . . . . . . . . . . . 14

12 Test information. . . . . . . . . . . . . . . . . . . . . . . . 16

12.1 Quality information . . . . . . . . . . . . . . . . . . . . . 17

13 Bare die information . . . . . . . . . . . . . . . . . . . . 18

14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19

15 Soldering of SMD packages . . . . . . . . . . . . . . 20

15.1 Introduction to soldering . . . . . . . . . . . . . . . . . 20

15.2 Wave and reflow soldering . . . . . . . . . . . . . . . 20

15.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 20

15.4 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 21

16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 22

17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 23

17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23

17.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

17.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 23

17.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 24

18 Contact information. . . . . . . . . . . . . . . . . . . . . 24

19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25