16
IR3837MPbF
Rev 1.31
As mentioned earlier, an over current is detected
if the OCSet pin goes below ground. Hence, at
the current limit threshold, VOCset=0. Then, for a
current limit setting ILimit,R
OCSet is calculated as
follows:
Fig. 7. Connection of over current sensing resistor
An over-current detection trips the OCP
comparator, latches OCP signal and cycles the
soft start function in hiccup mode.
The hiccup is performed by making the internal
SS signal equal to zero and counting the number
of switching cycles. The Soft Start pin is held low
until 4096 cycles have been completed. The
OCP signal resets and the converter recovers.
After every soft start cycle, the converter stays in
this mode until the overload or short circuit is
removed.
An optional 10pF-22pF filter capacitor can be
connected from OCSet pin to PGnd. It is
recommended to use this capacitor for very
narrow duty cycle applications (pulse-width
<150ns).
Thermal Shutdown
Temperature sensing is provided inside IR3837.
The trip threshold is typically set to 140oC. When
trip threshold is exceeded, thermal shutdown
turns off both MOSFETs and resets the internal
soft start.
Automatic restart is initiated when the sensed
temperature drops within the operating range.
There is a 20oC hysteresis in the thermal
shutdown threshold.
I
IR
R
OCSet
LimitonDS
OCSet (4) ........................
)( *
External Synchronization
The IR3837 incorporates an internal circuit which
enables synchronization of the internal oscillator
(using rising edge) to an external clock. An
external resistor from Rt pin to Gnd is still
required to set the free-running frequency close
to the Sync input frequency. This function is
important to avoid sub-harmonic oscillations due
to beat frequency for embedded systems when
multiple POL (point of load) regulators are used.
Applying the external signal to the Sync input
changes the effective value of the ramp signal
(Vramp/Vosc).
Equation (5) shows that the effective amplitude of
the ramp is reduced after the external Sync
signal is applied. More difference between the
frequency of the Sync and the free-running
frequency results in more change in the effective
amplitude of the ramp signal. Therefore, since
the ramp amplitude takes part in calculating the
loop-gain and bandwidth of the regulator, it is
recommended to not use a Sync frequency which
is much higher than the free-running frequency
(or vice versa). In addition, the effective value of
the ramp signal, given by equation (5), should be
used when the compensator is designed for the
regulator.
The pulse width of the external clock, which is
applied to the sync, should be greater than 100ns
and its high level should be greater than 2V,
while its lower level is less than 0.6V. For more
information refer to the Oscillator section in page-
6. If this pin is left floating, the IC will run with the
free running frequency set by the resistor Rt.
Output Voltage Tracking and Sequencing
The IR3837 can accommodate user
programmable tracking and/or sequencing
options using Vp, Vref, Enable, and Power Good
pins. In the block diagram presented on page 3,
the error-amplifier (E/A) has been depicted with
three positive inputs. Ideally, the input with the
lower voltage is used for regulating the output
voltage and the other two inputs are ignored. In
practice the voltage of the other two inputs
should be about 200mV greater than the low-
voltage input so that their effects can completely
be ignored. For normal operation, Vp is tied to
Vcc (1.5V < Vp < Vcc) and Vref is left floating
(with a bypass capacitor).
........................ff.Vosc SyncRun_Free (5)
81
1