INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT158 Quad 2-input multiplexer; inverting Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Quad 2-input multiplexer; inverting 74HC/HCT158 Moving the data from two groups of registers to four common output buses is a common use of the "158". The state of S determines the particular register from which the data comes. It can also be used as a function generator. FEATURES * Inverting data path * Output capability: standard * ICC category: MSI The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. GENERAL DESCRIPTION The 74HC/HCT158 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The "158" is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The 74HC/HCT158 are quad 2-input multiplexers which select 4 bits of data from two sources and are controlled by a common data select input (S). The four outputs present the selected data in the inverted form. The enable input (E) is active LOW. 1Y = E.(1l1.S + 1l0.S) The logic equations for the output are: 2Y = E.(2l1.S + 2l0.S) 3Y = E.(3l1.S + 3l0.S) 4Y = E.(4l1.S + 4l0.S) When E is HIGH, all the outputs (1Y to 4Y) are forced HIGH regardless of all other input conditions. The "158" is identical to the "157" but has inverting outputs. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC tPHL/ tPLH propagation delay CL = 15 pF; VCC = 5 V nI0, nI1 to nY 12 13 ns E to nY 14 16 ns S to nY 14 16 ns 3.5 3.5 pF 40 40 pF CI input capacitance CPD power dissipation capacitance per multiplexer notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". December 1990 HCT 2 Philips Semiconductors Product specification Quad 2-input multiplexer; inverting 74HC/HCT158 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1 S common data select input 2, 5, 11, 14 1I0 to 4I0 data inputs from source 0 3, 6, 10, 13 1I1 to 4I1 data inputs from source 1 4, 7, 9, 12 1Y to 4Y multiplexer outputs 8 GND ground (0 V) 15 E enable input (active LOW) 16 VCC positive supply voltage Fig.1 Pin configuration. December 1990 Fig.2 Logic symbol. 3 Fig.3 IEC logic symbol. Philips Semiconductors Product specification Quad 2-input multiplexer; inverting 74HC/HCT158 FUNCTION TABLE INPUTS OUTPUT E S nI0 nI1 nY H X X X H L L L X H L L H X L L H X L H L H X H L Notes 1. H = HIGH voltage level L = LOW voltage level X = don't care Fig.4 Functional diagram. Fig.5 Logic diagram. December 1990 4 Philips Semiconductors Product specification Quad 2-input multiplexer; inverting 74HC/HCT158 DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 min. typ. -40 to +85 max. min. max. -40 to +125 min. UNIT VCC WAVEFORMS (V) max. tPHL/ tPLH propagation delay nI0, nI1 to nY 41 15 12 125 25 21 155 31 26 190 38 32 ns 2.0 4.5 6.0 Fig.7 tPHL/ tPLH propagation delay E to nY 47 17 14 145 29 25 180 36 31 220 44 38 ns 2.0 4.5 6.0 Fig.6 tPHL/ tPLH propagation delay S to nY 47 17 14 145 29 25 180 36 31 220 44 38 ns 2.0 4.5 6.0 Fig.7 tTHL/ tTLH output transition time 19 7 6 75 15 13 95 19 16 110 22 19 ns 2.0 4.5 6.0 Figs 6 and 7 December 1990 5 Philips Semiconductors Product specification Quad 2-input multiplexer; inverting 74HC/HCT158 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT nI0 0.40 nI1 0.40 S 2.80 E 0.60 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 min. typ. -40 to +85 max. min. max. -40 to +125 min. UNIT VCC WAVEFORMS (V) max. tPHL/ tPLH propagation delay nI0, nI1 to nY 16 30 38 45 ns 4.5 Fig.7 tPHL/ tPLH propagation delay E to nY 19 35 44 53 ns 4.5 Fig.6 tPHL/ tPLH propagation delay S to nY 19 35 44 53 ns 4.5 Fig.7 tTHL/ tTLH output transition time 7 15 19 22 ns 4.5 Figs 6 and 7 December 1990 6 Philips Semiconductors Product specification Quad 2-input multiplexer; inverting 74HC/HCT158 AC WAVEFORMS (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.6 Waveforms showing the enable input (E) to output (nY) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.7 Waveforms showing the data input (nI0, nI1) to output (nY) propagation delays and the output transition times. PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines". December 1990 7 Philips Semiconductors - PIP - 74HC/HCT158; Quad 2-input multiplexer; inverting Submit Query Philips Semiconductors Home ProductBuy MySemiconductors ContactProduct Information catalogonline Products MultiMarket Semiconductors * Product Selector Catalog by * Function Catalog by * System * Cross-reference * Packages End of Life * information Distributors Go * Here! * Models * SoC solutions * 74HC/HCT158; Quad 2-input multiplexer; inverting Information as of 2003-04-23 My.Semiconductors.COM. Your personal service from Use right mouse button to Philips Semiconductors. download datasheet Please register now ! Download datasheet Stay informed General description Features Block diagram Products & packages Buy online Applications Support & tools Parametrics Similar products Datasheet Email/translate General description top The 74HC/HCT158 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT158 are quad 2-input multiplexers which select 4 bits of data from two sources and are controlled by a common data select input (S). The four outputs present the selected data in the inverted form. The enable input (E) is active LOW. When E is HIGH, all the outputs (1Y to 4Y) are forced HIGH regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the '158'. The state of S determines the particular register from which the data comes. It can also be used as a function generator. The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. The '158' is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The logic equations for the output are: 1Y = E.(1l1.S + 1l0.S) 2Y = E.(2l1.S + 2l0.S) 3Y = E.(3l1.S + 3l0.S) 4Y = E.(4l1.S + 4l0.S) The '158' is identical to the '157' but has inverting outputs. file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HCT158N.html (1 of 4) [Apr-29-2003 2:46:35 PM] Philips Semiconductors - PIP - 74HC/HCT158; Quad 2-input multiplexer; inverting Features top Inverting data path Output capability: standard ICC category: MSI Datasheet top Type number Title Publication release date Datasheet status Page count File size (kB) Datasheet 74HC/HCT158 Quad 2-input multiplexer; inverting 12/1/1990 Product specification 7 43 Download Download PDF File Additional datasheet info To complete the device datasheet with package and family information, also download the following PDF files. The "Logic Package Information" document is required to determine in which package(s) this device is available. Document Description 1 Download HCT_FAMILY_SPECIFICATIONS PDF 2 Download File HCT_PACKAGE_INFO PDF 3 Download File HCT_PACKAGE_OUTLINES PDF File HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications HC/T Package Info, The IC06 74HC/HCT/HCMOS Logic Package Information HC/T Package Outlines, The IC06 74HC/HCT/HCMOS Logic Package Outlines Parametrics top Type number Package Description Propagation Voltage No. Power Logic Output Delay(ns) of Dissipation Switching Drive Pins Considerations Levels Capability 74HC158D Quad 2SOT109 Input 15 (SO16) Multiplexer; Inverting 5 Volts 16 + Low Power or Battery Applications CMOS Low 74HC158N Quad 2SOT38-1 Input 15 (DIP16) Multiplexer; Inverting 5 Volts 16 + Low Power or Battery Applications CMOS Low Quad 2Input SOT109 Multiplexer; 74HCT158D 15 (SO16) Inverting; TTL Enabled 5 Volts 16 + Low Power or Battery Applications TTL Low file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HCT158N.html (2 of 4) [Apr-29-2003 2:46:35 PM] Philips Semiconductors - PIP - 74HC/HCT158; Quad 2-input multiplexer; inverting Quad 2Input SOT38-1 Multiplexer; 74HCT158N 15 (DIP16) Inverting; TTL Enabled 5 Volts 16 + Low Power or Battery Applications TTL Low Products, packages, availability and ordering top Type number North Ordering code Marking/Packing Package Device status Buy online Discretes American (12NC) Download packing info type number PDF File Standard Marking SOT109 74HC158D 74HC158D 9337 137 60652 * Bulk Pack, Full production order this (SO16) CECC product Standard Marking online SOT109 74HC158D9337 137 60653 * Reel Pack, Full production order this (SO16) T SMD, 13", CECC product Standard Marking online SOT38-1 74HC158N 74HC158N 9336 693 50652 * Bulk Pack, Full production order this (DIP16) CECC product Standard Marking online SOT109 74HCT158D 74HCT158D 9337 137 70652 * Bulk Pack, Full production order this (SO16) CECC product Standard Marking online SOT109 74HCT158D9337 137 70653 * Reel Pack, Full production order this (SO16) T SMD, 13", CECC product Standard Marking online SOT38-1 74HCT158N 74HCT158N 9336 699 80652 * Bulk Pack, Full production order this (DIP16) CECC product online - - - - - - Similar products top 74HC/HCT158 links to the similar products page containing an overview of products that are similar in Products function similar or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category. to 74HC/HCT158 Support & tools top HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications(date 01-MarDownload 98) PDF HC/T User Guide(date 01-Nov-97) Download File PDF File file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HCT158N.html (3 of 4) [Apr-29-2003 2:46:35 PM] Philips Semiconductors - PIP - 74HC/HCT158; Quad 2-input multiplexer; inverting Email/translate this product information top Email this product information. Translate this product information page from English to: French Translate The English language is the official language used at the semiconductors.philips.com website and webpages. All translations on this website are created through the use of Google Language Tools and are provided for convenience purposes only. No rights can be derived from any translation on this website. About this Web Site | Copyright (c) 2003 Koninklijke Philips N.V. All rights reserved. | Privacy Policy | | Koninklijke Philips N.V. | Access to and use of this Web Site is subject to the following Terms of Use. | file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HCT158N.html (4 of 4) [Apr-29-2003 2:46:35 PM]