300 mA, Low Quiescent Current, CMOS Linear Regulators ADP170/ADP171 Data Sheet TYPICAL APPLICATION CIRCUITS VIN 1 VIN 2 GND 3 EN C1 VOUT VOUT 5 C2 ADP170 ON OFF NC 4 Figure 1. ADP170 with Fixed Output Voltage, 1.8 V VIN = 2.3V 1 CIN 1F VIN VOUT = 1.8V VOUT 5 COUT 1F ADP171 2 GND 3 EN R1 ON OFF ADJ 4 R2 07716-002 Maximum output current: 300 mA Input voltage range: 1.6 V to 3.6 V Low quiescent current IGND = 23 A with 0 mA load IGND = 170 A with 300 mA load Low shutdown current: <1 A Low dropout voltage: 66 mV at 300 mA load Output voltage accuracy: 1% Up to 31 fixed-output voltage options available from 0.8 V to 3.0 V Adjustable-output voltage range 0.8 V to 3.0 V (ADP171) Accuracy over line, load, and temperature: 3% Stable with small 1 F ceramic output capacitor PSRR performance of 70 dB at 10 kHz and 73 dB at 1 kHz Low noise: 30 V rms at VOUT = 0.8 V Current limit and thermal overload protection Logic-controlled enable Compact 5-lead TSOT package 07716-001 FEATURES Figure 2. ADP171 with Adjustable Output Voltage APPLICATIONS Mobile phones Digital camera and audio devices Portable and battery-powered equipment DSP/FPGA/microprocessor supplies Post dc-dc regulation GENERAL DESCRIPTION The ADP170/ADP171 are low voltage input, low quiescent current, low-dropout (LDO) linear regulators that operate from 1.6 V to 3.6 V and provide up to 300 mA of output current. The low 66 mV dropout voltage at 300 mA load improves efficiency and allows operation over a wide input voltage range. The low 23 A of quiescent current at a 0 mA load makes the ADP170/ ADP171 ideal for battery-operated portable equipment. The ADP170 is capable of 31 fixed-output voltage options, ranging from 0.8 V to 3.0 V. ADP171 is an adjustable version, which allows output voltages that range from 0.8 V to 3.0 V via an external divider. The ADP170/ADP171 are optimized for stable operation with small 1 F ceramic output capacitors. Ideal for powering digital processors, the ADP170/ADP171 exhibit good transient Rev. C performance and occupy minimal board space. Compared with commodity types of LDOs, the ADP170/ADP171 provide 20 dB to 40 dB better power supply rejection ratio (PSRR) at 100 kHz, making the ADP170/ADP171 an ideal power source for analogto-digital converter (ADC) mixed-signal processor systems and allowing use of smaller size bypass capacitors. In addition, low output noise performance without the need for an additional bypass capacitor further reduces printed circuit board (PCB) component count. Short-circuit protection and thermal overload protection circuits prevent damage in adverse conditions. The ADP170/ADP171 are available in tiny 5-lead TSOT for the smallest footprint solution to meet a variety of portable power applications. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2009-2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADP170/ADP171 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................7 Applications ....................................................................................... 1 Theory of Operation ...................................................................... 11 Typical Application Circuits............................................................ 1 Applications Information .............................................................. 12 General Description ......................................................................... 1 Capacitor Selection .................................................................... 12 Revision History ............................................................................... 2 Undervoltage Lockout ............................................................... 13 Specifications..................................................................................... 3 Enable Feature ............................................................................ 13 Input and Output Capacitor, Recommended Specifications ........ 4 Current Limit and Thermal Overload Protection ................. 14 Absolute Maximum Ratings............................................................ 5 Thermal Considerations............................................................ 14 Thermal Data ................................................................................ 5 Printed Circuit Board Layout Considerations ....................... 16 Thermal Resistance ...................................................................... 5 Outline Dimensions ....................................................................... 17 ESD Caution .................................................................................. 5 Ordering Guide .......................................................................... 17 Pin Configurations and Function Descriptions ........................... 6 REVISION HISTORY 1/14--Rev. B to Rev. C Changes to Ordering Guide .......................................................... 17 5/10--Rev. A to Rev. B Changes to Figure 1 and Figure 2 ................................................... 1 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 17 6/09--Rev. 0 to Rev. A Changes to Features Section............................................................ 1 Updated Outline Dimensions ....................................................... 17 1/09--Revision 0: Initial Version Rev. C | Page 2 of 20 Data Sheet ADP170/ADP171 SPECIFICATIONS VIN = (VOUT + 0.4 V) or 1.6 V (whichever is greater), EN = VIN, IOUT = 10 mA, CIN = COUT = 1 F, TA = 25C, unless otherwise noted. Table 1. Parameter INPUT VOLTAGE RANGE OPERATING SUPPLY CURRENT 1 SHUTDOWN CURRENT Symbol VIN IGND IGND-SD FIXED-OUTPUT VOLTAGE ACCURACY VOUT ADJUSTABLE-OUTPUT VOLTAGE ACCURACY (ADP171) 2 VADJ ADJ INPUT BIAS CURRENT (ADP171) LINE REGULATION LOAD REGULATION 3 ADJI-BIAS VOUT/VIN VOUT/IOUT DROPOUT VOLTAGE 4 START-UP TIME 5 CURRENT-LIMIT THRESHOLD 6 THERMAL SHUTDOWN Thermal Shutdown Threshold Thermal Shutdown Hysteresis VDROPOUT tSTART-UP ILIMIT Conditions TJ = -40C to +125C IOUT = 0 A IOUT = 0 A, TJ = -40C to +125C IOUT = 1 mA IOUT = 1 mA, TJ = -40C to +125C IOUT = 150 mA IOUT = 150 mA, TJ = -40C to +125C IOUT = 300 mA IOUT = 300 mA, TJ = -40C to +125C EN = GND EN = GND, VIN = 3.6 V, TJ = -40C to +85C EN = GND, VIN = 3.6 V, TJ = 85C to 125C IOUT = 10 mA 1 mA < IOUT < 300 mA, VIN = (VOUT + 0.5 V) to 3.6 V 1 mA < IOUT < 300 mA, VIN = (VOUT + 0.5 V) to 3.6 V, TJ = -40C to +125C Min 1.6 IOUT = 10 mA 1 mA < IOUT < 300 mA, VIN = (VOUT + 0.5 V) to 3.6 V 1 mA < IOUT < 300 mA, VIN = (VOUT + 0.5 V) to 3.6 V, TJ = -40C to +125C 1.6 V VIN 3.6 V, ADJ connected to VOUT VIN = (VOUT + 0.5 V) to 3.6 V, TJ = -40C to +125C IOUT = 1 mA to 300 mA IOUT = 1 mA to 300 mA, TJ = -40C to +125C IOUT = 10 mA, VOUT 1.8 V IOUT = 10 mA, VOUT 1.8 V, TJ = -40C to +125C IOUT = 150 mA, VOUT 1.8 V IOUT = 150 mA, VOUT 1.8 V, TJ = -40C to +125C IOUT = 300 mA, VOUT 1.8 V IOUT = 300 mA, VOUT 1.8 V, TJ = -40C to +125C VOUT = 1.8 V 0.495 0.490 0.485 TJ rising EN INPUT Logic High Voltage Logic Low Voltage Leakage Current Voltage VIH VIL VI-LEAKAGE 1.6 V VIN 3.6 V 1.6 V VIN 3.6 V EN = VIN or GND EN = VIN or GND, TJ = -40C to +125C UNDERVOLTAGE LOCKOUT Input Voltage Rising Input Voltage Falling Hysteresis UVLO UVLORISE UVLOFALL UVLOHYS TJ = -40C to +125C TJ = -40C to +125C 2 25 +1 +2 +3 Unit V A A A A A A A A A A A % % % 0.505 0.510 0.515 V V V 60 50 100 130 210 170 260 0.1 -1 -2 -3 0.5 15 -0.25 +0.25 0.001 0.007 2 7 33 70 66 135 120 450 800 150 15 0.4 0.1 1 1.5 0.7 nA %/V %/mA %/mA mV mV mV mV mV mV s mA C C 1.2 80 Rev. C | Page 3 of 20 Max 3.6 23 400 TSSD TSSD-HYS Typ V V A A V V mV ADP170/ADP171 Data Sheet Parameter OUTPUT NOISE Symbol OUTNOISE POWER SUPPLY REJECTION RATIO PSRR Conditions 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 3.0 V 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 1.8 V 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 1.2 V 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 0.8 V 1 kHz, VIN = 3.6 V, IOUT = 10 mA, VOUT = 0.8 V 10 kHz, VIN = 3.6 V, IOUT = 10 mA, VOUT = 0.8 V 10 kHz, VIN = (VOUT + 1 V), IOUT = 10 mA to 300 mA 100 kHz, VIN = (VOUT + 1 V), IOUT = 10 mA to 300 mA Min Typ 72 50 40 30 73 70 50 47 Max Unit V rms V rms V rms V rms dB dB dB dB The current from the external resistor divider network in the case of adjustable voltage output (as with the ADP171) should be subtracted from the ground current measured. Accuracy when VOUT is connected directly to ADJ. When the VOUT voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the tolerances of resistors used. 3 Based on an end-point calculation using 1 mA and 300 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA. 4 Applies only for output voltages above 1.6 V. Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. 5 Start-up time is defined as the time between the rising edge of EN and VOUT being at 90% of its nominal value. 6 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V. 1 2 INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS Table 2. Parameter MINIMUM INPUT AND OUTPUT CAPACITANCE 1 CAPACITOR ESR 1 Symbol CMIN Conditions TJ = -40C to +125C Min 0.45 RESR TJ = -40C to +125C 0.001 Typ Max Unit F 1 The minimum input and output capacitance should be greater than 0.45 F over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. C | Page 4 of 20 Data Sheet ADP170/ADP171 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter VIN to GND VOUT to GND EN to GND Storage Temperature Range Operating Junction Temperature Range Operating Ambient Temperature Range Soldering Conditions Rating -0.3 V to +3.6 V -0.3 V to VIN -0.3 V to +3.6 V -65C to +150C -40C to +125C -40C to +85C JEDEC J-STD-020 Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL DATA Absolute maximum ratings apply only individually, not in combination. The ADP170/ADP171 can be damaged when the junction temperature limits are exceeded. Monitoring ambient temperature does not guarantee that TJ is within the specified temperature limits. In applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may have to be derated. In applications with moderate power dissipation and low PCB thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. The junction temperature (TJ) of the device is dependent on the ambient temperature (TA), the power dissipation of the device (PD), and the junction-toambient thermal resistance of the package (JA). maximum power dissipation exists, close attention to thermal board design is required. The value of JA may vary, depending on PCB material, layout, and environmental conditions. The specified values of JA are based on a 4-layer, 4 in. x 3 in. PCB. Refer to JESD 51-7 for detailed information regarding board construction. JB is the junction-to-board thermal characterization parameter with units of C/W. The JB of the package is based on modeling and calculation using a 4-layer board. The Guidelines for Reporting and Using Electronic Package Thermal Information: JESD51-12 states that thermal characterization parameters are not the same as thermal resistances. JB measures the component power flowing through multiple thermal paths rather than a single path as in thermal resistance, JB. Therefore, JB thermal paths include convection from the top of the package as well as radiation from the package--factors that make JB more useful in real-world applications. Maximum junction temperature (TJ) is calculated from the board temperature (TB) and power dissipation (PD) using the formula TJ = TB + (PD x JB) Refer to JESD51-8 and JESD51-12 for more detailed information about JB. THERMAL RESISTANCE JA and JB are specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Thermal Resistance Package Type 5-Lead TSOT ESD CAUTION Maximum junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) using the following formula: TJ = TA + (PD x JA) Junction-to-ambient thermal resistance (JA) of the package is based on modeling and calculation using a 4-layer board. The junction-to-ambient thermal resistance is highly dependent on the application and board layout. In applications where high Rev. C | Page 5 of 20 JA 170 JB 43 Unit C/W ADP170/ADP171 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 5 VIN 1 VOUT ADP170 4 ADJ ADP171 GND 2 TOP VIEW (Not to Scale) EN 3 VOUT 4 EN 3 NC TOP VIEW (Not to Scale) 07716-003 GND 2 5 NC = NO CONNECT 07716-004 VIN 1 Figure 4. ADP171 5-Lead TSOT Figure 3. ADP170 5-Lead TSOT Table 5. Pin Function Descriptions Pin No. ADP170 ADP171 1 1 2 2 3 3 4 5 4 5 Mnemonic VIN GND EN NC ADJ VOUT Description Regulator Input Supply. Bypass VIN to GND with a 1 F or greater capacitor. Ground. Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup, connect EN to VIN. No Connect. Not connected internally. Adjust. A resistor divider from VOUT to ADJ sets the output voltage. Regulated Output Voltage. Bypass VOUT to GND with a 1 F or greater capacitor. Rev. C | Page 6 of 20 Data Sheet ADP170/ADP171 TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.6 V, VOUT = 1.8 V, IOUT = 10 mA, CIN = COUT = 1 F, TA = 25C, unless otherwise noted. 200 1.810 180 160 GROUND CURRENT (A) 1.800 VOUT (V) 1.795 1.790 1.785 1.780 1.775 07716-005 ILOAD = 100A ILOAD = 1mA ILOAD = 10mA ILOAD = 100mA ILOAD = 200mA ILOAD = 300mA 1.770 -40 -5 25 85 ILOAD = 300mA 140 120 ILOAD = 100mA 100 80 ILOAD = 10mA 60 ILOAD = 1mA 40 ILOAD = 100A 20 07716-008 1.805 ILOAD = 10A 0 125 -40 -5 JUNCTION TEMPERATURE (C) 25 85 125 JUNCTION TEMPERATURE (C) Figure 5. Output Voltage vs. Junction Temperature Figure 8. Ground Current vs. Junction Temperature 1.804 180 160 1.803 GROUND CURRENT (A) 140 VOUT (V) 1.802 1.801 1.800 120 100 80 60 40 1.798 0.01 0.1 1 10 100 07716-009 07716-006 1.799 20 0 0.01 1k 0.1 1 LOAD CURRENT (mA) 10 100 1k LOAD CURRENT (mA) Figure 6. Output Voltage vs. Load Current Figure 9. Ground Current vs. Load Current 180 1.805 160 1.804 ILOAD = 300mA 1.801 1.800 ILOAD = 10mA 100 80 60 ILOAD = 1mA 40 1.799 1.798 2.1 ILOAD = 100A ILOAD = 1mA 2.3 2.5 2.7 ILOAD = 10mA ILOAD = 100mA 2.9 3.1 ILOAD = 200mA ILOAD = 300mA 3.3 07716-007 VOUT (V) 1.802 ILOAD = 100mA 120 ILOAD = 100A 20 ILOAD = 10A 0 3.5 2.1 VIN (V) 2.3 2.5 2.7 2.9 3.1 3.3 VIN (V) Figure 7. Output Voltage vs. Input Voltage Figure 10. Ground Current vs. Input Voltage Rev. C | Page 7 of 20 3.5 07716-010 GROUND CURRENT (A) 140 1.803 ADP170/ADP171 Data Sheet 400 5.0 3.0 2.5 2.0 1.5 300 250 200 150 100 1.0 0 -50 50 07716-011 0.5 -25 0 25 50 75 TEMPERATURE (C) 100 0 1.5 125 1.6 1.8 1.7 1.9 2.0 Figure 14. Ground Current vs. Input Voltage (In Dropout) -30 70 TA = 25C -40 50 300mA 200mA 100mA 10mA 1mA -50 PSSR (dB) DROPOUT VOLTAGE (mV) = 1mA = 10mA = 100mA = 200mA = 300mA VIN (V) Figure 11. Shutdown Current vs. Temperature at Various Input Voltages 60 ILOAD ILOAD ILOAD ILOAD ILOAD 07716-014 3.5 350 40 30 -60 -70 20 -80 07716-012 10 0 0.1 1 10 100 -90 10 1k 07716-015 SHUTDOWN CURRENT (A) 4.0 GROUND CURRENT (A) 4.5 VIN = 2.1V VIN = 2.3V VIN = 2.7V VIN = 2.9V VIN = 3.2V VIN = 3.4V VIN = 3.5V VIN = 3.6V 100 1k 10k 100k 1M 10M FREQUENCY (Hz) LOAD CURRENT (mA) Figure 15. Power Supply Rejection Ratio vs. Frequency, VOUT = 0.8 V Figure 12. Dropout Voltage vs. Load Current 1.85 -30 1.80 -40 1.75 300mA 200mA 100mA 10mA 1mA PSSR (dB) ILOAD ILOAD ILOAD ILOAD ILOAD 1.65 1.60 = 1mA = 10mA = 100mA = 200mA = 300mA 1.60 1.65 1.70 1.75 1.80 1.85 -90 10 1.90 VIN (V) 07716-016 -80 1.55 1.50 1.55 -60 -70 07716-013 VOUT (V) -50 1.70 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 16. Power Supply Rejection Ratio vs. Frequency, VOUT = 1.8 V Figure 13. Output Voltage vs. Input Voltage (in Dropout) Rev. C | Page 8 of 20 Data Sheet ADP170/ADP171 -30 70 -40 60 3V 50 -70 300mA 200mA 100mA 10mA 1mA 30 0.8V 20 -80 10 07716-017 -90 10 1.8V 40 100 1k 10k 100k 1M 0 0.001 10M 07716-020 -60 RMS NOISE (V) PSSR (dB) -50 0.01 FREQUENCY (Hz) Figure 17. Power Supply Rejection Ratio vs. Frequency, VOUT = 3.0 V 0.1 1 10 LOAD CURRENT (mA) 100 1000 Figure 20. RMS Noise vs. Load Current and Output Voltage -30 -40 3V, 1mA 1.8V, 1mA 0.8V, 1mA 3V, 300mA 1.8V, 300mA 0.8V, 300mA ILOAD 1mA TO 300mA LOAD STEP, 2.5A/s 1 -60 VOUT 2 -70 -80 07716-118 -90 10 VIN = 3.6V VOUT = 1.8V 100 1k 10k 100k 1M CH1 200mA 10M CH2 50.0mV B W FREQUENCY (Hz) Figure 18. Power Supply Rejection Ratio vs. Frequency, Various Output Voltages and Load Currents M40.00s A CH1 T 160.680s 07716-121 PSSR (dB) -50 124mA Figure 21. Load Transient Response, CIN and COUT = 1 F 10 ILOAD 1mA TO 300mA LOAD STEP, 2.5A/s 1 1 V/rt (Hz) 0.8V 1.8V 3.0V VOUT 2 0.01 10 100 VIN = 3.6V VOUT = 1.8V 07716-019 VIN = 3.6V ILOAD = 10mA COUT = 1F 1k FREQUENCY (Hz) 10k CH1 200mA 100k CH2 50.0mV B W M40.0s T Figure 19. Output Noise Spectrum A CH1 159.800s 204mA Figure 22. Load Transient Response, CIN and COUT = 4.7 F Rev. C | Page 9 of 20 07716-122 0.1 ADP170/ADP171 Data Sheet VIN VIN 2.6V TO 3.6V INPUT VOLTAGE STEP, 2V/s 2.6V TO 3.6V INPUT VOLTAGE STEP 2V/s 1 1 CH2 10.0mV M10.0s A CH1 T 39.3000% VOUT = 1.8V CIN = COUT = 1F 07716-123 VOUT = 1.8V CIN = COUT = 1F CH1 1.00V VOUT 2 2.94V CH1 1.00V CH2 10.0mV B W M10.0s T Figure 23. Line Transient Response, Load Current = 1 mA A CH1 39.3000s 2.94V Figure 24. Line Transient Response, Load Current = 300 mA Rev. C | Page 10 of 20 07716-124 VOUT 2 Data Sheet ADP170/ADP171 THEORY OF OPERATION The ADP170/ADP171 are low quiescent current, low-dropout linear regulators that operate from 1.6 V to 3.6 V and can provide up to 300 mA of output current. Drawing a low 170 A of quiescent current (typical) at full load makes the ADP170/ADP171 ideal for battery-operated portable equipment. Shutdown current consumption is typically 100 nA. Optimized for use with small 1 F ceramic capacitors, the ADP170/ADP171 provide excellent transient performance. ADP170 VOUT VIN GND SHUTDOWN 0.5V REFERENCE R1 R2 07716-021 EN SHORT CIRCUIT, UVLO AND THERMAL PROTECT ADP171 VOUT SHORT CIRCUIT, UVLO AND THERMAL PROTECT Note that in shutdown, the output is turned off and the divider current is zero. ADJ SHUTDOWN 0.5V REFERENCE 07716-022 EN The output voltage can be calculated using the equation: The value of R1 should be less than 200 k to minimize errors in the output voltage caused by the ADJ pin bias current. For example, when R1 and R2 each equal 200 k, the output voltage is 1.0 V. The output voltage error introduced by the ADJ pin bias current is 3 mV or 0.3%, assuming a typical ADJ pin bias current of 15 nA at 25C. Figure 25. ADP170 Internal Block Diagram GND The adjustable ADP171 has an output voltage range of 0.8 V to 3.0 V. The output voltage is set by the ratio of two external resistors, as shown in Figure 2. The device servos the output to maintain the voltage at the ADJ pin at 0.5 V referenced to ground. The current in R1 is then equal to 0.5 V/R2 and the current in R1 is the current in R2 plus the ADJ pin bias current. The ADJ pin bias current, 15 nA at 25C, flows through R1 into the ADJ pin. VOUT = 0.5 V(1 + R1/R2) + (ADJI-BIAS)(R1) NOTES 1. R1 AND R2 ARE INTERNAL RESISTORS, AVAILABLE ON THE ADP170 ONLY. VIN Internally, the ADP170/ADP171 consist of a reference, an error amplifier, a feedback voltage divider, and a PMOS pass transistor. Output current is delivered via the PMOS pass device, which is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the PMOS device is pulled lower, allowing more current to pass and increasing the output voltage. If the feedback voltage is higher than the reference voltage, the gate of the PMOS device is pulled higher, allowing less current to pass and decreasing the output voltage. The ADP170/ADP171 use the EN pin to enable and disable the VOUT pin under normal operating conditions. When EN is high, VOUT turns on; when EN is low, VOUT turns off. For automatic startup, EN can be tied to VIN. Figure 26. ADP171 Internal Block Diagram Rev. C | Page 11 of 20 ADP170/ADP171 Data Sheet APPLICATIONS INFORMATION CAPACITOR SELECTION Input Bypass Capacitor Output Capacitor Connecting a 1 F capacitor from VIN to GND reduces the circuit sensitivity to the printed circuit board (PCB) layout, especially when long input traces or high source impedance are encountered. If greater than 1 F of output capacitance is required, the input capacitor should be increased to match it. The ADP170/ADP171 are designed for operation with small, space-saving ceramic capacitors but will function with most commonly used capacitors as long as care is taken with regard to the effective series resistance (ESR) value. The ESR of the output capacitor affects the stability of the LDO control loop. A minimum of 1 F capacitance with an ESR of 1 or less is recommended to ensure stability of the ADP170/ADP171. The transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance improves the transient response of the ADP170/ADP171 to large changes in load current. Figure 27 and Figure 28 show the transient responses for output capacitance values of 1 F and 4.7 F, respectively. ILOAD 1mA TO 300mA LOAD STEP, 2.5A/s 2 B W M200ns A CH1 T 500.000ns 07716-125 VOUT CH1 200mA CH2 50.0mV Any good quality ceramic capacitor can be used with the ADP170/ADP171, as long as it meets the minimum capacitance and maximum ESR requirements. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. Capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. A X5R or X7R dielectric with a voltage rating of 6.3 V or 10 V is recommended. The Y5V and Z5U dielectrics are not recommended, due to their poor temperature and dc bias characteristics. Figure 29 depicts the capacitance vs. bias voltage characteristics of a 0402, 1 F, 10 V X5R capacitor. The variance of a capacitor is strongly influenced by the capacitor size and voltage rating. In general, a capacitor in a larger package or higher voltage rating will exhibit less capacitance variance over bias voltage. The temperature variation of the X5R dielectric is about 15% over the -40C to +85C temperature range and is not a function of package or voltage rating. 1 VOUT = 1.8V CIN = COUT = 1F Input and Output Capacitor Properties 1.2 112mA 1.0 CAPACITANCE (F) Figure 27. Output Transient Response, COUT = 1 F ILOAD 1 1mA TO 300mA LOAD STEP, 2.5A/s 0.8 0.6 0.4 2 0 VOUT B W 0 2 4 6 8 10 M200ns A CH1 T 500.000ns 108mA Figure 28. Output Transient Response, COUT = 4.7 F 07716-126 BIAS VOLTAGE (V) VOUT = 1.8V CIN = COUT = 4.7F CH1 200mA CH2 50.0mV 07716-025 0.2 Figure 29. Capacitance vs. Bias Voltage Characteristics Use Equation 1 to determine the worst-case capacitance accounting for capacitor variation over temperature, component tolerance, and voltage. CEFF = CBIAS x (1 - TEMPCO) x (1 - TOL) where: CBIAS is the effective capacitance at the operating voltage. TEMPCO is the worst-case capacitor temperature coefficient. TOL is the worst-case component tolerance. Rev. C | Page 12 of 20 (1) Data Sheet ADP170/ADP171 In this example, the worst-case temperature coefficient (TEMPCO) over -40C to +85C is assumed to be 15% for an X5R dielectric. The tolerance of the capacitor (TOL) is assumed to be 10%, and CBIAS is 0.94 F at 1.8 V, as shown in Figure 29. The EN pin active/inactive thresholds are derived from the VIN voltage. Therefore, these thresholds vary with changing input voltage. Figure 31 shows typical EN active/inactive thresholds when the input voltage varies from 1.6 V to 3.6 V. 1.2 Substituting these values in Equation 1 yields CEFF = 0.94 F x (1 - 0.15) x (1 - 0.1) = 0.719 F 0.8 3.60 3.45 3.30 3.15 3.00 2.85 VIN (V) Figure 31. Typical EN Pin Thresholds vs. Input Voltage The ADP170/ADP171 utilize an internal soft start to limit the inrush current when the output is enabled. The start-up time for the 1.8 V option is approximately 120 s from the time the EN active threshold is crossed to when the output reaches 90% of its final value. As shown in Figure 32, the start-up time is dependent on the output voltage setting. EN 3.5 VOUT = 3.0V 3.0 2.5 VOUT 2.70 2.55 2.40 2.25 2.10 0.4 1.50 The ADP170/ADP171 have an internal undervoltage lockout circuit that disables all inputs and the output when the input voltage is less than approximately 1.2 V. This ensures that the ADP170/ADP171 inputs and the output behave in a predictable manner during power-up. 07716-129 0.6 0.5 The ADP170/ADP171 use the EN pin to enable and disable the VOUT pin under normal operating conditions. As shown in Figure 30, when a rising voltage on EN crosses the active threshold, VOUT turns on. When a falling voltage on EN crosses the inactive threshold, VOUT turns off. EN INACTIVE 0.7 UNDERVOLTAGE LOCKOUT ENABLE FEATURE EN ACTIVE 0.9 1.95 To guarantee the performance of the ADP170/ADP171, it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors are evaluated for each application. 1.0 1.80 Therefore, the capacitor chosen in this example meets the minimum capacitance requirement of the LDO over temperature and tolerance at the chosen output voltage. 1.65 TYPICAL EN TRESHOLDS (V) 1.1 VOUT = 1.8V 2.0 VOUT = 0.8V 1 2 1.5 07716-130 1.0 07716-230 0.5 0 0 0.2 0.4 0.6 0.8 VEN 1.0 1.2 1.4 CH1 1.00V CH2 1.00V B W M20.0s A CH1 T 79.8000s Figure 32. Typical Start-Up Time 1.6 Figure 30. ADP170/ADP171 Typical EN Pin Operation As shown in Figure 30, the EN pin has hysteresis built in. This prevents on/off oscillations that can occur due to noise on the EN pin as it passes through the threshold points. Rev. C | Page 13 of 20 2.72V ADP170/ADP171 Data Sheet CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION The junction temperature of the ADP170/ADP171 can be calculated from the following equation: where: TA is the ambient temperature. PD is the power dissipation in the die, given by PD = [(VIN - VOUT) x ILOAD] + (VIN x IGND) where: ILOAD is the load current. IGND is the ground current. VIN and VOUT are input and output voltages, respectively. Power dissipation due to ground current is quite small and can be ignored. Therefore, the junction temperature equation simplifies to the following: TJ = TA + {[(VIN - VOUT) x ILOAD] x JA} THERMAL CONSIDERATIONS 140 TJ MAX 120 Table 6. Typical JA Values JA (C/W) 170 152 146 134 131 ILOAD = 300mA 100 80 ILOAD = 150mA 60 ILOAD = 100mA 40 ILOAD = 25mA 20 ILOAD = 1mA 0 0.5 1.0 1.5 ILOAD = 10mA 2.0 2.5 Figure 33. 500 mm2 of PCB Copper, TA = 25C 140 TJ MAX 120 ILOAD = 300mA 100 ILOAD = 150mA 80 60 ILOAD = 100mA 40 ILOAD = 25mA 20 Device soldered to minimum size pin traces. ILOAD = 10mA ILOAD = 1mA 0 0.5 1.0 1.5 2.0 2.5 VOUT - VIN (V) Figure 34. 100 mm2 of PCB Copper, TA = 25C Rev. C | Page 14 of 20 3.0 VOUT - VIN (V) JUNCTION TEMPERATURE (C) To guarantee reliable operation, the junction temperature of the ADP170/ADP171 must not exceed 125C. To ensure the junction temperature stays below this maximum value, the user needs to be aware of the parameters that contribute to junction temperature changes. These parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction and ambient air (JA). The JA number is dependent on the package assembly compounds used and the amount of copper to which the GND pin of the package is soldered on the PCB. Table 6 shows typical JA values of the 5-lead TSOT package for various PCB copper sizes. 1 (4) As shown in Equation 4, for a given ambient temperature, input to output voltage differential, and continuous load current, there exists a minimum copper size requirement for the PCB to ensure that the junction temperature does not rise above 125C. Figure 33 to Figure 38 show junction temperature calculations for different ambient temperatures, load currents, VIN to VOUT differentials, and areas of PCB copper. Current and thermal limit protections are intended to protect the device against accidental overload conditions. Copper Size (mm2) 01 50 100 300 500 (3) 07716-028 Consider the case where a hard short from VOUT to GND occurs. At first, the ADP170/ADP171 will limit the current so that only 450 mA is conducted into the short. If self-heating of the junction is great enough to cause its temperature to rise above 150C, thermal shutdown will activate, turning off the output and reducing the output current to 0. As the junction temperature cools and drops below 135C, the output turns on and conducts 450 mA into the short, again causing the junction temperature to rise above 150C. This thermal oscillation between 135C and 150C causes a current oscillation between 450 mA and 0 mA, which continues as long as the short remains at the output. (2) 07716-029 Thermal overload protection is included, which limits the junction temperature to a maximum of 150C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation), when the junction temperature starts to rise above 150C, the output is turned off, reducing the output current to 0. When the junction temperature drops below 135C, the output is turned on again and output current is restored to its nominal value. TJ = TA + (PD x JA) JUNCTION TEMPERATURE (C) The ADP170/ADP171 are protected against damage due to excessive power dissipation by current and thermal overload protection circuits. The ADP170/ADP171 are designed to limit the current when the output load reaches 450 mA (typical). When the output load exceeds 450 mA, the output voltage is reduced to maintain a constant current limit. 3.0 Data Sheet ADP170/ADP171 140 140 TJ MAX TJ MAX 120 JUNCTION TEMPERATURE (C) ILOAD = 300mA 100 80 ILOAD = 150mA 60 ILOAD = 100mA 40 ILOAD = 25mA ILOAD = 1mA 0 0.5 1.0 ILOAD = 10mA 1.5 2.0 2.5 ILOAD = 150mA 100 ILOAD = 100mA 80 ILOAD = 25mA 60 40 ILOAD = 1mA 0 0.5 3.0 1.0 1.5 Figure 35. 0 mm2 of PCB Copper, TA = 25C ILOAD = 300mA ILOAD = 150mA 80 ILOAD = 100mA TJ = TB + (PD x JB) ILOAD = 25mA 140 ILOAD = 10mA ILOAD = 1mA 120 07716-031 20 1.5 2.0 2.5 3.0 VOUT - VIN (V) 140 TJ MAX 120 ILOAD = 300mA 80 80 60 40 ILOAD ILOAD ILOAD ILOAD = 1mA = 10mA = 50mA = 100mA ILOAD = 150mA ILOAD = 250mA ILOAD = 300mA TJ MAX 20 ILOAD = 150mA 100 100 0 0.4 ILOAD = 100mA 07716-034 1.0 Figure 36. 500 mm2 of PCB Copper, TA = 50C 0.8 1.2 1.6 2.0 VIN - VOUT (V) ILOAD = 25mA 60 40 ILOAD = 1mA Figure 39. TSOT, TA = 85C ILOAD = 10mA 20 0 0.5 07716-032 JUNCTION TEMPERATURE (C) (5) The typical value of JB is 42.8C/W for the 5-lead TSOT package. JUNCTION TEMPERATURE (C) JUNCTION TEMPERATURE (C) 120 0 0.5 3.0 In cases where board temperature is known, use the thermal characterization parameter, JB, to estimate the junction temperature rise (see Figure 39). Maximum junction temperature (TJ) is calculated from the board temperature (TB) and power dissipation (PD) using the following formula: TJ MAX 40 2.5 Figure 38. 0 mm2 of PCB Copper, TA = 50C 140 60 2.0 VOUT - VIN (V) VIN - VOUT (V) 100 ILOAD = 10mA 20 07716-030 20 ILOAD = 300mA 07716-033 JUNCTION TEMPERATURE (C) 120 1.0 1.5 2.0 2.5 3.0 VOUT - VIN (V) Figure 37. 100 mm2 of PCB Copper, TA = 50C Rev. C | Page 15 of 20 2.4 2.8 ADP170/ADP171 Data Sheet PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS GND GND ANALOG DEVICES ADP171-x.x-EVALZ Heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the ADP170/ADP171. However, as can be seen from Table 6, a point of diminishing returns is eventually reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. C1 C2 U1 Place the input capacitor as close as possible to the VIN and GND pins. Place the output capacitor as close as possible to the VOUT and GND pins. Use of 0402 or 0603 size capacitors and resistors achieves the smallest possible footprint solution on boards where area is limited. J1 R1 VIN VOUT R2 ANALOG DEVICES ADP170-x.x-EVALZ GND EN Figure 41. Example ADP171 PCB Layout C1 C2 U1 J1 VIN EN G ND 07716-035 G ND VO UT Figure 40. Example ADP170 PCB Layout Rev. C | Page 16 of 20 GND 07716-036 G ND GND Data Sheet ADP170/ADP171 OUTLINE DIMENSIONS 2.90 BSC 5 4 2.80 BSC 1.60 BSC 1 2 3 0.95 BSC 1.90 BSC *0.90 MAX 0.70 MIN 0.10 MAX 0.50 0.30 0.20 0.08 SEATING PLANE 8 4 0 0.60 0.45 0.30 *COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS. 100708-A *1.00 MAX Figure 42. 5-Lead Thin Small Outline Transistor Package [TSOT] (UJ-5) Dimensions show in millimeters ORDERING GUIDE Model 1 ADP170AUJZ-1.2-R7 ADP170AUJZ-1.25-R7 ADP170AUJZ-1.5-R7 ADP170AUJZ-1.8-R7 ADP170AUJZ-2.5-R7 ADP170AUJZ-2.8-R7 ADP171AUJZ-R7 ADP170-1.8-EVALZ ADP171-EVALZ 1 2 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Output Voltage (V) 2 1.2 1.25 1.5 1.8 2.5 2.8 0.8 to 3.0 (Adjustable) Package Description 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT Evaluation Board Evaluation Board Z = RoHS Compliant Part. For additional voltage options, contact your local Analog Devices, Inc., sales or distribution representative. Rev. C | Page 17 of 20 Package Option UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 Branding L8E LQD L8F L8G L8H L8P L9A ADP170/ADP171 Data Sheet NOTES Rev. C | Page 18 of 20 Data Sheet ADP170/ADP171 NOTES Rev. C | Page 19 of 20 ADP170/ADP171 Data Sheet NOTES (c)2009-2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07716-0-1/14(C) Rev. C | Page 20 of 20 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Analog Devices Inc.: ADP170AUJZ-2.8-R7 ADP170-1.8-EVALZ ADP170AUJZ-1.8-R7 ADP170AUJZ-2.5-R7 ADP171AUJZ-R7 ADP171EVALZ ADP170AUJZ-1.2-R7 ADP170AUJZ-1.5-R7 ADP170AUJZ-1.25-R7