SP3243 (R) 3 Driver/5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers FEATURES Meets true EIA/TIA-232-F Standards from a +3.0V to +5.5V power supply Interoperable with EIA/TIA-232 and adheres to EIA/TIA-562 down to a +2.7V power source AUTO ON-LINE(R) circuitry automatically wakes up from a 1A shutdown Regulated Charge Pump Yields Stable RS-232 Outputs Regardless of VCC Variations Enhanced ESD Specifications: +15kV Human Body Model +15kV IEC1000-4-2 Air Discharge +8kV IEC1000-4-2 Contact Discharge 250 Kbps min. transmission rate (EB) 1000 Kbps min. transmission rate (EU) Ideal for High Speed RS-232 Applications C2+ 1 28 C1+ C2- 2 27 V+ 3 26 VCC VR1IN 4 25 GND R2IN 5 24 C1- R3IN 6 R4IN 7 SP3243 23 ONLINE 22 SHUTDOWN 21 STATUS R5IN 8 T1OUT 9 20 R2OUT T2OUT 10 19 R1OUT T3OUT 11 18 R2OUT T3IN 12 17 R3OUT T2IN 13 16 R4OUT T1IN 14 15 R5OUT Now Available in Lead Free Packaging DESCRIPTION The SP3243 products are 3 driver/5 receiver RS-232 transceiver solutions intended for portable or handheld applications such as notebook and palmtop computers. The SP3243 includes one complementary receiver that remains alert to monitor an external device's Ring Indicate signal while the device is shutdown. The SP3243E and EB devices feature slew-rate limited outputs for reduced crosstalk and EMI. The "U" and "H" series are optimized for high speed with data rates up to 1Mbps, easily meeting the demands of high speed RS-232 applications. The SP3243 series uses an internal high-efficiency, charge-pump power supply that requires only 0.1F capacitors in 3.3V operation. This charge pump and Sipex's driver architecture allow the SP3243 series to deliver compliant RS-232 performance from a single power supply ranging from +3.0V to +5.5V. The AUTO ON-LINE(R) feature allows the device to automatically "wake-up" during a shutdown state when an RS-232 cable is connected and a connected peripheral is turned on. Otherwise, the device automatically shuts itself down drawing less than 1A. SELECTION TABLE Power Supplies RS-232 Drivers RS-232 Receivers External Components AUTO ON-LINE(R) Circuitry TTL 3State # of Pins Gauranteed Data Rate ESD Rating SP3243 +3.0V to +5.5V 3 5 4 capacitors YES YES 28 120 2kV SP3243E +3.0V to +5.5V 3 5 4 capacitors YES YES 28 120 15kV Device SP3243B +3.0V to +5.5V 3 5 4 capacitors YES YES 28 250 2kV SP3243EB +3.0V to +5.5V 3 5 4 capacitors YES YES 28 250 15kV SP3243U +3.0V to +5.5V 3 5 4 capacitors YES YES 28 1000 2kV SP3243EU +3.0V to +5.5V 3 5 4 capacitors YES YES 28 1000 15kV Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 1 (c) Copyright 2006 Sipex Corporation ABSOLUTE MAXIMUM RATINGS Power Dissipation per package These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. VCC.......................................................-0.3V to +6.0V V+ (NOTE 1).......................................-0.3V to +7.0V V- (NOTE 1)........................................+0.3V to -7.0V V+ + |V-| (NOTE 1)...........................................+13V ICC (DC VCC or GND current).........................+100mA 28-pin SOIC (derate 12.7mW/oC above +70oC)....1000mW 28-pin SSOP (derate 11.2mW/oC above +70oC).....900mW 28-pin TSSOP (derate 13.2mW/oC above +70oC)......1059mW 32-pin MLPQ (derate 29.4mW/oC above +70oC)........2352mW NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V. Input Voltages TxIN, ONLINE,SHUTDOWN, ...........-0.3V to Vcc +6.0V RxIN...................................................................+15V Output Voltages TxOUT.............................................................+13.2V RxOUT, STATUS.......................-0.3V to (VCC +0.3V) Short-Circuit Duration TxOUT....................................................Continuous Storage Temperature......................-65C to +150C ELECTRICAL CHARACTERISTICS Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX, C1 - C4 = 0.1F. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25C. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS DC CHARACTERISTICS Supply Current,AUTO ON-LINE(R) 1.0 10 A All RxIN open, ONLINE = GND, SHUTDOWN = VCC, VCC = +3.3V, TAMB = +25C, TxIN = GND or VCC Supply Current, Shutdown 1.0 10 A SHUTDOWN = GND, VCC = +3.3V, TAMB = +25C, TxIN = VCC or GND Supply Current, AUTO ON-LINE(R) Disabled 0.3 1.0 mA ONLINE = SHUTDOWN = VCC, no load, VCC = +3.3V, TAMB = +25C, TxIN = GND or VCC 0.8 V V LOGIC INPUTS AND RECEIVER OUTPUTS Input Logic Threshold LOW HIGH 2.4 VCC = +3.3V or +5.0V, TxIN, ONLINE, SHUTDOWN Input Leakage Current 0.01 1.0 A TxIN, ONLINE, SHUTDOWN, TAMB = +25C, VIN = 0V to VCC Output Leakage Current 0.05 10 A Receivers disabled, VOUT = 0V to VCC 0.4 V IOUT = 1.6mA V IOUT = -1.0mA V All driver outputs loaded with 3K to GND, TAMB = +25C Output Voltage LOW Output Voltage HIGH VCC - 0.6 VCC - 0.1 DRIVER OUTPUTS Output Voltage Swing 5.0 Output Resistance 300 Output Short-Circuit Current Output Leakage Current Date: 2/05/06 5.4 35 VCC = V+ = V- = 0V, VOUT = 2V 60 mA VOUT = 0V 25 A VCC = 0V or 3.0V to 5.5V, VOUT = 12V, Drivers disabled SP3243 +3.0V to +5.5V RS-232 Transceivers 2 (c) Copyright 2006 Sipex Corporation ELECTRICAL CHARACTERISTICS Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX, C1 - C4 = 0.1F. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25C. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS RECEIVER INPUTS Input Voltage Range -15 15 V Input Threshold LOW 0.6 1.2 V VCC = 3.3V Input Threshold LOW 0.8 1.5 V VCC = 5.0V Input Threshold HIGH 1.5 2.4 V VCC = 3.3V Input Threshold HIGH 1.8 2.4 V VCC = 5.0V Input Hysteresis 0.3 Input Resistance 3 5 V 7 k AUTO ON-LINE(R) CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = VCC) 25C STATUS Output Voltage LOW STATUS Output Voltage HIGH 0.4 VCC - 0.6 V IOUT = 1.6mA V IOUT = -1.0mA Receiver Threshold to Drivers Enabled (tONLINE) 350 S Figure 20 Receiver Positive or Negative Threshold to STATUS HIGH (tSTSH) 0.2 S Figure 20 Receiver Positive or Negative Threshold to STATUS LOW (tSTSL) 30 S Figure 20 TIMING CHARACTERISTICS Maximum Data Rate (U) (H) (B) (-) 1000 460 250 120 Receiver Propagation Delay tPHL tPLH Kbps 0.15 0.15 s RL = 3K, CL = 250pF, one driver active RL = 3K, CL = 1000pF, one driver active RL = 3K, CL = 1000pF, one driver active. RL = 3K, CL = 1000pF, one driver active Receiver input to Receiver output, CL = 150pF Receiver Output Enable Time 200 ns Normal operation Receiver Output Disable Time 200 ns Normal operation Driver Skew (E, EB) (EU) 100 50 ns | tPHL - tPLH | Receiver Skew 50 ns | tPHL - tPLH | Transition-Region Slew Rate (U) (EB) Date: 2/05/06 500 100 90 6 V/s 30 VCC = 3.3V, RL = 3K, TAMB = 25C, measurements taken from -3.0V to +3.0V or +3.0V to -3.0V SP3243 +3.0V to +5.5V RS-232 Transceivers 3 (c) Copyright 2006 Sipex Corporation TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all drivers loaded with 3k, 0.1F charge pump capacitors, and TAMB = +25C. 6 Transmitter Output Voltage (V) 200 Skew (ns) 150 100 T1 at 500Kbps T2 at 31.2Kbps All TX loaded 3K // CLoad 50 0 250 500 1000 1500 Load Capacitance (pF) 1Driver at 1Mbps Other Drivers at 62.5Kbps All Drivers Loaded with 3K // 250pF 0 -2 -4 2.7 2000 3 3.5 4 Supply Voltage (V) 4.5 5 Figure 2. Transmitter Output Voltage VS. Supply Voltage for the SP3243EU Figure 1. Transmitter Skew VS. Load Capacitance 40 6 Supply Current (mA) TxOUT + Transmitter Output Voltage (V) 2 -6 0 4 2 0 -2 -4 -6 4 TxOUT - 35 30 20Kbps 20 15 1 Transmitter at full Data Rate 10 2 Transmitters at 15.5 Kbps 5 All Transmitters loades 3K + Load Cap 0 0 2.7 3 3.5 4 120Kbps 250Kbps 25 4.5 1000 5 2000 3000 4000 5000 Load Capacitance (pF) Supply Voltage (VDC) Figure 3. Transmitter Output Voltage VS. Load Capacitance for the SP3243EU Figure 4. Supply Current VS. Load Capacitance for the SP3243EU 25 6 20 4 Transmitter Output Voltage (V) Supply Current (mA) TxOUT + 15 10 1 Transmitter at 250Kbps 2 Transmitters at 15.6Kbps All drivers loaded with 3K // 1000pF 5 2 0 -2 -4 -6 0 2.7 3 3.5 4 4.5 5 TxOUT - 2.7 3.5 4 4.5 5 Figure 6. Transmitter Output Voltage VS. Supply Voltage for the SP3243EU Figure 5. Supply Current VS. Supply Voltage for the SP3243EU Date: 2/05/06 3 Supply Voltage (VDC) Supply Voltage (VDC) SP3243 +3.0V to +5.5V RS-232 Transceivers 4 (c) Copyright 2006 Sipex Corporation TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all drivers loaded with 3k, 0.1F charge pump capacitors, and TAMB = +25C. 6 25 TxOUT + Slew rate (V/s) Transmitter Output Voltage (V) 4 2 0 -2 TxOUT - -4 -6 0 1000 2000 20 - Slew + Slew 15 10 1 Transmitter at 250Kbps 2 Transmitter at 15.6Kbps All drivers loaded 3K + Load Cap 5 3000 4000 0 5000 0 500 2000 3000 4000 5000 Figure 8. Slew Rate VS. Load Capacitance Figure 7. Transmitter Output Voltage VS. Load Capacitance 25 40 35 30 Supply Current (mA) Supply Current (mA) 1000 Load Capacitance (pF) Load Capacitance (pF) 120Kbps 250Kbps 25 20Kbps 20 15 1 Transmitter at full Data Rate 10 2 Transmitters at 15.5 Kbps 5 20 15 10 1 Transmitter at 250Kbps 2 Transmitters at 15.6Kbps All drivers loaded with 3K // 1000pF 5 All Transmitters loades 3K + Load Cap 0 0 1000 2000 3000 4000 0 5000 2.7 Load Capacitance (pF) 3.5 4 4.5 5 Supply Voltage (VDC) Figure 10. Supply Current VS. Supply Voltage Figure 9. Supply Current VS. Load Capacitance Date: 2/05/06 3 SP3243 +3.0V to +5.5V RS-232 Transceivers 5 (c) Copyright 2006 Sipex Corporation PIN NUMBER SP3243EUCR NAME FUNCTION SP3243EU MLPQ EN Receiver Enable. Apply logic LOW for normal operation. Apply logic HIGH to disable the receiver outputs (high-Z state). - - C1+ Positive terminal of the voltage doubler charge-pump capacitor. 28 28 V+ Regulated +5.5V output generated by the charge pump. 27 26 C1- Negative terminal of the voltage doubler charge-pump capacitor. 24 22 C2+ Positive terminal of the inverting charge-pump capacitor. 1 29 C2- Negative terminal of the inverting charge-pump capacitor. 2 31 Regulated -5.5V output generated by the charge pump. 3 32 R1IN RS-232 receiver input. 4 2 R2IN RS-232 receiver input. 5 3 R3IN RS-232 receiver input. 6 4 R4IN RS-232 receiver input. 7 5 R5IN RS-232 receiver input. 8 6 R1OUT TTL/CMOS receiver output. 19 17 R2OUT TTL/CMOS receiver output. 18 16 R2OUT Non-inverting receiver-2 output, active in shutdown. 20 18 R3OUT TTL/CMOS receiver output. 17 15 R4OUT TTL/CMOS receiver output. 16 14 R5OUT TTL/CMOS receiver output. 15 13 TTL/CMOS Output indicating online and shutdown status. 21 19 T1IN TTL/CMOS driver input. 14 12 T2IN TTL/CMOS driver input. 13 11 T3IN TTL/CMOS driver input. 12 10 Apply logic HIGH to override Auto-Online circuitry keeping drivers active (SHUTDOWN must also be logic HIGH, refer to Table 2). 23 21 T1OUT RS-232 driver output. 9 7 T2OUT RS-232 driver output. 10 8 T3OUT RS-232 driver output. 11 9 Ground. 25 23 +3.0V to +5.5V supply voltage. 26 25 22 20 - 1,24,27,30 V- STATUS ONLINE GND VCC SHUTDOWN Apply logic LOW to shut down drivers and charge pump. This overrides all AUTO ON-LINE(R) circuitry and ONLINE (refer to Table 2). NC No Connection Table 1. Device Pin Description Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 6 (c) Copyright 2006 Sipex Corporation VCC C5 C1 + + 26 0.1F VCC 28 C1+ 0.1F V+ C3 C2 0.1F TTL/CMOS INPUTS + 24 C11 C2+ + 27 SP3243 V- 0.1F 3 C4 2 C214 T1IN T1OUT 13 T2IN T2OUT 10 12 T3IN T3OUT 11 + 0.1F 9 RS-232 OUTPUTS 20 R2OUT 19 R1OUT R1IN 4 R2IN 5 R3IN 6 R4IN 7 R5IN 8 5K 18 R2OUT 5K TTL/CMOS OUTPUTS 17 R3OUT RS-232 INPUTS 5K 16 R4OUT 5K 15 R5OUT VCC 22 23 To P Supervisor Circuit 5K SHUTDOWN ONLINE 21 STATUS GND 25 25 26 27 28 29 30 1 24 2 (R) 23 3 22 4 21 5 20 SP3243 6 19 16 15 14 13 NC GND C1ONLINE SHUTDOWN STATUS R2OUT R1OUT T3OUT T3IN T2IN T1IN R5OUT R4OUT R3OUT R2OUT 12 17 11 18 8 10 7 9 NC R1IN R2IN R3IN R4IN R5IN T1OUT T2OUT 31 32 VC2NC C2+ C1+ NC V+ VCC Figure 15. SP3243 Typical Operating Circuit Figure 13. SP3243 QFN Pinout Configuration Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 7 (c) Copyright 2006 Sipex Corporation DESCRIPTION AUTO ON-LINE(R) circuitry which reduces the power supply drain to a 1A supply current. In many portable or hand-held applications, an RS232 cable can be disconnected or a connected peripheral can be turned off. Under these conditions, the internal charge pump and the drivers will be shut down. Otherwise, the system automatically comes online. This feature allows design engineers to address power saving concerns without major design changes. The SP3243 transceivers meet the EIA/TIA-232 and ITU-T V.28/V.24 communication protocols and can be implemented in battery-powered, portable, or hand-held applications such as notebook or palmtop computers. The SP3243 devices feature Sipex's proprietary and patented (U.S.-- 5,306,954) on-board charge pump circuitry that generates 5.5V RS-232 voltage levels from a single +3.0V to +5.5V power supply. The SP3243EU devices can operate at a data rate of 1000kbps fully loaded. THEORY OF OPERATION The SP3243 series is made up of four basic circuit blocks: 1. Drivers 2. Receivers 3. the Sipex proprietary charge pump, and 4. AUTO ON-LINE(R) circuitry. The SP3243 is a 3-driver/5-receiver device, ideal for portable or hand-held applications. The SP3243 includes one complementary always-active receiver that can monitor an external device (such as a modem) in shutdown. This aids in protecting the UART or serial controller IC by preventing forward biasing of the protection diodes where VCC may be disconnected. Drivers The drivers are inverting level transmitters that convert TTL or CMOS logic levels to 5.0V EIA/ TIA-232 levels with an inverted sense relative to the input logic levels. Typically, the RS-232 output voltage swing is +5.4V with no load and +5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without degradation in reliability. These drivers comply with the EIA-TIA-232-F and all previous RS-232 versions. Unused drivers inputs should be connected to GND or VCC. The SP3243 series is an ideal choice for power sensitive designs. The SP3243 devices feature VCC + C5 + C1 26 VCC 0.1F 28 C1+ V+ 27 0.1F C3 + 0.1F 24 C11 C2+ SP3243 V- 3 14 T1IN T1OUT 9 RTS 13 T2IN T2OUT 10 DTR 12 T3IN T3OUT 11 C2 + 0.1F TxD C4 2 C2- + 0.1F RS-232 OUTPUTS The drivers have a minimum data rate of 250kbps (EB) or 1000kbps (EU) fully loaded. 20 R2OUT UART or Serial C RxD 19 R1OUT CTS 18 R2OUT DSR 17 R3OUT R1IN 4 5K R2IN 5 R3IN 6 Figure 17 shows a loopback test circuit used to test the RS-232 Drivers. Figure 18 shows the test results where one driver was active at 1Mbps and all three drivers loaded with an RS-232 receiver in parallel with a 250pF capacitor. Figure 19 5K 5K DCD 16 R4OUT R4IN 7 R5IN 8 RS-232 INPUTS 5K RI 15 VCC 22 23 R5OUT 5K SHUTDOWN ONLINE 21 STATUS GND 25 RESET P Supervisor IC VIN Figure 16. Interface Circuitry Controlled by Microprocessor Supervisory Circuit Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 8 (c) Copyright 2006 Sipex Corporation +3V to +5V DEVICE: SP3243EU C5 SHUTDOWN TXOUT RXOUT R2OUT C1 + + 0.1F VCC C1+ V+ 0.1F C3 + 0.1F C1- 0 High Z High Z Active C2+ C2 + SP3243 VC4 0.1F C2- 1 Active Active Active T1IN T1OUT TXIN TXOUT + 0.1F TTL/CMOS INPUTS Table 2. SHUTDOWN Truth Tables Note: In AUTO ON-LINE(R) Mode where ONLINE = GND and SHUTDOWN = VCC, the device will shut down if there is no activity present at the Receiver inputs. R1IN R1OUT TTL/CMOS OUTPUTS 5k RXIN RXOUT 5k 1000pF VCC 1000pF SHUTDOWN ONLINE To P Supervisor Circuit STATUS GND Figure 17. Loopback Test Circuit for RS-232 Driver Data Transmission Rates shows the test results of the loopback circuit with all drivers active at 250kbps with typical RS-232 loads in parallel with 1000pF capacitors. A superior RS-232 data transmission rate of 1Mbps makes the SP3243EU an ideal match for high speed LAN and personal computer peripheral applications. Receivers The receivers convert +5.0V EIA/TIA-232 levels to TTL or CMOS logic output levels. Receivers are active when the AUTO ON-LINE(R) circuitry is enabled or when in shutdown. During the shutdown, the receivers will continue to be active. If there is no activity present at the receivers for a period longer than 100s or when SHUTDOWN is enabled, the device goes into a standby mode where the circuit draws 1A. The Figure 18. Loopback Test results at 1Mbps Figure 19. Loopback Test results at 250Kbps Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 9 (c) Copyright 2006 Sipex Corporation -- VSS charge storage -- During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to VCC. Cl+ is then switched to GND and the charge in C1- is transferred to C2-. Since C2+ is connected to VCC, the voltage potential across capacitor C2 is now 2 times VCC. truth table logic of the SP3243 driver and receiver outputs can be found in Table 2. The SP3243 includes an additional non-inverting receiver with an output R2OUT. R2OUT is an extra output that remains active and monitors activity while the other receiver outputs are forced into high impedance. This allows Ring Indicator (RI) from a peripheral to be monitored without forward biasing the TTL/CMOS inputs of the other devices connected to the receiver outputs. Phase 2 -- VSS transfer -- Phase two of the clock connects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to GND. This transfers a negative generated voltage to C 4 . This generated voltage is regulated to a minimum voltage of -5.5V. Simultaneous with the transfer of the voltage to C4, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND. Since receiver input is usually from a transmission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mV. This ensures that the receiver is virtually immune to noisy transmission lines. Should an input be left unconnected, an internal 5K pulldown resistor to ground will commit the output of the receiver to a HIGH state. Phase 3 -- VDD charge storage -- The third phase of the clock is identical to the first phase -- the charge transferred in C1 produces -VCC in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at VCC, the voltage potential across C2 is 2 times VCC. Charge Pump The charge pump is a Sipex-patented design (U.S. 5,306,954) and uses a unique approach compared to older less-efficient designs. The charge pump still requires four external capacitors, but uses a four-phase voltage shifting technique to attain symmetrical 5.5V power supplies. The internal power supply consists of a regulated dual charge pump that provides output voltages 5.5V regardless of the input voltage (VCC) over the +3.0V to +5.5V range. This is important to maintain compliant RS-232 levels regardless of power supply fluctuations. Phase 4 -- VDD transfer -- The fourth phase of the clock connects the negative terminal of C2 to GND, and transfers this positive generated voltage across C2 to C3, the VDD storage capacitor. This voltage is regulated to +5.5V. At this voltage, the internal oscillator is disabled. Simultaneous with the transfer of the voltage to C3, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND, allowing the charge pump cycle to begin again. The charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. The charge pump operates in a discontinuous mode using an internal oscillator. If the output voltages are less than a magnitude of 5.5V, the charge pump is enabled. If the output voltages exceed a magnitude of 5.5V, the charge pump is disabled. This oscillator controls the four phases of the voltage shifting. A description of each phase follows. Since both V+ and V- are separately generated from VCC, in a no-load condition V+ and V- will be symmetrical. Older charge pump approaches that generate V- from V+ will show a decrease in the magnitude of V- compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at greater than 250kHz. The external capacitors can be as low as 0.1F with a 16V breakdown voltage rating. Phase 1 Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 10 (c) Copyright 2006 Sipex Corporation Minimum recommended charge pump capacitor value Input Voltage VCC Charge pump capacitor value for SP32XX C1 - C4 = 0.1uF 3.0V to 3.6V 4.5V to 5.5V C1 = 0.047uF, C2-C4 = 0.33uF 3.0V to 5.5V C1 - C4 = 0.22uF The Sipex-patented charge pumps are designed to operate reliably with a range of low cost capacitors. Either polarized or non polarized capacitors may be used. If polarized capacitors are used they should be oriented as shown in the Typical Operating Circuit. The V+ capacitor may be connected to either ground or Vcc. reduces ripple on the transmitter outputs and may slightly reduce power consumption. C2, C3, and C4 can be increased without changing C1's value. For best charge pump efficiency locate the charge pump and bypass capacitors as close as possible to the IC. Surface mount capacitors are best for this purpose. Using capacitors with lower equivalent series resistance (ESR) and selfinductance, along with minimizing parasitic PCB trace inductance will optimize charge pump operation. Designers are also advised to consider that capacitor values may shift over time and operating temperature. The charge pump operates with 0.1F capacitors for 3.3V operation. For other supply voltages, see the table for required capacitor values. Do not use values smaller than those listed. Increasing the capacitor values (e.g., by doubling in value) AUTO ONLINE CIRCUITRY The SP3243 devices have a patent pending AUTO ON-LINE(R) circuitry on board that saves power in applications such as laptop computers, palmtop (PDA) computers and other portable systems. input typically sees at least +3V, which are generated from the transmitters at the other end of the cable with a +5V minimum. When the external transmitters are disabled or the cable is disconnected, the receiver inputs will be pulled down by their internal 5k resistors to ground. When this occurs over a period of time, the internal transmitters will be disabled and the device goes into a shutdown or standy mode. When ONLINE is HIGH, the AUTO ON-LINE(R) mode is disabled. The SP3243 devices incorporate an AUTO ONLINE(R) circuit that automatically enables itself when the external transmitters are enabled and the cable is connected. Conversely, the AUTO ON-LINE(R) circuit also disables most of the internal circuitry when the device is not being used and goes into a standby mode where the device typically draws 1mA. This function can also be externally controlled by the ONLINE pin. When this pin is tied to a logic LOW, the AUTO ON-LINE(R) function is active. Once active, the device is enabled until there is no activity on the receiver inputs. The receiver Date: 2/05/06 The AUTO ON-LINE(R) circuit has two stages: 1) Inactive Detection 2) Accumulated Delay SP3243 +3.0V to +5.5V RS-232 Transceivers 11 (c) Copyright 2006 Sipex Corporation S H U T RECEIVER +2.7V 0V RS-232 INPUT VOLTAGES -2.7V D O W N VCC STATUS 0V tSTSL tSTSH tONLINE +5V DRIVER RS-232 OUTPUT VOLTAGES 0V -5V Figure 20. AUTO ON-LINE(R) Timing Waveforms The AUTO ON-LINE(R) mode can be disabled by the SHUTDOWN pin. If this pin is a logic LOW, the AUTO ON-LINE(R) function will not operate regardless of the logic state of the ONLINE pin. Table 3 summarizes the logic of the AUTO ONLINE(R) operating modes. The truth table logic of the SP3243 driver and receiver outputs can be found in Table 2. The first stage, shown in Figure 28, detects an inactive input. A logic HIGH is asserted on RXINACT if the cable is disconnected or the external transmitters are disabled. Otherwise, RXINACT will be at a logic LOW. This circuit is duplicated for each of the other receivers. The second stage of the AUTO ON-LINE(R) circuitry, shown in Figure 29, processes all the receiver's RXINACT signals with an accumulated delay that disables the device to a 1A supply current. The STATUS pin outputs a logic LOW signal if the device is shutdown. This pin goes to a logic HIGH when the external transmitters are enabled and the cable is connected. The STATUS pin goes to a logic LOW when the cable is disconnected, the external transmitters are disabled, or the SHUTDOWN pin is invoked. The typical accumulated delay is around 20s. When the SP3243 devices are shut down, the charge pumps are turned off. V+ charge pump output decays to VCC, the V- output decays to GND. The decay time will depend on the size of capacitors used for the charge pump. Once in shutdown, the time required to exit the shut down state and have valid V+ and V- levels is typically 200s. When the SP3243 drivers or internal charge pump are disabled, the supply current is reduced to 1A. This can commonly occur in hand-held or portable applications where the RS-232 cable is disconnected or the RS-232 drivers of the connected peripheral are turned off. Date: 2/05/06 For easy programming, the STATUS can be used to indicate DSR or a Ring Indicator signal. Tying ONLINE and SHUTDOWN together will bypass the AUTO ON-LINE(R) circuitry so this connection acts like a shutdown input pin. SP3243 +3.0V to +5.5V RS-232 Transceivers 12 (c) Copyright 2006 Sipex Corporation VCC = +5V C3 +5V + C1 + C2 - -5V - VDD Storage Capacitor + - + - VSS Storage Capacitor C4 -5V Figure 21. Charge Pump -- Phase 1 VCC = +5V C3 C1 + C2 - + - - + + - VDD Storage Capacitor VSS Storage Capacitor C4 -5.5V Figure 22. Charge Pump -- Phase 2 [ T ] +6V a) C2+ T 1 0V 2 2 0V b) C2T -6V Ch1 2.00V Ch2 2.00V M 1.00s Ch1 1.96V Figure 23. Charge Pump Waveforms VCC = +5V C3 +5V C1 + C2 - -5V + - - + + - VDD Storage Capacitor VSS Storage Capacitor C4 -5V Figure 24. Charge Pump -- Phase 3 VCC = +5V +5.5V C3 + C1 + - C2 - + - + - VDD Storage Capacitor VSS Storage Capacitor C4 Figure 25. Charge Pump -- Phase 4 Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 13 (c) Copyright 2006 Sipex Corporation The SP3243 driver outputs are able to maintain voltage under loading of up to 2.5mA per driver, ensuring sufficient output for mouse-driving applications. 4 -2 8.6 4.93 2.67 1.82 1.57 1.38 1.23 1.12 1.02 0.939 0.62 0 3.46 Vout+ Vout- 2 0.869 Transmitter Output Voltage [V] 6 VOUT + 0 -4 0 -6 Load Current Per Transmitter [mA] 1 VOUT - Figure 26. SP3243 Driver Output Voltages vs. Load Current per Transmitter + C5 VCC 26 0.1F VCC 28 C1+ + V+ 27 0.1F C1 + C3 0.1F 24 C11 C2+ SP3243 V- 3 + C2 0.1F C4 2 C214 T1IN T1OUT 13 T2IN T2OUT 10 12 T3IN T3OUT 11 + 0.1F 9 20 R2OUT R1IN 4 19 R1OUT 5K R2IN 5 18 R2OUT 5K R3IN 17 R3OUT 6 5K R4IN 7 16 R4OUT 5K 15 R5OUT VCC 22 23 To P Supervisor Circuit R5IN 8 5K DB-9 Connector SHUTDOWN ONLINE 21 STATUS 6 7 8 9 GND 25 DB-9 Connector Pins: 1. Received Line Signal Detector 2. Received Data 3. Transmitted Data 4. Data Terminal Ready 5. Signal Ground (Common) 6. 7. 8. 9. 1 2 3 4 5 DCE Ready Request to Send Clear to Send Ring Indicator Figure 27. Circuit for the connectivity of the SP3243 with a DB-9 connector Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 14 (c) Copyright 2006 Sipex Corporation RS-232 SIGNAL AT RECEIVER INPUT SHUTDOWN INPUT ONLINE INPUT STATUS OUTPUT TRANSCEIVER STATUS YES HIGH LOW - HIGH Normal Operation (Auto-Online) NO HIGH HIGH LOW Normal Operation NO HIGH LOW LOW Shutdown (Auto-Online) YES LOW HIGH-/ LOW HIGH Shutdown NO LOW HIGH-/ LOW LOW Shutdown Table 3. AUTO ON-LINE(R) Logic RXINACT Inactive Detection Block RS-232 Receiver Block RXIN RXOUT Figure 28. Stage I of AUTO ON-LINE(R) Circuitry Delay Stage Delay Stage Delay Stage Delay Stage Delay Stage STATUS R1INACT R2INACT R4INACT R3INACT R5INACT SHUTDOWN Figure 29. Stage II of AUTO ON-LINE(R) Circuitry Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 15 (c) Copyright 2006 Sipex Corporation normal usage. The transceiver IC receives most of the ESD current when the ESD source is applied to the connector pins. The test circuit for IEC1000-4-2 is shown on Figure 31. There are two methods within IEC1000-4-2, the Air Discharge method and the Contact Discharge method. ESD TOLERANCE The SP3243 series incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. The improved ESD tolerance is at least +15kV without damage nor latch-up. With the Air Discharge Method, an ESD voltage is applied to the equipment under test (EUT) through air. This simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. The high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system. This energy, whether discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage. Variables with an air discharge such as approach speed of the object carrying the ESD potential to the system and humidity will tend to change the discharge current. For example, the rise time of the discharge current varies with the approach speed. There are different methods of ESD testing applied: a) MIL-STD-883, Method 3015.7 b) IEC1000-4-2 Air-Discharge c) IEC1000-4-2 Direct Contact The Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also specified in MIL-STD-883, Method 3015.7 for ESD testing. The premise of this ESD test is to simulate the human body's potential to store electro-static energy and discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure 30. This method will test the IC's capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently. The Contact Discharge Method applies the ESD current directly to the EUT. This method was devised to reduce the unpredictability of the ESD arc. The discharge current rise time is constant since the energy is directly transferred without the air-gap arc. In situations such as hand held systems, the ESD charge can be directly discharged to the equipment from a person already holding the equipment. The current is transferred on to the keypad or the serial port of the equipment directly and then travels through the PCB and finally to the IC. The IEC-1000-4-2, formerly IEC801-2, is generally used for testing ESD on equipment and systems. For system manufacturers, they must guarantee a certain amount of ESD protection since the system itself is exposed to the outside environment and human presence. The premise with IEC1000-4-2 is that the system is required to withstand an amount of static electricity when ESD is applied to points and surfaces of the equipment that are accessible to personnel during RSS RC C SW2 SW2 SW1 CSS DC Power Source Device Under Test Figure 30. ESD Test Circuit for Human Body Model Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 16 (c) Copyright 2006 Sipex Corporation Contact-Discharge Module R RSS R RC C RV SW2 SW1 Device Under Test C CSS DC Power Source RS and RV add up to 330 330 ffor or IEC1000-4-2. Figure 31. ESD Test Circuit for IEC1000-4-2 i The circuit models in Figures30 and 31 represent the typical ESD testing circuit used for all three methods. The CS is initially charged with the DC power supply when the first switch (SW1) is on. Now that the capacitor is charged, the second switch (SW2) is on while SW1 switches off. The voltage stored in the capacitor is then applied through RS, the current limiting resistor, onto the device under test (DUT). In ESD tests, the SW2 switch is pulsed so that the device under test receives a duration of voltage. 30A 15A 0A For the Human Body Model, the current limiting resistor (RS) and the source capacitor (CS) are 1.5k an 100pF, respectively. For IEC-1000-42, the current limiting resistor (RS) and the source capacitor (CS) are 330 an 150pF, respectively. t=0ns t t=30ns Figure 32. ESD Test Waveform for IEC1000-4-2 The higher CS value and lower RS value in the IEC1000-4-2 model are more stringent than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW2 is switched on. The lower current limiting resistor increases the current charge onto the test point. DEVICE PIN TESTED HUMAN BODY MODEL Air Discharge Driver Outputs Receiver Inputs +15kV +15kV +15kV +15kV IEC1000-4-2 Direct Contact +8kV +8kV Level 4 4 Table 4. Transceiver ESD Tolerance Levels Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 17 (c) Copyright 2006 Sipex Corporation PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (WIDE) E H D A O e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) Date: 2/05/06 28-PIN A 0.090/0.104 (2.29/2.649) A1 0.004/0.012 (0.102/0.300) B 0.013/0.020 (0.330/0.508) D 0.697/0.713 (17.70/18.09) E 0.291/0.299 (7.402/7.600) e 0.050 BSC (1.270 BSC) H 0.394/0.419 (10.00/10.64) L 0.016/0.050 (0.406/1.270) O 0/8 (0/8) SP3243 +3.0V to +5.5V RS-232 Transceivers 18 (c) Copyright 2006 Sipex Corporation PACKAGE: 32 PIN QFN D E 4X O A2 A SEATING PLANE A1 A3 D2 NX K 32 PIN QFN JEDECMO220 ( V H H D -4 ) A Dimensions in (mm) NX L MIN NOM MAX 0.80 0.90 1.00 A1 0 0.02 0.05 A2 0 0.65 1.00 A3 0.20 REF D 5.00 BSC E 5.00 BSC 0.50 BSC e b 0.18 0.25 O 0 - D2 3.50 3.65 3.80 3.80 E2 3.50 3.65 0.35 0.40 0.45 K 0.20 - NX K 0.30 e 14 L N E2 NX b - 32 ND 8 NE 8 32 PIN QFN Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 19 (c) Copyright 2006 Sipex Corporation PACKAGE: 28 PIN SSOP D N SEE DETAIL "A" E1 2 INDEX AREA D x E1 2 2 1 E e 2 NX R R1 A Gauge Plane Seaing Plane A L O L1 DETAIL A 28 Pin SSOP JEDEC MO-150 (AH) Variation MIN NOM MAX SYMBOL A 2 A1 0.05 A2 1.65 1.75 1.85 b 0.22 0.38 c 0.09 0.25 D 9.9 10.2 10.5 E 7.4 7.8 8.2 E1 5 5.3 5.6 L 0.55 0.75 0.95 L1 1.25 REF o 0 4 8 e A2 A Seating Plane A1 b WITH LEAD FINISH 0.65 BSC Note: Dimensions in (mm) c BASE METAL b Section A-A Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 20 (c) Copyright 2006 Sipex Corporation PACKAGE: 28 PIN TSSOP D e O2 E1 E Seaing Plane L O3 L1 1 O1 DETAIL A 2 INDEX AREA D x E1 2 2 SEE DETAIL "A" A2 A Seating Plane b A1 B B 28 Pin TSSOP JEDEC MO-153 (AE) Variation MIN NOM MAX SYMBOL A 1.2 A1 0.05 0.15 A2 0.8 1 1.05 b 0.19 0.3 c 0.09 0.2 D 9.6 9.7 9.8 0.65 BSC e E 6.40 BSC E1 4.3 4.4 4.5 L 0.45 0.6 0.75 1.00 REF L1 O1 0 8 O2 12 REF O3 12 REF Note: Dimensions in (mm) Date: 2/05/06 b C Section B-B SP3243 +3.0V to +5.5V RS-232 Transceivers 21 (c) Copyright 2006 Sipex Corporation PRODUCT NOMENCLATURE SP 3243 E U EY L /TR Tape and Reel options Sipex "L" suffix indicates Lead Free packaging Package Type Part Number A= SSOP P= PDIP Y=TSSOP Temperature Range Speed Indicator ESD Rating C= Commercial Range 0C to 70C E= Extended Range -40C to 85C Blank= 120Kbps B= 250Kbps H= 450Kbps U= 1Mbps E= 15kV HBM and IEC 1000-4 CLICK HERE TO ORDER SAMPLES Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Corporation Solved by Sipex Date: 2/05/06 TM SP3243 +3.0V to +5.5V RS-232 Transceivers 22 (c) Copyright 2006 Sipex Corporation ORDERING INFORMATION Part Number Speed (kbps) Temp Range Package SP3243EBCA 250 -0 to 70C 28 Pin SSOP SP3243EBCA/TR 250 -0 to 70C 28 Pin SSOP SP3243EBCR 250 -0 to 70C 32 Pin QFN: see Note 2 SP3243EBCR/TR 250 -0 to 70C 32 Pin QFN: see Note 2 SP3243EBCT 250 -0 to 70C 28 Pin WSOIC SP3243EBCT/TR 250 -0 to 70C 28 Pin WSOIC SP3243EBCY 250 -0 to 70C 28 Pin TSSOP SP3243EBCY/TR 250 -0 to 70C 28 Pin TSSOP SP3243EBEA 250 -40 to 85C 28 Pin SSOP SP3243EBEA/TR 250 -40 to 85C 28 Pin SSOP SP3243EBET 250 -40 to 85C 28 Pin WSOIC SP3243EBET/TR 250 -40 to 85C 28 Pin WSOIC SP3243EBEY 250 -40 to 85C 28 Pin TSSOP SP3243EBEY/TR 250 -40 to 85C 28 Pin TSSOP SP3243ECA 120 -0 to 70C 28 Pin SSOP SP3243ECA/TR 120 -0 to 70C 28 Pin SSOP SP3243ECT 120 -0 to 70C 28 Pin WSOIC SP3243ECT/TR 120 -0 to 70C 28 Pin WSOIC SP3243ECY 120 -0 to 70C 28 Pin TSSOP SP3243ECY/TR 120 -0 to 70C 28 Pin TSSOP SP3243EEA 120 -40 to 85C 28 Pin SSOP SP3243EEA/TR 120 -40 to 85C 28 Pin SSOP SP3243EET 120 -40 to 85C 28 Pin WSOIC SP3243EET/TR 120 -40 to 85C 28 Pin WSOIC SP3243EEY 120 -40 to 85C 28 Pin TSSOP SP3243EEY/TR 120 -40 to 85C 28 Pin TSSOP SP3243EUCA 1000 -0 to 70C 28 Pin SSOP SP3243EUCA/TR 1000 -0 to 70C 28 Pin SSOP SP3243EUCR 1000 -0 to 70C 32 Pin QFN: see Note 2 SP3243EUCR/TR 1000 -0 to 70C 32 Pin QFN: see Note 2 SP3243EUCT 1000 -0 to 70C 28 Pin WSOIC SP3243EUCT/TR 1000 -0 to 70C 28 Pin WSOIC SP3243EUCY 1000 -0 to 70C 28 Pin TSSOP SP3243EUCY/TR 1000 -0 to 70C 28 Pin TSSOP SP3243EUEA 1000 -40 to 85C 28 Pin SSOP SP3243EUEA/TR 1000 -40 to 85C 28 Pin SSOP SP3243EUER 1000 -40 to 85C 32 Pin QFN: see Note 2 SP3243EUER/TR 1000 -40 to 85C 32 Pin QFN: see Note 2 SP3243EUET 1000 -40 to 85C 28 Pin WSOIC SP3243EUET/TR 1000 -40 to 85C 28 Pin WSOIC SP3243EUEY 1000 -40 to 85C 28 Pin TSSOP SP3243EUEY/TR 1000 -40 to 85C 28 Pin TSSOP Available in lead free packaging. To order add "-L" suffix to part number. Example: SP3243EUEA/TR = standard; SP3243EUEA-L/TR = lead free /TR = Tape and Reel. Pack quantity is 1,500 for SSOP, TSSOP and WSOIC. Note 2: Not recommended for New Designs in QFN Package. See Factory for Availability. Date: 2/05/06 SP3243 +3.0V to +5.5V RS-232 Transceivers 23 (c) Copyright 2006 Sipex Corporation ORDERING INFORMATION Contact factory for availability of the following legacy part numbers. For long term availability Sipex recommends upgrades as listed below. All upgrade part numbers shown are fully pinout and function compatible with legacy part numbers. Upgrade part numbers may contain feature and/or performance enhancements or other changes to datasheet parameters. Legacy Part Number SP3243BCA SP3243BCA/TR SP3243BCA-L SP3243BCA-L/TR SP3243BCR SP3243BCR/TR SP3243BCR-L SP3243BCR-L/TR SP3243BCT SP3243BCT/TR SP3243BCT-L SP3243BCT-L/TR SP3243BCY SP3243BCY/TR SP3243BCY-L SP3243BCY-L/TR SP3243BEA SP3243BEA/TR SP3243BEA-L SP3243BEA-L/TR SP3243BET SP3243BET/TR SP3243BET-L SP3243BET-L/TR SP3243BEY SP3243BEY/TR SP3243BEY-L SP3243BEY-L/TR SP3243CA SP3243CA/TR SP3243CA-L SP3243CA-L/TR SP3243CT SP3243CT/TR SP3243CT-L SP3243CT-L/TR SP3243EA SP3243EA/TR SP3243EA-L SP3243EA-L/TR SP3243ET SP3243ET/TR SP3243ET-L SP3243ET-L/TR Date: 2/05/06 Recommended Upgrade SP3243EBCA SP3243EBCA/TR SP3243EBCA-L SP3243EBCA-L/TR SP3243EBCR SP3243EBCR/TR SP3243EBCR-L SP3243EBCR-L/TR SP3243EBCT SP3243EBCT/TR SP3243EBCT-L SP3243EBCT-L/TR SP3243EBCY SP3243EBCY/TR SP3243EBCY-L SP3243EBCY-L/TR SP3243EBEA SP3243EBEA/TR SP3243EBEA-L SP3243EBEA-L/TR SP3243EBET SP3243EBET/TR SP3243EBET-L SP3243EBET-L/TR SP3243EBEY SP3243EBEY/TR SP3243EBEY-L SP3243EBEY-L/TR SP3243ECA SP3243ECA/TR SP3243ECA-L SP3243ECA-L/TR SP3243ECT SP3243ECT/TR SP3243ECT-L SP3243ECT-L/TR SP3243EEA SP3243EEA/TR SP3243EEA-L SP3243EEA-L/TR SP3243EET SP3243EET/TR SP3243EET-L SP3243EET-L/TR Legacy Part Number SP3243EHCA SP3243EHCA/TR SP3243EHCT SP3243EHCT/TR SP3243HCA SP3243HCA/TR SP3243HCA-L SP3243HCA-L/TR SP3243HCT SP3243HCT/TR SP3243HCT-L SP3243HCT-L/TR SP3243UCA SP3243UCA/TR SP3243UCA-L SP3243UCA-L/TR SP3243UCR SP3243UCR/TR SP3243UCR-L SP3243UCR-L/TR SP3243UCT SP3243UCT/TR SP3243UCT-L SP3243UCT-L/TR SP3243UCY SP3243UCY/TR SP3243UCY-L SP3243UCY-L/TR SP3243UEA SP3243UEA/TR SP3243UEA-L SP3243UEA-L/TR SP3243UER SP3243UER/TR SP3243UER-L SP3243UER-L/TR SP3243UET SP3243UET/TR SP3243UET-L SP3243UET-L/TR SP3243UEY SP3243UEY/TR SP3243UEY-L SP3243UEY-L/TR SP3243 +3.0V to +5.5V RS-232 Transceivers 24 Recommended Upgrade SP3243EUCA SP3243EUCA/TR SP3243EUCT SP3243EUCT/TR SP3243EUCA SP3243EUCA/TR SP3243EUCA-L SP3243EUCA-L/TR SP3243EUCT SP3243EUCT/TR SP3243EUCT-L SP3243EUCT-L/TR SP3243EUCA SP3243EUCA/TR SP3243EUCA-L SP3243EUCA-L/TR SP3243EUCR SP3243EUCR/TR SP3243EUCR-L SP3243EUCR-L/TR SP3243EUCT SP3243EUCT/TR SP3243EUCT-L SP3243EUCT-L/TR SP3243EUCY SP3243EUCY/TR SP3243EUCY-L SP3243EUCY-L/TR SP3243EUEA SP3243EUEA/TR SP3243EUEA-L SP3243EUEA-L/TR SP3243EUER SP3243EUER/TR SP3243EUER-L SP3243EUER-L/TR SP3243EUET SP3243EUET/TR SP3243EUET-L SP3243EUET-L/TR SP3243EUEY SP3243EUEY/TR SP3243EUEY-L SP3243EUEY-L/TR (c) Copyright 2006 Sipex Corporation