THC63LVDM83C _Rev2.10_E
Copyright©2007 THine Electronics, Inc. 1 THine Electronics, Inc.
Block Diagram
7
THC63LVDM83C
REDUCED SWING LVDS 24Bit COLOR HOST-LCD PANEL INTERFACE
General Description
The THC63LVDM83C transmitter is designed to sup-
port pixel data transmission between Host and Flat
Panel Display from NTSC up to SXGA+ re solutions.
The THC63LVDM83C converts 28bits of CMOS/TTL
data into LV DS(Low Voltage Differential Signaling)
data stream. The transmitter can be programmed for ris-
ing edge or falling edge clocks throug h a dedicated pin.
At a transmit clock frequency of 135MHz, 24bits of
RGB data and 4bits of timing and control data
(HSYNC, VSYNC, CNTL1, CNTL2) are transmitted at
an effective rate of 945Mbps per LVDS channel.
Features
Wide dot clock range: 8-135MHz suited for NTSC,
VGA, SVGA, XGA,SXGA and SX GA+
PLL requires no external components
Supports spread spectrum clock generator
On chip jitter filtering
Clock edge selectable
Supports reduced swing LVDS for low EMI
Power down mode
Low power single 3.3V CMOS design
Low profile 56 Lead TSSOP Package
Backward compatible with
THC63LVDM83R(24bits)
TTL PARALLEL TO SERIAL
PLL
TA +/-
TB +/-
TC +/-
TD +/-
TCLK +/-
R/F
/PDWN
TA0-6
TC0-6
TD0-6
TRANSMITTER
(8 to 135MHz)
CMOS/TTL
7
RS
7
TB0-6 7
INPUTS
CLOCK
(LVDS)
8-135MHz
DATA
(LVDS)
(56-945Mbit/On Each
LVDS Channel)
CLKIN
THC63LVDM83C
Copyright©2007 THine Electronics, Inc. 2 THine Electronics, Inc.
THC63LVDM83C_Rev2.10_E
Pin Out
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
RS
TD1
TA5
TA6
GND
TB0
TB1
TD2
VCC
TD3
TB2
TB3
GND
TB4
TB5
TD4
R/F
TD5
TB6
TC0
GND
TC1
TC2
TC3
TD6
VCC
TC4
TC5
TA4
TA3
TA2
GND
TA1
TA0
TD0
LVDS GND
TA-
TA+
TB-
TB+
LVDS VCC
LVDS GND
TC-
TC+
TCLK-
TCLK+
TD-
TD+
LVDS GND
PLL GND
PLL VCC
PLL GND
/PDWN
CLK IN
TC6
GND
THC63LVDM83C
Copyright©2007 THine Electronics, Inc. 3 THine Electronics, Inc.
THC63LVDM83C_Rev2.10_E
Pin Description
Pin Name Pin # Type Description
TA+, TA- 47, 48 LVDS OUT
LVDS Data Out.
TB+, TB- 45, 46 LVDS OUT
TC+, TC- 41, 42 LVDS OUT
TD+, TD- 37, 38 LVDS OUT
TCLK+, TCLK- 39, 40 LVDS OUT LVDS Clock Out.
TA0 ~ TA6 51, 52, 54, 55, 56, 3, 4 IN
Pixel Data Inputs.
TB0 ~ TB6 6, 7, 11, 12, 14, 15, 19 IN
TC0 ~ TC6 20, 22, 23, 24, 27, 28, 30 IN
TD0 ~ TD6 50, 2, 8, 10, 16, 18, 25 IN
/PDWN 32 IN H: Normal operation,
L: Power down (all outputs are Hi-Z)
RS 1 IN
LVDS swing mode, VREF select.
R/F 17 IN Input Clock Triggering Edge Select.
H: Rising edge, L: Falling edge
VCC 9, 26 Power Power Supply Pins for TTL inputs and digital
circuitry.
CLKIN 31 IN Clock in.
GND 5, 13, 21,
29, 53 Ground Ground Pins for TTL inputs and digital circuitry.
LVDS VCC 44 Power Power Supply Pins for LVDS Outputs.
LVDS GND 36, 43, 49 Ground Ground Pins for LVDS Outputs.
PLL VCC 34 Power Power Supply Pin for PLL circuitry.
PLL GND 33, 35 Ground Ground Pins for PLL circuitry.
RS LVDS
Swing Small Swing
Input Support
VCC 350mV N/A
0.6 ~ 1.4V 350mV RS=VREFa
GND 200mV N/A
a. VREF is Input Reference Voltage.
THC63LVDM83C _Rev2.10_E
Copyright©2007 THine Electronics, Inc. 4 THine Electronics, Inc.
Absolute Maximum Ratings 1
Supply Voltage (VCC)-0.3V ~ +4.0V
CMOS/TTL Input Voltage -0.3V ~ (VCC + 0.3V)
CMOS/TTL Output Voltage -0.3V ~ (VCC + 0.3V)
LVDS Driver Output Voltage -0.3V ~ (VCC + 0.3V)
Output Current continuous
Junction Temperature +125
Storage Temperature Range -55 ~ +150
Resistance to soldering heat +260 /10sec
Maximum Power Dissipation @+25 0.5W
1. “Absolute Maximum Ratings” are those valued beyond which the safety of the device can not be guaranteed. They
are not meant to imply that the device should be operated at these limits. The tables of “Electrical Characteristics”
specify conditions for device operation.
°C
°C°C
°C
°C
Copyright©2007 THine Electronics, Inc. 5 THine Electronics, Inc.
THC63LVDM83C_Rev2.10_E
Electrical Characteristics
CMOS/TTL DC Specifications VCC = 3.0V ~ 3.6V, Ta = 0 ~ +70
Notes: 1VDDQ voltage defines max voltage of small swing input. It is not an actual input voltage.
2 Small swing signal is applied to TA0-6,TB0-6,TC0-6,TD0-6 and CLKIN.
LVDS Transmitter DC Specifications VCC = 3.0V ~ 3.6V, Ta = 0 ~ +70
Symbol Parameter Conditions Min. Typ. Max. Units
VIH High Level Input Voltage RS=VCC or GND 2.0 VCC V
VIL Low Level Input Voltage RS=VCC or GND GND 0.8 V
VDDQ1Small Swing Voltage 1.2 2.8 V
VREF Input Reference Voltage Small Swing (RS=VDDQ/2) VDDQ/2
VSH2Small Swing High Level
Input Voltage VREF = VDDQ/2 VDDQ/2
+100mV V
VSL2Small Swing Low Level
Input Voltage VREF = VDDQ/2 VDDQ/2
-100mV V
IINC Input Current μA
Symbol Parameter Conditions Min. Typ. Max. Units
VOD Differential Output Voltage RL=100Ω
Normal
swing
RS=VCC
250 350 450 mV
Reduced
swing
RS=GND 100 200 300 mV
ΔVOD Change in VOD between
complementary output states
RL=100Ω
35 mV
VOC Common Mode Voltage 1.125 1.25 1.375 V
ΔVOC Change in VOC between
complementary output states 35 mV
IOS Output Short Circuit Current VOUT=0V, RL=100Ω-24 mA
IOZ Output TRI-STATE Current /PDWN=0V,
VOUT=0V to VCC μA
°C°C
0V VIN VCC
≤≤ 10±
°C°C
10±
Copyright©2007 THine Electronics, Inc. 6 THine Electronics, Inc.
THC63LVDM83C_Rev2.10_E
Supply Current VCC = 3.0V ~ 3.6V, Ta = 0 ~ +70
Symbol Parameter Condition(*) Typ. Max. Units
ITCCG Transmitter Supply
Current
RL=100Ω,CL=5pF
VCC=3.3V, RS=VCC
Gray Scale Pattern
f=85MHz 52 58 mA
f=135MHz 62 68 mA
RL=100Ω,CL=5pF
VCC=3.3V, RS=GND
Gray Scale Pattern
f=85MHz 40 46 mA
f=135MHz 50 56 mA
ITCCW Transmitter Supply
Current
RL=100Ω,CL=5pF
VCC=3.3V, RS=VCC
Worst Case Pattern
f=85MHz 61 67 mA
f=135MHz 77 83 mA
RL=100Ω,CL=5pF
VCC=3.3V, RS=GND
Worst Case Pattern
f=85MHz 50 56 mA
f=135MHz 65 71 mA
ITCCS T ransmitter Power Down
Supply Current /PDWN = L 10 μA
°C°C
Copyright©2007 THine Electronics, Inc. 7 THine Electronics, Inc.
THC63LVDM83C_Rev2.10_E
Gray Scale Pattern
CLKIN
Tx0
Tx1
Tx2
Tx3
Tx4
Tx5
Tx6
x=A,B,C,D
CLKIN
Tx0
Worst Case Pattern
Tx1
Tx2
Tx3
Tx4
Tx5
Tx6
x=A,B,C,D
Copyright©2007 THine Electronics, Inc. 8 THine Electronics, Inc.
THC63LVDM83C_Rev2.10_E
Switching Characteristics VCC = 3.0V ~ 3.6V, Ta = 0 ~ +70
Symbol Parameter Min. Typ. Max. Units
tTCIT CLK IN Transition tim e 5.0 ns
tTCP CLK IN Period 7.4 T 125 ns
tTCH CLK IN High Time 0.35T 0.5 T 0.65T ns
tTCL CLK IN Low Time 0.35T 0.5T 0.65T ns
tTCD CLK IN to TCLK+/- Delay 3T ns
tTS TTL Data Setup to CLK IN 2.5 ns
tTH TTL Data Hold from CLK IN 0 ns
tLVT LVDS Transition Time 0.6 1.5 ns
tTOP1 Output Data Position0 (T=7.4ns) -0.2 0.0 +0.2 ns
tTOP0 Output Data Position1 (T=7.4ns) ns
tTOP6 Output Data Position2 (T=7.4ns) ns
tTOP5 Output Data Position3(T=7.4ns) ns
tTOP4 Output Data Position4 (T=7.4ns) ns
tTOP3 Output Data Position5 (T=7.4ns) ns
tTOP2 Output Data Position6 (T=7.4ns) ns
tTPLL Phase Lock Loop Set 10.0 ms
°C°C
T
7
--- 0.2T
7
--- T
7
--- 0.2+
2T
7
--- 0.2–2
T
7
--- 2 T
7
--- 0.2+
3T
7
--- 0.2–3
T
7
--- 3 T
7
--- 0.2+
4T
7
--- 0.2–4
T
7
--- 4 T
7
--- 0.2+
5T
7
--- 0.2–5
T
7
--- 5 T
7
--- 0.2+
6T
7
--- 0.2–6
T
7
--- 6 T
7
--- 0.2+
AC Timing Diagrams
TTL Input
5pF 20%
80%
20%
80%
tLVT tLVT
CLK IN
LVDS Output
90%
10%
90%
10%
tTCIT tTCIT
Vdiff
100Ω
Vdiff=(TA+)-(TA-)
TA+
TA-
LVDS Output Load
Copyright©2007 THine Electronics, Inc. 9 THine Electronics, Inc.
THC63LVDM83C_Rev2.10_E
AC Timing Diagrams
TTL Inputs tTCP
tTS tTH
tTCH
tTCL
CLK IN
Tx0-Tx6
tTCD
Note:
CLK IN: for R/F=GND, denote as solid line,
for R/F=VCC, denote as dashed line
TCLK+
TCLK-
Small Swing Inputs tTCP
tTS tTH
tTCH
tTCL
CLK IN
Tx0-Tx6
tTCD
Note:
CLK IN: for R/F=GND, denote as solid line,
for R/F=VCC, denote as dashed line
TCLK+
TCLK-
VDDQ
GND
GND
VDDQ
VREF
VOC
VOC
VREF
VCC/2 VCC/2
VCC/2 VCC/2
VDDQ/2 VDDQ/2
VDDQ/2 VDDQ/2 VDDQ/2
VCC/2
Copyright©2007 THine Electronics, Inc. 10 THine Electronics, Inc.
THC63LVDM83C_Rev2.10_E
AC Timing Diagrams
Phase Lock Loop Set Time
Vdiff = 0V Vdiff = 0V
TCLK OUT
tTOP1
tTOP0
tTOP6
tTOP5
tTOP4
tTOP3
tTOP2
LVDS Output
TD6 TD5 TD4 TD3 TD2 TD1 TD0
TD+/-
TC6 TC5 TC4 TC3 TC2 TC1 TC0
TC+/-
TB6 TB5 TB4 TB3 TB2 TB1 TB0
TB+/-
TA6 TA5 TA4 TA3 TA2 TA1 TA0
TA+/-
(Differential)
Next Cycle
Previous Cycle
2.0V
CLKIN
/PDWN
TCLK+/-
3.0V 3.6V
VCC tTPLL
Vdiff = 0V
Copyright©2007 THine Electronics, Inc. 11 THine Electronics, Inc.
THC63LVDM83C_Rev2.10_E
Package
56 Lead Molded Thin Shrink Small Outline Package, JEDEC
(1.0)
0.10 0.05±
1.2 MAX
0.20 TYP0.50 TYP
8.1 0.1±
4.05
128
6.1 0.1±
14.0 0.1±
2956
Unit : millimeters
Copyright©2007 THine Electronics, Inc. 12 THine Electronics, Inc.
THC63LVDM83C_Rev2.10_E
Notices and Requests
1. The product specifications described in this material are subject to change without prior notice.
2. The circuit diagrams described in this material are examples of the application which may not
always apply to the customer's design. We are not responsible for possible errors and omissions
in this material. Please note if errors or omissions should be found in this material, we may not
be able to correct them immediately.
3. This material contains our copy right, know-how or other proprietary. Copying or disclosing to
third parties the contents of this material without our prior permission is prohibited.
4. Note that if infringement of any third party's industrial ownership should occur by using this
product, we will be exempted from the responsibility unless it directly relates to the production
process or functions of the product.
5. This product is presumed to be used for general electric equipment, not for the applications
which require very high reliability (including medical equipment directly concerning people's
life, aerospace equipment, or nuclear control equipment). Also, when using this product for the
equipment concerned with the control and safety of the transportation means, the traffic signal
equipment, or various Types of safety equipment, please do it after applying appropriate
measures to the product.
6. Despite our utmost efforts to improve the quality and reliability of the product, faults will occur
with a certain small probability, which is inevitable to a semi-conductor product. Therefore, you
are encouraged to have suff iciently redundant or error preventive design applied to the use of the
product so as not to have our product cause any social or public damage.
7. Please note that this product is not designed to be radiation-proof.
8. Customers are asked, if required, to judge by themselves if this product falls under the category
of strategic goods under the Foreign Exchange and Foreign Trade Control Law.
THine Electronics, Inc.
Wakamatsu Bldg. 6F
3-3-6, Nihombashi-Honcho,
Chuo-ku, Tokyo, 103-0023 Japan
Tel: +81-3-3270-0880
Fax: +81-3-3270-1771
E-mail: sales@thine.co.jp