1. General description
The TJA1055 is the interface be tween the protocol controller and the physical bus wires in
a Controller Area Network (CAN). It is primarily intended for low-speed applications up to
125 kBd in passenger cars. The device provides differential receive and transmit
capability but will switch to single-wire transmitter and/or receiver in error conditions. The
TJA1055 is the enhan ced version of the TJA1054 and TJA1054A. TJA1055 has the same
functionality but in addition offering a number of improvements. The most important
improvements of the TJA1055 with respect to the TJA1054 and TJA1054A are:
•Improved ElectroStatic Discharge (ESD) performance
•Lower current consumption in sleep mode
•Wake-up signalling on RXD and ERR without VCC active
•3 V interfacing with microcontroller possible with TJA105 5T /3
2. Features and benefits
2.1 Optimized for in-car low-speed communication
Pin-to-pin compatible with TJA1054 and TJA1054A
Baud rate up to 125 kBd
Up to 32 nodes can be connected
Supports unshielded bus wires
Very low ElectroMagnetic Emission (EME) due to built-in slope control function and a
very good matching of the CANL and CANH bus outputs
Very high ElectroMagnetic Immunity (EMI) in normal operating mode and in lo w power
modes
Fully integrated receiver filters
Transmit Data (TxD) dominant time-out function
High ESD robustness:
8 kV Electrostatic Discharge (ESD) protection Human Body Model (HBM) for
off-board pins
6 kV Electrostatic Discharge (ESD) protection IEC 61000-4-2 for off-board pins
Low-voltage microcontroller support
2.2 Bus failure management
Supports single-wire transmission modes with ground offset voltages up to 1.5 V
Automatic switching to single-wire mode in the event of bus failures, even when the
CANH bus wire is short-circuited to VCC
TJA1055
Enhanced fault-tolerant CAN transceiver
Rev. 5 — 6 December 2013 Product data sheet
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Product data sheet Rev. 5 — 6 December 2013 2 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
Automatic reset to differential mode if bus failure is removed
Full wake-up capability during failure modes
2.3 Protections
Bus pins short-circuit safe to battery and to ground
Thermally protected
Bus lines protected against transients in an automotive environment
An unpowered node does not disturb the bus lines
Microcontroller interface without reverse current paths, if unpowered
2.4 Support for low power modes
Low current slee p mode an d standby mode with wa ke -u p via th e bu s line s
Software accessible power-on reset flag
3. Quick reference data
[1] Junction temperature in accordance with “IEC 60747-1”. An alternative definition is: Tvj =T
amb +PRth(vj-a)
where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable
combinations of power dissipation (P) and operating ambient temperature (Tamb).
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 4.75 - 5.25 V
VBAT battery supply voltage no time limit 0.3 - +40 V
operating mode 5.0 - 40 V
load dump - - 58 V
IBAT battery supply current sleep mode at
VRTL =V
WAKE =V
INH =
VBAT =14V; T
amb =
40 C to +125 C
-2540A
VCANH voltage on pin CANH VCC 0V; V
BAT 0V;
no time limit; with respect
to any other pin
58 - +58 V
VCANL voltage on pin CANL VCC 0V; V
BAT 0V;
no time limit; with respect
to any other pin
58 - +58 V
VO(dom) dominant output voltage VTXD =0V; V
EN =V
CC
on pin CANH ICANH =40 mA VCC 1.4 - - V
on pin CANL ICANL =40mA - - 1.4 V
tPD(L) propagation delay TXD
(LOW) to RXD (LOW) no fai lures;
RCAN_L =R
CAN_H =
125 ; CCAN_L =
CCAN_H = 1 nF;
see Figure 4 to Figure 6
--1.5s
Tvj virtual junction temperature [1] 40 - +150 C
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Product data sheet Rev. 5 — 6 December 2013 3 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
4. Ordering information
5. Block diagram
Table 2. Ordering information
Type number Package
Name Description Version
TJA1055T SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
TJA1055T/3
(1) For TJA1055T/3 current source to GND; for TJA1055T pull-up resistor to VCC.
(2) Not within TJA1055T/3.
Fig 1. Block diagram
001aac769
FAILURE DETECTOR
PLUS WAKE-UP
PLUS TIME-OUT
WAKE-UP
STANDBY
CONTROL
INH 1
WAKE 7
STB 5
EN 6
TXD
VCC
VCC(2)
VCC(2)
2
(1)
ERR 4
RXD 3
TEMPERATURE
PROTECTION
DRIVER
RECEIVER
BAT
14
VCC
10
13
GND
FILTER
TIMER
FILTER
TJA1055T
9
11
12
8
RTL
CANH
CANL
RTH
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Product data sheet Rev. 5 — 6 December 2013 4 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 2. Pin configuration
TJA1055T
TJA1055T/3
INH BAT
TXD GND
RXD CANL
CANH
V
CC
EN RTL
RTH
001aac770
1
2
3
4
5
6
7 8
10
9
12
11
14
13
ERR
WAKE
STB
Table 3. Pin descripti on
Symbol Pin Description
INH 1 inhibit output for switching an external voltage regulator if a
wake-up signal occurs
TXD 2 transmit data input for activating the driver to the bus lines
RXD 3 receive data output for reading out the data from the bus lines
ERR 4 error, wake-up and power-on indication output; active LOW in
normal operating mode when a bus failure is detected; active LOW
in standby and sleep mode when a wake-up is detected; active
LOW in power-on standby when a VBAT powe r-o n event is
detected
STB 5 standby digital control signal input; together with the input signal
on pin EN this input determines the state of the transceiver;
see Table 5 and Figure 3
EN 6 enable digital control signal input; together with the input signal on
pin STB this input determines the state of the transceiver;
see Table 5 an d Figure 3
WAKE 7 local wake-up signal input (active LOW); both falling and rising
edges are detected
RTH 8 termination resistor connection; in case of a CANH bus wire error
the line is terminated with a predefined impedance
RTL 9 termination resistor connection; in case of a CANL bus wire error
the line is terminated with a predefined impedance
VCC 10 supply voltage
CANH 11 HIGH-level CAN bus line
CANL 12 LOW-level CAN bus line
GND 13 ground
BAT 14 battery supply voltage
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Product data sheet Rev. 5 — 6 December 2013 5 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
7. Functional description
The TJA1055 is the int erfa c e between the CAN prot oco l con tr oller an d the ph ys ical wire s
of the CAN bus (see Figure 7 and Figure 8). It is primarily intended for low-speed
applications, up to 125 kBd, in passenger cars. The device provides differential tran smit
capability to the CAN bus and differential receive capability to the CAN controller.
To reduce EME, the rise and fall slopes are limited. This allows the use of an unshielded
twisted pair or a parallel pair of wires for the bus lines. Moreover, the device supports
transmission capability on either bus line if one of the wires is corrupted. The failure
detection logic automatically selects a suitable transmission mode.
In normal operating mod e (no wiring failures) the dif ferential receiver is outp ut on pin RXD
(see Figure 1). The differential receiver inputs are connected to pins CANH and CANL
through integrated filters. The filtered input signals are also used for the single-wire
receivers. The receivers connecte d to pins CANH and CANL have threshold voltage s that
ensure a maximum noise margin in single-wire mode.
A timer function (TxD dominant time-out function) has been integrated to prevent the bus
lines from being driven into a permane nt dom inant state (thus blo cking th e en tire ne two rk
communication) due to a situation in which pin TXD is per manently forced to a LOW level,
caused by a hardware and/or software application failure.
If the duration of the LOW level on pin TXD exceeds a certain time, the transmitter will be
disabled. The timer will be reset by a HIGH level on pin TXD.
7.1 Failure detector
The failure detector is fully active in the normal operating mode. After the detection of a
single bus failure the detector switches to the appropriate mode (see Table 4). The
differential receiver thres ho ld vo ltage is set at 3.2 V typical (VCC = 5 V). This ensu res
correct reception with a noise margin as high as possible in the normal operating mode
and in the event of failur es 1, 2, 5 and 6a. Th es e failures, or recovery from them, do not
destroy ongoing transmissions. The output dr ivers remain active, the termination does not
change and the re ce iver rem a ins in differential mod e (se e Table 4).
Failures 3, 3a and 6 a re d etected by comparat or s connected to the CANH and CANL bus
lines. Failures 3 and 3a are detected in a two-step approach. If the CANH bus line
exceeds a cert ain volt age level, the dif feren tial comparator signals a continuous dominant
condition. Because of inter operability reasons with the predecessor products TJA1054
and TJA1054A, after a first time-out the transceiver switches to single-wire operation
through CANH. If the CANH bus line is still exceeding the CANH detection voltage for a
second time-out, the TJA1055 switches to CANL operation; the CANH driver is switched
off and the R TH bias chang es to the pull-down curr ent sour ce. The time-o ut s (del ays) are
needed to avoid false triggering by external RF fields.
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Product data sheet Rev. 5 — 6 December 2013 6 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
[1] A weak termination implies a pull-down current source behavior of 75 A typical.
[2] A weak termination implies a pull-up current source behavior of 75 A typical.
Failure 6 is detected if the CANL bus line exceeds its comparator threshold for a certain
period of time. This delay is needed to avoid false triggering by external RF fields. After
detection of failure 6, the reception is switched to the single-wire mode through CANH; the
CANL driver is switched off and the RTL bias changes to the pull-up current source.
Recovery from failures 3, 3a and 6 is detected automatically after reading a consecutive
recessive level by corresponding comparators for a certain period of time.
Failures 4 and 7 in itially result in a permanen t dominant level on pin RXD. After a time-out
the CANL driver is switched off and the RTL bias changes to the pull-up current source.
Reception continues by switching to the single-wire mode via pins CANH or CANL. When
failures 4 or 7 are removed, the recessive bus levels are restored. If the differential
voltage re mains belo w th e recessive thr eshold le vel for a ce rtain per iod of time, recep ti on
and transmission switch back to the differential mode.
If any of the wiring failure occurs, the output signal on pin ERR will be set to LOW. On
error recovery, the output signal on pin ERR will be set to HIGH again. In case of an
interrupted open bus wire, this failure will be detected and signalled only if there is an
open wire between the transmitting and receiving node(s). Thus, during open wire
failures, pin ERR typically toggles.
During all single-wire transmissions, EMC performance (both immunity and emission) is
worse than in the differential mode. The integrated receiver filters suppress any HF noise
induced into the bus wires. The cu t-of f frequency of these filter s is a compr omise between
propagation delay and HF suppression. In single-wire mode, LF noise cannot be
distinguished from the required signal.
Table 4. Bus failures
Failure Description Termination
CANH (RTH) Termination
CANL (RTL) CANH
driver CANL
driver Receiver
mode
1 CANH wire
interrupted on on on on differential
2 CANL wire interrupted on on on on differential
3 CANH short-circuited
to battery weak[1] on off on CANL
3a CANH short-circuited
to VCC
weak[1] on off on CANL
4 CANL short-circuited
to ground on weak[2] on off CANH
5 CANH short-circuited
to ground on on on on differential
6 CANL short-circuited
to battery on weak[2] on off CANH
6a CANL short-circuited
to VCC
on on on on differential
7 CANL and CANH
mutually
short-circuited
on weak[2] on off CANH
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Product data sheet Rev. 5 — 6 December 2013 7 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
7.2 Low power modes
The transceiver provides three low power modes which can be entered and exited via
STB and EN (see Table 5 and Figure 3).
The sleep mode is the mode with the lowest power consumption. Pin INH is switched to
HIGH-impedance for deactivatio n of the external voltage regulator. Pin CANL is biased to
the battery volt age vi a pin R TL . Pins RXD and ERR will signal the wake-up interrupt even
in case VCC is not present.
The sta ndby mode operates in th e same way as the sleep mod e but with a HIGH level on
pin INH.
The power-on st a ndby mode is the same as the stan dby mode, howe ver, in this mode the
battery power-on flag is shown on pin ERR instead of the wake-up interrupt signal. The
output on pin RXD will show the wake-up interrupt. This mode is only for reading out the
power-on flag.
[1] Wake-up interrupts are released when entering normal operating mode.
[2] For TJA1055T a diode is added in series with the high-side driver of ERR and RXD to prevent a reverse
current from ERR to VCC in the unpowered state.
[3] For TJA1055T/3, ERR and RXD are open-drain.
[4] In case the goto-sleep command was used before. When VCC drops, pin EN will become LOW, but due to
the fail-safe functionality this does not effect the internal functions.
[5] VBAT power-on flag will be reset when entering normal operating mode.
Wake-up requests are recognized by the transceiver through two possible channels:
•The bus lines for remote wake-up
•Pin WAKE for local wake-up
In order to wake-up the transceiver remotely through the bus lines, a filter mechanism is
integrated. This mechanism m akes sure th at noise and any present bus failure conditions
do not result into an erroneous wake-up. Because of this mechanism it is not sufficient to
simply pull the CANH or CANL bus lines to a dominant level for a certain time. To
guarantee a successful remote wake-up under all conditions, a message frame with a
dominant phase of at least the maximum specified tdom(CANH) or tdom(CANL) in it is required.
Table 5. Normal operating and low power modes
Mode Pin STB Pin EN Pin ERR Pin RXD Pin RTL
switched
to
LOW HIGH LOW HIGH
Goto-sleep
command LOW HIGH wake-up
interrupt
signal[1]
[2][3] wake-up
interrupt
signal[1]
[2][3] VBAT
Sleep LOW LOW[4]
Standby LOW LOW
Power-on
standby HIGH LOW VBAT
power-on
flag[5]
wake-up
interrupt
signal[1]
VBAT
Normal
operating HIGH HIGH error flag no error
flag dominant
received
data
recessive
received
data
VCC
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Product data sheet Rev. 5 — 6 December 2013 8 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
A local wake-up through pin WAKE is detected by a rising or falling edge with a
consecutive level exceeding the maximum specified tWAKE.
On a wake-up request the transceiver will set the output on pin INH to HIGH which can be
used to activate the external supply voltage regulator.
A wake-up request is signalle d on ERR or RXD with an active LOW signal. So the external
microcontroller can activate the transceiver (switch to normal operating mode) via
pins STB and EN.
To prevent a false remote wake-up due to transients or RF fields, the wake-up voltage
levels have to be maintained for a certain period of time. In the low power modes the
failure detection circuit remains partly active to prevent an increased power consumption
in the event of failur es 3, 3a, 4 and 7.
To prevent a false local wake-up during an open wire at pin WAKE, this pin has a weak
pull-up current source towards VBAT. However, in order to protect the transceiver against
any EMC immunity issues, it is recommended to connect a not used pin WAKE to pin
BAT. Pin INH is set to floating only if the goto-sleep command is entered successfully. To
enter a successful goto-sleep co mma nd u nder all conditions, this co mma nd must be kep t
stable for the maximum specified td(sleep).
Pin INH will be set to a HIGH level again by the following events only:
•VBAT power-on (cold start)
•Rising or falling edge on pin WAKE
•A message frame with a dominant phase of at least the maximum specified tdom(CANH)
or tdom(CANL), while pin EN or pin STB is at a LOW level
•Pin STB goes to a HIGH level with VCC ac tive
To provide fail-safe functionality, the signals on pins STB and EN will internally be set to
LOW when VCC is below a certain threshold voltage (VCC(stb)). An unused output pin INH
can simply be left open within the application.
7.3 Power-on
After po wer-on (VBAT switched on) the signal on pin INH will become HIGH and an internal
power-on flag will be set. This flag can be read in the power-on standby mode through
pin ERR (STB = 1; EN = 0) and will be reset by entering the normal operating mode.
7.4 Protections
A current limiting circuit protects the transmitter output stages against short-circuit to
positive and negative battery voltage.
If the junction temperature exceeds the typical value of 175 C, the transmitter output
stages are d isabled. Because the transmitter is r esponsible for the major p art of the power
dissipation, this will result in a reduced power dissipation and hence a lower chip
temperature. All other parts of the device will continue to operate.
The pins CANH and CANL are protected against electrical transients which may occur in
an automotive environment.
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Product data sheet Rev. 5 — 6 December 2013 9 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
8. Limiting values
Mode 10 stands for: Pin STB = HIGH and pin EN = LOW.
(1) Mode change via input pins STB and EN.
(2) Mode change via input pins STB and EN; it should be noted that in the sleep mode pin INH is
inactive and possibly there is no VCC. Mode control is only possible if VCC of the transceiver is
active.
(3) Pin INH is activated and pins RXD and ERR are pulled LOW after wake-up via bus or input
pin WAKE.
(4) Transitions to normal mode clear the internal wake-up: wake-up interrupt flag and power-on flag
are cleared.
(5) Transitions to sleep mode: pin INH is deactivated.
Fig 3. Mode control
mbk949
POWER-ON
STANDBY
10
NORMAL
(4)
11
GOTO
SLEEP
(5)
01
STANDBY
00 SLEEP
00
(1)
(2)
(3)
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.3 +6 V
VBAT battery supply voltage 0.3 +58 V
VTXD voltage on pin TXD 0.3 VCC +0.3 V
VRXD voltage on pin RXD 0.3 VCC +0.3 V
VERR voltage on pin ERR 0.3 VCC +0.3 V
VSTB voltage on pin STB 0.3 VCC +0.3 V
VEN voltage on pin EN 0.3 VCC +0.3 V
VCANH voltage on pin CANH VCC 0V; V
BAT 0V;
no time limit; with
respect to any othe r pin
58 +58 V
VCANL voltage on pin CANL VCC 0V; V
BAT 0V;
no time limit; with
respect to any othe r pin
58 +58 V
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Product data sheet Rev. 5 — 6 December 2013 10 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
[1] All voltages are defined with respect to pin GND, unless otherwise specified. Positive current flows into the
device.
[2] Test set-up according to IEC TS 62228, section 4.2.4. V erified by an external test house to ensure pins can
withstand ISO 7637 part 1 & 2 automotive transient test pulses 1, 2a, 3a and 3b.
[3] Only relevant if VWAKE <V
GND 0.3 V; current will flow into pin GND.
[4] Junction temperature in accordance with “IEC 60747-1”. An alternative definition is: Tvj =T
amb +PRth(vj-a)
where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable
combinations of power dissipation (P) and operating ambient temperature (Tamb).
[5] Equivalent to discharging a 100 pF capacitor through a 1.5 k resistor.
[6] The ESD performance of pins CANH, CANL, RTH and RTL, with respect to GND, was verified by an
external test house in accordance with IEC-61000-4-2 (C = 150 pF, R = 330 ). The results were equal to,
or better than, 6kV.
[7] Equivalent to discharging a 200 pF capacitor through a 10 resistor and a 0.75 H coil.
Vtrt(n) transient voltage on
pins CANH and CANL [2] 150 +100 V
VI(WAKE) input voltage on pin WAKE with respect to any
other pin 0.3 +58 V
II(WAKE) input current on pin WAKE [3] 15 - mA
VINH voltage on pin INH 0.3 VBAT +0.3 V
VRTH voltage on pin RTH with respect to any
other pin 58 +58 V
VRTL voltage on pin RTL with respect to any
other pin 58 +58 V
RRTH termination resistance on
pin RTH 500 16000
RRTL termination resistance on
pin RTL 500 16000
Tvj virtual junction temperature [4] 40 +150 C
Tstg storage temperature 55 +150 C
Vesd electrostatic discharge
voltage human body model [5]
pins RTH, RTL,
CANH and CANL 8+8 kV
all other pins 2+2 kV
IEC 61000-4-2 [6]
pins RTH, RTL,
CANH and CANL 6+6 kV
machine model [7]
any pin 300 +300 V
Table 6. Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol Parameter Conditions Min Max Unit
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Product data sheet Rev. 5 — 6 December 2013 11 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
9. Thermal characteristics
10. Static characteristics
Table 7. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-a) thermal resistance from junction
to ambient in free air 120 K/W
Rth(j-s) thermal resistance from junction
to substrate in free air 40 K/W
Table 8. Static characteristics
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB =V
CC; Tvj =
40
C to +150
C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1]
Symbol Parameter Conditions Min Typ Max Unit
Supplies (pins VCC and BAT)
VCC supply voltage 4.75 - 5.25 V
VCC(stb) supply voltage for forced
standby mode (fail-safe) 3.1- 4.5V
ICC supply current normal operating mode;
VTXD =V
CC (recessive) 2.5 6 10 mA
normal operating mode;
VTXD = 0 V ( dominant); no load 31321mA
low power modes at VTXD =V
CC
Tamb = 40 C to +85 C005A
Tamb = +85 C to +125 C0025A
VBAT battery supply voltage no time limit 0.3 - +40 V
operating mode 5.0 - 40 V
load dump - - 58 V
IBAT battery supply current sleep mode at
VRTL =V
WAKE =V
INH =V
BAT =14V;
Tamb = 40 Cto+125C
-2540A
low power mode at
VRTL =V
WAKE =V
INH =V
BAT;
Tamb =40 Cto+125C
VBAT =5V to8V 10 - 100 A
VBAT = 8 V to 40 V 10 - 75 A
normal operating mode at
VRTL =V
WAKE =V
INH =V
BAT =5V
to 40 V
- 150 220 A
Vpof(BAT) power-on flag voltage on
pin BAT low power modes
power-on flag set - - 3.8 V
power-on flag not set 5 - - V
Pins STB, EN and TXD
VIH HIGH-level input voltage 2.2 - VCC +0.3 V
VIL LOW-level input voltage 0.3 - +0.8 V
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Product data sheet Rev. 5 — 6 December 2013 12 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
IIH HIGH-level input current
pins STB and EN VI=4V - 11 21 A
pin TXD (TJA1055T) VI=3V 160 80 40 A
pin TXD (TJA1055T/3) normal operating mode; VI=2.4V 2 11 21 A
low power mode; VI=2.4V 0.1 0.9 2 A
IIL LOW-level input current
pins STB and EN VI=1V 2 11 - A
pin TXD (TJA1055T) VI=1V 400 240 100 A
pin TXD (TJA1055T/3) normal operating mode; VI=1V 2 11 - A
low power mode; VI=1V 0.1 0.9 2 A
Pins RXD and ERR (TJA1055T)
VOH(norm) HIGH-level output voltage
in normal mode
on pin ERR IO=100 AV
CC 0.9 - VCC V
on pin RXD IO=1mA V
CC 0.9 - VCC V
VOH(lp) HIGH-level output voltage
in low-power mode
on pin ERR IO=100 AV
CC 1.1 VCC 0.7 VCC 0.4 V
on pin RXD IO=100 AV
CC 1.1 VCC 0.7 VCC 0.4 V
VOL LOW-level output voltage IO=1.6mA 0 - 0.4 V
IO= 1.2 mA; VCC <4.75V 0 - 0.4 V
IO=5mA 0 - 1.5 V
Pins RXD and ERR (TJA1055T/3)
IOL LOW-level output current VO = 0.4 V 1.3 3.5 - mA
ILH HIGH-level leakage
current VO=3 V 50 +8A
Pin WAKE
IIL LOW-level input current VWAKE =0V; V
BAT =40V 12 41A
Vth(wake) wake-up threshold
voltage VSTB =0V 2.5 3.2 3.9 V
Pin INH
VHHIGH-level voltage drop IINH =0.18 mA; VBAT 5.5 V - - 0.8 V
IINH =0.18 mA; VBAT =5.0V - - 1.0 V
ILleakage current sleep mode; VINH =0V - - 5 A
Pins CANH and CANL
Vth(dif) differential receiver
threshold voltage no failures and
bus failures 1, 2, 5 and 6a;
see Figure 4
VCC =5V 3.5 3.2 2.9 V
VCC = 4.75 V to 5.25 V 0.70VCC 0.64VCC 0.58VCC V
Table 8. Static characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB =V
CC; Tvj =
40
C to +150
C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1]
Symbol Parameter Conditions Min Typ Max Unit
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Enhanced fault-tolerant CAN transceiver
VO(reces) recessive output voltage VTXD =V
CC
on pin CANH RRTH <4k--0.2V
on pin CANL RRTL <4kVCC 0.2 - - V
VO(dom) dominant output voltage VTXD =0V; V
EN =V
CC
on pin CANH ICANH =40 mA VCC 1.4 - - V
on pin CANL ICANL =40mA - - 1.4 V
IO(CANH) output current on
pin CANH normal operating mode;
VCANH =0V; V
TXD =0V 110 80 45 mA
low power modes; VCANH =0V;
VCC =5V -0.25 - A
IO(CANL) output current on
pin CANL normal operating mode;
VCANL =14V; V
TXD =0V 45 70 100 mA
low power modes; VCANL =14V;
VBAT =14V -0-A
Vdet(sc)(CANH) detection voltage for
short-circuit to battery
voltag e on pi n CANH
normal operating mode; VCC =5V 1.5 1.7 1.85 V
low power modes 1.1 1.8 2.5 V
Vdet(sc)(CANL) detection voltage for
short-circuit to battery
voltag e on pi n CANL
normal operating mode
VCC =5V 6.6 7.2 7.8 V
VCC = 4.75 V to 5.25 V 1.32VCC 1.44VCC 1.56VCC V
Vth(wake) wake-up threshold
voltage
on pin CANL low power modes 2.5 3.2 3.9 V
on pin CANH low power modes 1.1 1.8 2.5 V
Vth(wake) difference of wake-up
threshold voltages (on
pins CANL and CANH)
low power modes 0.8 1.4 - V
Vth(se)(CANH) single-ended receiver
threshold voltage on
pin CANH
normal operating mode and
failures 4, 6 and 7
VCC =5V 1.5 1.7 1.85 V
VCC = 4.75 V to 5.25 V 0.30VCC 0.34VCC 0.37VCC V
Vth(se)(CANL) single-ended receiver
threshold voltage on
pin CANL
normal operating mode and
failures 3 and 3a
VCC = 5 V 3.15 3.3 3.45 V
VCC = 4.75 V to 5.25 V 0.63VCC 0.66VCC 0.69VCC V
Ri(se)(CANH) single-ended input
resistance on pin CANH normal operating mode 110 165 270 k
Ri(se)(CANL) single-ended input
resistance on pin CANL normal operating mode 110 165 270 k
Ri(dif) differential input
resistance normal operating mode 220 330 540 k
Table 8. Static characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB =V
CC; Tvj =
40
C to +150
C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1]
Symbol Parameter Conditions Min Typ Max Unit
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Product data sheet Rev. 5 — 6 December 2013 14 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
[1] All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 C for dies on
wafer level, and above this for cased products 100 % tested at Tamb =25C, unless otherwise specified.
11. Dynamic characteristics
Pins RTH and RTL
Rsw(RTL) switch-on resistance on
pin RTL normal operating mode; switch-on
resistance between pin RTL and
VCC; IO<10mA
- 40 100
Rsw(RTH) switch-on resistance on
pin RTH normal operating mode; switch-on
resistance between pin RTH and
ground; IO<10mA
- 40 100
VO(RTH) output voltage on pin RTH low power modes; IO=100A- 0.71.0V
IO(RTL) output current on pin RTL low power modes; VRTL =0V 1.5 0.65 0.1 mA
Ipu(RTL) pull-up current on pin RTL normal operating mode and
failures 4, 6 and 7 -75-A
Ipd(RTH) pull-down current on
pin RTH normal operating mode and
failures 3 and 3a -75-A
Thermal shutdown
Tj(sd) shutdown junction
temperature 160 175 190 C
Table 8. Static characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB =V
CC; Tvj =
40
C to +150
C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1]
Symbol Parameter Conditions Min Typ Max Unit
Table 9. Dynamic characteristics
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB =V
CC; Tvj =
40
C to +150
C; RCAN_L =R
CAN_H = 125
; CCAN_L =
CCAN_H = 1 nF; all voltages are defined with respect to ground; unl ess otherwise specified.[1]
Symbol Parameter Conditions Min Typ Max Unit
tt(reces-dom) transition time for recessive to
dominant (on pins CANL and
CANH)
between 10 % and 90 %; see Figure 5 and 60.2 - - s
tt(dom-reces) transition ti me for dominant to
recessive (on pins CANL and
CANH)
between 10 % and 90 %; see Figure 5 and 60.2 - - s
tPD(L) propagation delay TXD (LOW) to
RXD (LOW) no failures; see Figure 4 to Figure 6 --1.5s
all failures except CAN_L shorted to CAN_H;
see Figure 4 to Figure 6 --1.9s
failure 7, CAN_L shorted to CAN_ H;
RCAN_L = 1 M; see Figure 4 to Figure 6 --1.9s
tPD(H) propagation delay TXD (HIGH) to
RXD (HIGH) no failures; see Figure 4 to Figure 6 --1.5s
all failures except CAN_L shorted to CAN_H;
see Figure 4 to Figure 6 --1.9s
failure 7, CAN_L shorted to CAN_ H;
RCAN_L = 1 M; see Figure 4 to Figure 6 --1.9s
td(sleep) delay time to sleep [2] 5- 50s
tdis(TxD) disable time of TxD permanent
dominant timer normal operating mode; VTXD =0V 0.75 - 4 ms
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Product data sheet Rev. 5 — 6 December 2013 15 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
[1] All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 C for dies on
wafer level, and above this for cased products 100 % tested at Tamb =25C, unless otherwise specified.
[2] To guarantee a successful mode transition under all conditions, the maximum specified time must be applied.
tdom(CANH) dominant time on pin CANH low power modes; VBAT =14V [2] 7- 38s
tdom(CANL) dominant time on pin CANL low power modes; VBAT =14V [2] 7- 38s
tWAKE local wake-up time on pin WAKE low power modes; VBAT = 14 V; for wake-up
after receiving a falling or rising edge [2] 7- 38s
tdet failure detection time normal operating mode
failures 3 and 3a 1.6 - 8.0 ms
failures 4, 6 and 7 0.3 - 1.6 ms
low power modes; VBAT =14V
failures 3 and 3a 1.6 - 8.0 ms
failures 4 and 7 0.1 - 1.6 ms
trec failure recovery time normal operating mode
failures 3 and 3a 0.3 - 1.6 ms
failures 4 and 7 7 - 38 s
failure 6 125 - 750 s
low power modes; VBAT =14V
failures 3, 3a, 4 and 7 0.3 - 1.6 ms
ndet pulse-count failure detection difference between CANH and CANL;
normal operating mode and failures 1, 2, 5
and 6a; pin ERR becomes LOW
-4-
nrec number of consecutive pulses for
failure recovery on CANH and CANL simultaneously;
failures 1, 2, 5 and 6a -4-
Table 9. Dynamic characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 40 V; VSTB =V
CC; Tvj =
40
C to +150
C; RCAN_L =R
CAN_H = 125
; CCAN_L =
CCAN_H = 1 nF; all voltages are defined with respect to ground; unl ess otherwise specified.[1]
Symbol Parameter Conditions Min Typ Max Unit
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Product data sheet Rev. 5 — 6 December 2013 16 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
12. Test information
VCAN =V
CANH VCANL
Fig 4. Timing diagram for dynamic characteristics
mgl424
−5 V
−3.2 V
2.2 V
0.7VCC
0.3VCC
0 V
5 V
1.4 V
3.6 V
0 V
2 V to VCC
VTXD
VCANL
VCANH
ΔVCAN
VRXD
tPD(L) tPD(H)
VTXD is a rectangular signal of 50 kHz with 50 % duty cycle and slope time < 10 ns.
Termination resistors RCAN_L and RCAN_H (125 ) are not connected to pin RTL or pin RTH for
testing purposes because the minimum load allowed on the C AN bus lines is 500 per
transceiver.
Fig 5. Test circuit for dynamic characteristics
001aac932
RCAN_L
CCAN_L
RCAN_H
CCAN_H
RRTH
500 Ω
RRTL
500 Ω
CRXD
10 pF
TJA1055T FAILURE
GENERATION
BAT
BAT
INH
TXD
VTXD
+5 V
VBAT = 5 V to 40 V
RXD
CANL
CANH
VCC
EN
RTL
RTH
2
34
5
6
78
9
12
11
14 101
GND
GND
13 ERR
WAKE
STB
VCC
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Product data sheet Rev. 5 — 6 December 2013 17 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
VTXD is a rectangular signal of 50 kHz with 50 % duty cycle and slope time < 10 ns.
Termination resistors RCAN_L and RCAN_H (125 ) are not connected to pin RTL or pin RTH for
testing purposes because the minimum load allowed on the C AN bus lines is 500 per
transceiver.
Fig 6. Test circuit for dynamic characteristics (TJA1055T/3)
For more information: refer to the separate FTCAN information available on our web site.
Fig 7. Application di agram
001aac933
RCAN_L
CCAN_L
RCAN_H
CCAN_H
RRTH
500 Ω
RRTL
500 Ω
2.5
kΩ
CRXD
10 pF
TJA1055T/3 FAILURE
GENERATION
BAT
BAT
INH
TXD
VTXD
+5 V
+3.3 V
VBAT = 5 V to 40 V
RXD
CANL
CANH
VCC
EN
RTL
RTH
2
34
5
6
78
9
12
11
14 101
GND
GND
13 ERR
WAKE
STB
VCC
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TJA1055 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 6 December 2013 18 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
12.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for
integrated circuits, and is suitable for use in automotive applicat ion s.
For more information: refer to the separate FTCAN information available on our web site.
Fig 8. Application diagram (TJA1055T/3)
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TJA1055 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 6 December 2013 19 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
13. Package outline
Fig 9. Package outline SOT108-1 (SO14)
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Product data sheet Rev. 5 — 6 December 2013 20 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
14. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
14.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
14.2 Wave and reflow soldering
W ave soldering is a joinin g technology in which the joint s are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
•Through-hole components
•Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•Board specifications, including the board finish, solder masks and vias
•Package footprints, including solder thieves and orientation
•The moisture sensitivity level of the packages
•Package placement
•Inspection and repair
•Lead-free soldering versus SnPb soldering
14.3 Wave soldering
Key characteristics in wave soldering are:
•Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
•Solder bath specifications, including temperature and impurities
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Product data sheet Rev. 5 — 6 December 2013 21 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
14.4 Reflow soldering
Key characteristics in reflow soldering are:
•Lead-free ve rsus SnPb soldering; note th at a lead-free reflow process usua lly leads to
higher minimum peak temperatures (see Figure 10) than a SnPb process, thus
reducing the process window
•Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
•Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enoug h for the solder to make reliable solder joint s (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in acco rdance with
Table 10 and 11
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 10.
Table 10. SnPb eutectic process (from J-STD-020D)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350 350
< 2.5 235 220
2.5 220 220
Table 11. Lead-free pr ocess (from J-STD-020D)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350 350 to 2000 > 2000
< 1.6 260 260 260
1.6 to 2.5 260 250 245
> 2.5 250 245 245
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Product data sheet Rev. 5 — 6 December 2013 22 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
15. Appendix
15.1 Overview of differences between the TJA1055 and the TJA1054A
[1] The ESD performance of pins CANH, CANL, RTH and RTL, with respect to GND, was verified by an external test house in accordance
with IEC-61000-4-2 (C = 150 pF, R = 330 ). The results were equal to, or better than, 6 kV for TJA1055 and equal to, or better than,
1.5 kV for TJA1054A.
MSL: Moisture Sensitivity Level
Fig 10. Temperature profiles for large and small components
001aac844
temperature
time
minimum peak temperature
= minimum soldering temperature
maximum peak temperature
= MSL limit, damage level
peak
temperature
Table 12. Limiting values
Symbol Parameter Conditions TJA1055 TJA1054A Unit
Min Max Min Max
VCANH voltage on pin CANH 58 +58 27 +40 V
VCANL voltage on pin CANL 58 +58 27 +40 V
Vesd electrostatic discharge voltage pins RTH, RTL, CANH, CANL
human body model 8+84+4kV
IEC 61000-4-2 [1]
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Product data sheet Rev. 5 — 6 December 2013 23 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
16. Revision history
Table 13. Revision history
Document ID Release date Data sheet status Change notice Supersedes
TJA1055 v.5 20131206 Produ ct data sheet - TJA1055 v.4
Modifications: •Template and legal information (Section 17) updated
•Table 1, Table 6: measurement conditions changed for parameters VCANH and VCANL
•Table 6, Table note 2 added; Fig. 7 and Fig. 8 deleted
•Table 8: parameter Isup(tot) dele te d; parameter values changed: VIH for pins STB, EN and
TXDVH for pin INH
•Table 9: paramete r values changed: tt(reces-dom), tt(dom-reces); table reformatted
•Figure 7, Figure 8: revised (capacitor added)
•Section 12.1: text revised
TJA1055 v.4 20090217 Produ ct data sheet - TJA1055 v.3
TJA1055 v.3 20070313 Produ ct data sheet - TJA1055 v.2
TJA1055 v.2 20061030 Preliminary data sheet - TJA1055 v.1
TJA1055 v.1
(9397 750 14908) 20060801 Objective data sheet - -
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Product data sheet Rev. 5 — 6 December 2013 24 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
17. Legal information
17.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conf lict with the short data sheet, the
full data sheet shall pre vail.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyon d those described in the
Product data sheet.
17.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Se miconductors takes no
responsibility for the content in this document if provided by an inf ormation
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability t owards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descripti ons, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless ot herwise agreed in writing, t he product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconducto rs products in such equipment or
applications an d ther efo re su ch inclusi on a nd/or use is at the cu stome r's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associate d with t heir
applications and products.
NXP Semiconductors does not accept any liabil ity related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the appl ication or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and pro ducts using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress rating s only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Te rms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly ob jects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the obj ective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specificat ion.
Product [short] dat a sheet Production This document contains the product specification.
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Product data sheet Rev. 5 — 6 December 2013 25 of 26
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
No offer to sell or license — Nothing in this document may be interpret ed or
construed as an of fer to sell product s that is op en for accept ance or the grant ,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characte ristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Translations — A non-English (translated) versio n of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
17.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors TJA1055
Enhanced fault-tolerant CAN transceiver
© NXP B.V. 2013. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 6 December 2013
Document identifier: TJA1055
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
19. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
2.1 Optimized for in-car low-speed
communication . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.2 Bus failure management. . . . . . . . . . . . . . . . . . 1
2.3 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.4 Support for low power modes. . . . . . . . . . . . . . 2
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 3
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 5
7.1 Failure detector. . . . . . . . . . . . . . . . . . . . . . . . . 5
7.2 Low power modes . . . . . . . . . . . . . . . . . . . . . . 7
7.3 Power-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.4 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
9 Thermal characteristics . . . . . . . . . . . . . . . . . 11
10 Static characteristics. . . . . . . . . . . . . . . . . . . . 11
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 14
12 Test information. . . . . . . . . . . . . . . . . . . . . . . . 16
12.1 Quality information . . . . . . . . . . . . . . . . . . . . . 18
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19
14 Soldering of SMD packages . . . . . . . . . . . . . . 20
14.1 Introduction to soldering . . . . . . . . . . . . . . . . . 20
14.2 Wave and reflow soldering . . . . . . . . . . . . . . . 20
14.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 20
14.4 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 21
15 Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
15.1 Overview of differences between the
TJA1055 and the TJA1054A . . . . . . . . . . . . . 22
16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 23
17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 24
17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 24
17.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
17.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 24
17.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 25
18 Contact information. . . . . . . . . . . . . . . . . . . . . 25
19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26