– 1 –
E01851B34
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXG1115ER
24 pin VQFN (Plastic)
Description
The CXG1115ER is a dual-band (CDMA/GPS) low
noise amplifier/mixer MMIC for the Japan CDMA
cellular phones (J-CDMA). This IC is designed using
the Sony’s GaAs J-FET process.
Features
• High gain:
CDMA LNA High current mode
Gp = 14.5dB (Typ.)
CDMA MIX Gc = 12dB (Typ.)
GPS LNA Gp = 18dB (Typ.)
GPS MIX Gc = 9.5dB (Typ.)
• Low noise figure:
CDMA LNA High current mode
NF = 1.5dB (Typ.)
CDMA MIX NF = 4.5dB (Typ.)
GPS LNA NF = 1.7dB (Typ.)
GPS MIX NF = 5dB (Typ.)
• Low distortion
CDMA LNA High current mode
Input IP3 = +3.5dBm (Typ.)
CDMA MIX Input IP3 = +2dBm (Typ.)
GPS LNA Input IP3 = –5.5dBm (Typ.)
GPS MIX Input IP3 = +2dBm (Typ.)
• Low noise amplifier with by-pass switch
• J-CDMA/GPS supported dual band
• Sharing the two-system LO signal source by the
doubler system
• 24-pin VQFN small package
Dual-band Low Noise Amplifier/Mixer
Applications
J-CDMA
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings (Ta = 25°C)
•Supply voltage VDD 4.5 V
•Input power PIN +5 dBm
•Operating temperature Topr –35 to +85 °C
•Storage temperature Tstg –65 to +150 °C
Recommended Operating Conditions
•Supply voltage VDD 2.7 to 3.3 V
•Control voltage VCTL (H) 2.4 to 3.3 V
VCTL (L) 0 to 0.3 V
GPS IF
OUT
/V
DD
(MIX)
1
GPS MIX RF
IN
2
GND
3
MPX OPT
4
CTL1
5
GPS LNA
OUT
/V
DD
(LNA)
CTL3
CDMA MIX RF
IN
GND
NC
CTL2
CDMA LNA
OUT
/V
DD
(LNA)
CAP
CDMA LNA
IN
GND
LNA OPT
GPS LNA
IN
CAP
LO
IN
V
DD
(GPS LO)
GND
V
DD
(Logic)
V
DD
(CDMA LO)
CDMA IF
OUT
/V
DD
(MIX)
6
18
17
16
15
14
13
12 11 10 9 8 7
19 20 21 22 23 24
×2
Block Diagram and Pin Configuration
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
– 2 –
CXG1115ER
Electrical Characteristics
Conditions: VDD = 2.7V, VCTL (H) = 2.7V, VCTL (L) = 0V, (Ta = 25°C)
Logic Block
Unit
µA
mA
Max.
50
0.6
Ty p.
35
0.3
Min.
—
—
Symbol
ICTL (H)
IDD
Item
Control pin current
Logic power current consumption
Condition
When no signal
CDMA-LNA Block Conditions: fRF = 850MHz
UnitMax.
0.3
7
5
7.5
–3.3
8
15
16
–8
10
2
2
—
—
—
—
—
—
—
Ty p.
0.1
5
3.2
5.3
–3.8
7
13.5
14.5
–13
8
1.5
1.5
28
8.5
1
3.5
26
18
18
Min.
—
—
—
—
–4.3
6
12
13
—
—
—
—
20
6
–1.5
1.5
21
13
13
Control pin condition
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
Item
Current consumption
Power gain
Noise figure
Input IP3
Isolation
VCTL1 VCTL2VCTL3
L
L
H
H
L
L
H
H
—
L
H
H
L
L
H
H
L
H
H
L
H
L
H
L
H
L
H
—
H
L
H
L
H
L
H
H
L
H
Symbol
IDDSW
IDDM
IDDL
IDDH
GPSW
GPM
GPL
GPH
GPOFF
NFM
NFL
NFH
IIP3SW
IIP3M
IIP3L
IIP3H
ISOM
ISOL
ISOH
Condition
mA
dB
dB
dBm
dB
When no
signal
When a
small signal
∗1
When a
small signal
∗1Conversion from the IM3 suppression ratio for two-wave input: fRF = 850MHz/850.9MHz,
PRF = 0dBm (GPSW mode), PRF = –20dBm (GPM mode), PRF = –25dBm (GPL/GPH mode).
– 3 –
CXG1115ER
GPS-MIX Block Conditions: fRF = 1575MHz, fLO = (fRF – fIF)/2, fIF = 110MHz, PLO = –10dBm
UnitMax.
11
11
–40
6.5
—
–10
Ty p.
8
9.5
–50
5
2
–15
Min.
—
8
—
—
–1.5
—
Control pin condition
H
H
L
H
H
H
Item
Current consumption
Conversion gain
Noise figure
Input IP3
LO – RF leak
VCTL1 VCTL2VCTL3
—
—
—
—
—
—
—
—
—
—
—
—
Symbol
IDD
GC
GCOFF
NF
IIP3
PLK
Condition
mA
dB
dB
dBm
dBm
When no signal
When a small
signal
∗4
@fLO =
fRF – fIF
∗4Conversion from the IM3 suppression ratio for two-wave input: fRF = 1574.5MHz/1575.5MHz, PRF = –25dBm.
GPS-LNA Block Conditions: fRF = 1575MHz
UnitMax.
7.5
19.5
–17
2.2
—
—
Ty p.
5.5
18
–22
1.7
–5.5
28
Min.
—
16.5
—
—
–8
23
Control pin condition
H
H
L
H
H
H
Item
Current consumption
Conversion gain
Noise figure
Input IP3
Isolation
VCTL1 VCTL2VCTL3
—
—
—
—
—
—
—
—
—
—
—
—
Symbol
IDD
GP
GPOFF
NF
IIP3
ISO
Condition
mA
dB
dB
dBm
dB
When no signal
When a small
signal
∗3
When a small
signal
∗3Conversion from the IM3 suppression ratio for two-wave input: fRF = 1574.5MHz/1575.5MHz, PRF = –30dBm.
CDMA-MIX Block Conditions: fRF = 850MHz, fLO = fRF – fIF, fIF = 110MHz, PLO = –10dBm
UnitMax.
11
13.5
–45
6
—
–18
Ty p.
8
12
–55
4.5
2
–23
Min.
—
10.5
—
—
0
—
Control pin condition
L
L
H
L
L
L
Item
Current consumption
Conversion gain
Noise figure
Input IP3
LO – RF leak
VCTL1 VCTL2VCTL3
—
—
—
—
—
—
—
—
—
—
—
—
Symbol
IDD
GC
GCOFF
NF
IIP3
PLK
Condition
mA
dB
dB
dBm
dBm
When no signal
When a small
signal
∗2
—
∗2Conversion from the IM3 suppression ratio for two-wave input: fRF = 850MHz/850.9MHz, PRF = –25dBm.
– 4 –
CXG1115ER
Recommended Evaluation Circuit
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
L14
L15
220nH
220nH
27nH
5.6nH
6.8nH
33nH
12nH
27nH
18nH
22nH
22nH
27nH
2.2nH
22nH
5.6nH
L16
L17
L18
L19
L20
L21
L22
L23
C1
C2
C3
C4
C5
C6
C7
3.3nH
8.2nH
6.8nH
3.9nH
10nH
2.7nH
220nH
220nH
8pF
1000pF
1000pF
100pF
100pF
1000pF
1000pF
C8
C9
C10
C11
C12
C13
C14
R1
L∗1
R∗1
100pF
18pF
100pF
1000pF
8pF
1000pF
1000pF
100Ω
33nH
—
∗1L and R of Pin 9 are used when the optional resistor is added in the low noise amplifier block.
CDMA IF
OUT
V
DD
(MIX)
L3
L4
C3
1
2
3
4
5
6
18
17
16
15
14
13
12 11 10 9 8 7
19 20 21 22 23 24
×2
CTL3
L8
L10
L6
L9
C1
C12
C14
L7 L5
CDMA LNA
OUT
CDMA MIX
IN
LO
IN
CDMA LNA
IN
V
DD
(LNA)
L11
L12
C5
C6
CTL2
C4
L23
L2
C2
L1
C13
L22
L20
L18
L17
CTL1
GPS IF
OUT
V
DD
(Logic)
V
DD
(LO AMP)
GPS MIX
IN
GPS LNA
OUT
GPS LNA
IN
L21
R1
C10
C9
C11
L15
C8
C7 L
R
L14
L13
L19
L16
– 5 –
CXG1115ER
Example of Representative Characteristics (Ta = 25°C)
Low Noise Amplifier Block
CDMA GPM, NFM vs. fRF
fRF – RF frequency [MHz]
GPM – Power gain [dB]
NFM – Noise figure [dB]
860 880
800
0
6
5
4
2
1
7
8
9
5
11
10
9
7
38
6
12
13
14
820 840 900
CDMA GPL, NFL vs. fRF
fRF – RF frequency [MHz]
GPL – Power gain [dB]
NFL – Noise figure [dB]
860 880
800
6
11
10
9
8
7
14
15
16
0
4
3
2
1
13
12
5
820 840 900
CDMA GPH, NFH vs. fRF
fRF – RF frequency [MHz]
GPH – Power gain [dB]
NFH – Noise figure [dB]
860 880
800
6
12
11
10
8
7
13
14
15
16
0
4
2
9
3
1
5
820 840 900
GPS GP, NF vs. fRF
fRF – RF frequency [MHz]
GP – Power gain [dB]
NF – Noise figure [dB]
1585 1605
1525
10
15
14
13
12
11
18
19
20
0
2
1
4
17
16 3
5
1545 1565 1625
VDD = 2.7V
VCTL1 = 2.7V
VCTL2 = 0V
VCTL3 = 0V
VDD = 2.7V
VCTL1 = 0V
VCTL2 = 2.7V
VCTL3 = 2.7V
VDD = 2.7V
VCTL1 = 0V
VCTL2 = 0V
VCTL3 = 2.7V
VDD = 2.7V
VCTL1 = 0V
VCTL2 = 2.7V
VCTL3 = 0V
GPM
NFM
GPL
NFL
GPH
NFH
GP
NF
– 6 –
CXG1115ER
Low Noise Amplifier Block
POUT – RF output power [dBm]
VDD = 2.7V
VCTL1 = 0V
VCTL2 = 0V
VCTL3 = 2.7V
fRF1 = 850MHz
fRF2 = 850.9MHz
CDMA POUT, IM3M vs. PIN
PIN – RF input power [dBm]
–10 0 10
–40
–80
–40
–60
–20
0
20
–50
–70
–30
–10
10
–30 –20
POUT – RF output power [dBm]
VDD = 2.7V
VCTL1 = 0V
VCTL2 = 2.7V
VCTL3 = 0V
fRF1 = 850MHz
fRF2 = 850.9MHz
CDMA POUT IM3L vs. PIN
PIN – RF input power [dBm]
–10 0 10
–40
–80
–40
–60
–20
0
20
–50
–70
–30
–10
10
–30 –20
POUT – RF output power [dBm]
VDD = 2.7V
VCTL1 = 0V
VCTL2 = 2.7V
VCTL3 = 2.7V
fRF1 = 850MHz
fRF2 = 850.9MHz
CDMA POUT, IM3H vs. PIN
PIN – RF input power [dBm]
–10 0 10
–40
–80
–40
–60
–20
0
20
–50
–70
–30
–10
10
–30 –20
POUT – RF output power [dBm]
VDD = 2.7V
VCTL1 = 2.7V
VCTL2 = 0V
VCTL3 = 0V
fRF1 = 1574.5MHz
fRF2 = 1575.5MHz
GPS POUT IM3 vs. PIN
PIN – RF input power [dBm]
–10 0 10
–40
–80
–40
–60
–20
0
20
–50
–70
–30
–10
10
–30 –20
POUT
IM3M
POUT
IM3L
POUT
IM3H
POUT
IM3
– 7 –
CXG1115ER
Mixer Block
CDMA Gc, NF vs. f
RF
fRF – RF frequency [MHz]
Gc – Conversion gain [dB]
NF – Noise figure [dB]
860 880
800
5
14
13
12
11
9
10
8
7
6
15
3
12
10
11
9
8
6
7
5
4
13
820 840 900
GPS Gc, NF vs. f
RF
fRF – RF frequency [MHz]
Gc – Conversion gain [dB]
NF – Noise figure [dB]
1585 1605
1525
1
10
9
8
7
5
6
4
3
2
11
3
12
10
11
9
8
6
7
5
4
13
1545 1565 1625
V
DD
= 2.7V
V
CTL
1 = 2.7V
V
CTL
2 = 0V
V
CTL
3 = 0V
f
LO
= f
RF
– 110MHz
P
LO
= –10dBm
P
OUT
– RF output power [dBm]
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 0V
V
CTL
3 = 0V
f
RF
1 = 850MHz
f
RF
2 = 850.9MHz
f
LO
= 740MHz
CDMA P
OUT
, IM3 vs. P
IN
PIN – RF input power [dBm]
–10 0 10
–40
–80
–40
–60
–20
0
20
–50
–70
–30
–10
10
–30 –20
P
OUT
– RF output power [dBm]
V
DD
= 2.7V
V
CTL
1 = 2.7V
V
CTL
2 = 0V
V
CTL
3 = 0V
f
RF
1 = 1574.5MHz
f
RF
2 = 1575.5MHz
f
LO
= 732.5MHz
GPS P
OUT
, IM3 vs. P
IN
PIN – RF input power [dBm]
–10 0 10
–40
–80
–40
–60
–20
0
20
–50
–70
–30
–10
10
–30 –20
IM3
GC
NF
GC
NF
POUT
IM3
POUT
VDD = 2.7V
VCTL1 = 0V
VCTL2 = 0V
VCTL3 = 0V
fLO = fRF – 110MHz
PLO = –10dBm
– 8 –
CXG1115ER
Mixer Block
CDMA Gc, NF vs. P
LO
PLO – LO input power [dBm]
Gc – Conversion gain [dB]
NF – Noise figure [dB]
–15.0
0
12
10
8
6
4
2
16
4.0
5.5
14
5.0
4.5
6.0
–10.0 –7.5
–12.5 –5.0 –2.5 0
VDD = 2.7V
VCTL1 = 0V
VCTL2 = 0V
VCTL3 = 0V
fRF = 850MHz
fLO = 740MHz
GPS Gc, NF vs. P
LO
PLO – LO input power [dBm]
Gc – Conversion gain [dB]
NF – Noise figure [dB]
–15.0
0
10
8
6
4
2
12
4.0
5.5
6.0
6.5
5.0
4.5
7.0
–10.0 –7.5
–12.5 –5.0 –2.5 0
VDD = 2.7V
VCTL1 = 2.7V
VCTL2 = 0V
VCTL3 = 0V
fRF = 1575MHz
fLO = 732.5MHz
CDMA IIP3 vs. P
LO
PLO – LO input power [dBm]
IIP3 – Input IP3 [dBm]
–15.0
0
3.0
2.5
2.0
1.5
1.0
0.5
4.0
3.5
–10.0 –7.5
–12.5 –5.0 –2.5 0
VDD = 2.7V
VCTL1 = 0V
VCTL2 = 0V
VCTL3 = 0V
fRF = 850MHz
fLO = 740MHz
GPS IIP3 vs. P
LO
PLO – LO input power [dBm]
IIP3 – Input IP3 [dBm]
–15.0
0
2.5
2.0
1.5
1.0
0.5
3.0
–10.0 –7.5
–12.5 –5.0 –2.5 0
VDD = 2.7V
VCTL1 = 2.7V
VCTL2 = 0V
VCTL3 = 0V
fRF = 1575MHz
fLO = 732.5MHz
NF
GC
GC
NF
– 9 –
CXG1115ER
Characteristics Example When the Optional Resistor R is Added (Ta = 25°C)
Low Noise Amplifier Block
∗ Measured with the choke inductor (L = 33nH) for decoupling inserted to Pin 9 (LNA OPT pin) in series.
CDMA IDDM vs. R
R – Optional resistor [Ω]
I
DDM
– Current consumption [mA]
OPEN
2
8
7
6
5
4
3
10
9
47 27
120 15 10
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 0V
V
CTL
3 = 2.7V
CDMA IDDL vs. R
R – Optional resistor [Ω]
I
DDL
– Current consumption [mA]
OPEN
2
8
7
6
5
4
3
10
9
47 27
120 15 10
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 2.7V
V
CTL
3 = 0V
CDMA GPM, NFM vs. R
R – Optional resistor [Ω]
G
PM
– Power gain [dB]
NF
M
– Noise figure [dB]
OPEN
5
7
6
8
7
9
8
10
47 27
120 15 10
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 0V
V
CTL
3 = 2.7V
f
RF
= 850MHz
P
RF
= –20dBm
CDMA GPL, NFL vs. R
R – Optional resistor [Ω]
G
PL
– Power gain [dB]
NF
L
– Noise figure [dB]
OPEN
11
13
12
15
14
1.0
2.0
1.5
3.0
2.5
47 27
120 15 10
CDMA IIP3M, ISOM vs. R
R – Optional resistor [Ω]
IIP3
M
– Input IP3 [dBm]
I
SOM
– Isolation [dB]
OPEN
6
8
7
10
9
26
29
28
27
30
47 27
120 15 10
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 0V
V
CTL
3 = 2.7V
f
RF
1 = 850MHz
f
RF
2 = 850.9MHz
P
RF
= –20dBm
CDMA IIP3L, ISOL vs. R
R – Optional resistor [Ω]
IIP3
L
– Input IP3 [dBm]
I
SOL
– Isolation [dB]
OPEN
0
3
2
1
5
4
15
18
17
16
20
19
47 27
120 15 10
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 2.7V
V
CTL
3 = 0V
f
RF
1 = 850MHz
f
RF
2 = 850.9MHz
P
RF
= –25dBm
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 2.7V
V
CTL
3 = 0V
f
RF
= 850MHz
P
RF
= –25dBm
IIP3
L
I
SOL
I
SOM
G
P
M
NF
M
G
PL
NF
L
IIP3
M
– 10 –
CXG1115ER
CDMA I
DDH
vs. R
R – Optional resistor [Ω]
I
DDH
– Current consumption [mA]
OPEN
2
8
7
6
5
4
3
10
9
47 27
120 15 10
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 2.7V
V
CTL
3 = 2.7V
GPS IDD vs. R
R – Optional resistor [Ω]
I
DD
– Current consumption [mA]
OPEN
2
8
7
6
5
4
3
10
9
47 27
120 15 10
V
DD
= 2.7V
V
CTL
1 = 2.7V
V
CTL
2 = 0V
V
CTL
3 = 0V
CDMA GPH, NFH vs. R
R – Optional resistor [Ω]
G
PH
– Power gain [dB]
NF
H
– Noise figure [dB]
GPS G
P
, NF vs. R
R – Optional resistor [Ω]
G
P
– Power gain [dB]
NF – Noise figure [dB]
OPEN
16
18
17
20
19
1.0
2.0
1.5
3.0
2.5
47 27
120 15 10
OPEN
12
14
13
16
15
1.0
2.0
1.5
3.0
2.5
47 27
120 15 10
CDMA IIP3H, ISOH vs. R
R – Optional resistor [Ω]
IIP3
H
– Input IP3 [dBm]
I
SOH
– Isolation [dB]
OPEN
3
5
4
6
14
19
18
17
16
15
20
47 27
120 15 10
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 2.7V
V
CTL
3 = 2.7V
f
RF
1 = 850MHz
f
RF
2 = 850.9MHz
P
RF
= –25dBm
GPS IIP3, ISO vs. R
R – Optional resistor [Ω]
IIP3 – Input IP3 [dBm]
I
SO
– Isolation [dB]
OPEN
–6
–3
–4
–5
–1
–2
26
29
28
27
31
30
47 27
120 15 10
V
DD
= 2.7V
V
CTL
1 = 2.7V
V
CTL
2 = 0V
V
CTL
3 = 0V
f
RF
= 1575MHz
P
RF
= –30dBm
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 2.7V
V
CTL
3 = 2.7V
f
RF
= 850MHz
P
RF
= –25dBm
V
DD
= 2.7V
V
CTL
1 = 2.7V
V
CTL
2 = 0V
V
CTL
3 = 0V
f
RF
1 = 1574.5MHz
f
RF
2 = 1575.5MHz
P
RF
= –30dBm
G
P
NF
IIP3
H
IIP3
G
PH
NF
H
I
SO
I
SOH
Low Noise Amplifier Block
∗ Measured with the choke inductor (L = 33nH) for decoupling inserted to Pin 9 (LNA OPT pin) in series.
– 11 –
CXG1115ER
Characteristics Example When the Optional Resistor R is Added (Ta = 25°C)
Mixer Block
CDMA I
DD
(MIX) vs. R1
R1 – Optional resistor [Ω]
I
DD
(MIX) – Mixer block current consumption [mA]
OPEN
5
8
7
6
10
9
47 27
100 10
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 0V
V
CTL
3 = 0V
GPS I
DD
(MIX) vs. R1
R1 – Optional resistor [Ω]
I
DD
(MIX) – Mixer block current consumption [mA]
OPEN
3
7
6
5
4
8
47 27
100 10
V
DD
= 2.7V
V
CTL
1 = 2.7V
V
CTL
2 = 0V
V
CTL
3 = 0V
CDMA Gc, NF vs. R1
R1 – Optional resistor [Ω]
Gc – Conversion gain [dB]
NF – Noise figure [dB]
OPEN
10.0
12.0
11.0
13.0
11.5
10.5
12.5
47 27
100 10
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 0V
V
CTL
3 = 0V
f
RF
= 850MHz
f
LO
= 740MHz
P
LO
= –25dBm
GPS Gc, NF vs. R1
R1 – Optional resistor [Ω]
Gc – Conversion gain [dB]
NF – Noise figure [dB]
OPEN
6.0
8.0
7.0
10.0
9.0
6.5
8.5
7.5
9.5
4.0
5.0
4.5
8.0
5.5
6.0
6.5
7.0
7.5
4.0
5.0
4.5
7.0
5.5
6.0
6.5
47 27
100 10
CDMA IIP3 vs. R1
R1 – Optional resistor [Ω]
IIP3 – Input IP3 [dBm]
OPEN
0
1
3
2
5
4
47 27
100 10
GPS IIP3 vs. R1
R1 – Optional resistor [Ω]
IIP3 – Input IP3 [dBm]
OPEN
0
3
2
1
5
4
47 27
100 10
V
DD
= 2.7V
V
CTL
1 = 2.7V
V
CTL
2 = 0V
V
CTL
3 = 0V
f
RF
= 1575MHz
f
LO
= 732.5MHz
P
LO
= –25dBm
V
DD
= 2.7V
V
CTL
1 = 0V
V
CTL
2 = 0V
V
CTL
3 = 0V
f
RF
= 850MHz
f
LO
= 740MHz
P
LO
= –25dBm
V
DD
= 2.7V
V
CTL
1 = 2.7V
V
CTL
2 = 0V
V
CTL
3 = 0V
f
RF
= 1575MHz
f
LO
= 732.5MHz
P
LO
= –25dBm
G
C
NF
G
C
NF
– 12 –
CXG1115ER
Recommended Evaluation Board
Front
Enlarged Diagram of Center Part
GPS LNA RFIN
GPS LNA RFOUT
GPS MIX RFIN
CDMA LNA RFIN
VDD (LO AMP) VCTL2 GND
GND
VDD (LNA) VDD (Logic)
VDD (MIX)VCTL1VCTL3
CDMA LNA RFOUT
CDMA MIX RFIN
LOIN CDMA MIX IFOUT GPS MIX IFOUT
50mm
50mm
C6
C7
C8 L17
C9
C10
L19
L21
C11
R1
L20
C12
L18
L15
L16
L14
L13
L12
C5
L9
L11
L8
L6
L7
L5 C1
L4
L2
L1
L23
L22
L3
C4
C3
C2 C14
C13
L10
Glass fabric-base 4-layer epoxy board (thickness: 0.2mm × 2)
GND for the whole 2nd and 3rd layers
– 13 –
CXG1115ER
LEAD SPECIFICATIONS
ITEM
LEAD MATERIAL COPPER ALLOY
SOLDER PLATING Sn-Bi Bi:1-4wt%
LEAD TREATMENT THICKNESS 5-18µm
SPEC.
C
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
EPOXY RESIN
SOLDER PLATING
COPPER ALLOY
PACKAGE STRUCTURE
4.0
3.6
AB
0.05 MSA-B C
(0.39)
(0.15)
VQFN-24P-03
24PIN VQFN(PLASTIC)
0.04g
0.2 SA-B C
x 4
x 4
0.4
0.05
0.7
C 0.6
1.0
4.78
TERMINAL SECTION
0.2 ± 0.01
0.225 ± 0.03
Solder Plating
0.14
0.13 ± 0.025
+ 0.09
– 0.03
(Stand Off)
0.03 ± 0.03 (∗1)
0.6 ± 0.1
45˚
0.9 ± 0.1
S
PIN 1 INDEX
1
7
12
1318
19
24
6
0.2 SA-B C
S
Sony Corporation
Package Outline Unit: mm
