SLVS346−SEPTEMBER 2003
FEATURES
DUltralow Noise: 60-µVRMS Typical
DHigh PSRR: 65-dB Typical at 1 kHz
DLow Dropout Voltage: 280-mV Typical at
200 mA, 2.5 V
DAvailable in −2.5 V, and Adjustable
(−1.2 V to −10 V) Versions
DStable With a 2.2-µF Ceramic Output
Capacitor
DLess Than 2-µA Typical Quiescent Current in
Shutdown Mode
D2% Overall Accuracy (Line, Load,
Temperature)
DThermal and Overcurrent Protection
D5-Pin SOT-23 (DBV) Package
D−40°C to 125°C Operating Junction
Temperature Range
APPLICATIONS
DOptical Drives
DOptical Networking
DNoise Sensitive Circuitry
DGaAs FET Gate Bias
DVideo Amplifiers
DESCRIPTION
The TPS723xx family of low-dropout (LDO) negative
voltage regulators offers an ideal combination of features
to support low noise applications. The devices are capable
of operating with input voltages from −10 V to −2.7 V, and
supporting outputs from −10 V to −1.2 V. These regulators
are stable with small, low-cost ceramic capacitors, and
include enable (EN) and noise reduction (NR) functions.
Thermal short-circuit and over-current protections are
provided by internal detection and shutdown logic. High
PSRR (65 dB at 1 k Hz) and low noise (60 µVRMS) make
the TPS723xx ideal for low-noise applications.
The TPS723xx uses a precision voltage reference to
achieve 2% overall accuracy over load, line, and
temperature variations. Available in a small SOT23−5
package, the TPS723xx family is fully specified over a
temperature range of −40°C to 125°C.
3
2
4
5
DBV PACKAGE (TOP VIEW)
TPS723xx
1GND
IN
EN
OUT
NR
Fixed Option
3
2
4
5
DBV PACKAGE (TOP VIEW)
TPS72301
1GND
IN
EN
OUT
FB
Adjustable Option
ON
ON
OFF
GND
+1.5 V
−1.5 V
OUT
NR
GND
EN
IN
3
2
4
1
5
TYPICAL APPLICATION CIRCUIT
ON
ON
OFF
GND
+1.5 V
−1.5 V
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
www.ti.com
Copyright 2003, Texas Instruments Incorporated
SLVS346−SEPTEMBER 2003
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2
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TJVOLTAGE(1) PACKAGE PART NUMBER SYMBOL
−40°C to 125°C
Variable −1.2 V to −10 V
SOT-23 (DBV)
TPS72301DBVT(2) TPS72301DBVR(3) TO8I
−40
°
C to 125
°
C
−2.5 V
SOT-23 (DBV)
TPS72325DBVT(2) TPS72325DBVR(3) TO2I
(1) Custom output voltages from −1.2 V to −9 V in 100-mV increments are available. Minimum order quantities apply. Contact TI for details and
availability.
(2) The DBVT indicates tape and reel of 250 parts.
(3) The DBVR indicates tape and reel of 3000 parts.
ABSOLUTE MAXIMUM RATINGS
over operating temperature range (unless otherwise noted)(1)(2)
UNITS
Input voltage range, VIN −11 V to 0.3 V
Enable voltage range, V(EN) −VI to 5 V
Output voltage range, VOUT −11 + VDO
Output current, IOUT Internally limited
Output short-circuit duration Indefinite
Continuous total power dissipation, PDSee Dissipation Rating Table
Junction temperature range, TJ−55°C to 150°C
Storage temperature range, Tstg −65°C to 150°C
ESD rating, HBM 2 kV
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only , an d
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
Input voltage range, VIN −10 −2.7 V
Output voltage range, VOUT −10 + VDO −1.2 V
Operating junction temperature, TJ−40 125 °C
SLVS346−SEPTEMBER 2003
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3
ELECTRICAL CHARACTERISTICS
over operating junction temperature range, VIN = VOUT(nom) − 0.5 V, IOUT = 1 mA, V(EN) = 1.5 V, COUT = 2.2 µF, C(NR) = 0.01 µF (unless
otherwise noted). Typical values are at 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range(1) −10 −2.7 V
V(FB) Feedback reference voltage TPS72301 TJ = 25°C −1.210 −1.186 −1.162 V
Output voltage range TPS72301 −10 + VDO V(FB) V
Nominal TJ = 25°C −1% 1%
VOUT Accuracy TPS72325 vs
VIN/IOUT/T
−10 V < VIN < VOUT − 0.5 V, 10 µA <
−2% ±1% 2%
Accuracy
TPS72301 vs
VIN/IOUT/T
−10 V < VIN < VOUT − 0.5 V, 10 µA <
IOUT < 200 mA −3% ±1% 3%
VOUT%/VIN Line regulation −10 V < VIN < VOUT(nom) − 0.5 V 0.04 %/V
VOUT%/IOUT Load regulation 0 mA < IO < 200 mA 0.002 %/mA
VDO Dropout voltage at
VOUT = 0.96 x VOUT(nom) TPS72325 IOUT = 200 mA 280 500 mV
I(CL) Current limit VOUT = 0.85 x VOUT(nom) 300 550 800 mA
I(GND)
Ground pin current
IOUT = 0 mA, (IQ)
−10 V < VIN < VOUT − 0.5 V 130 200
A
I(GND) Ground pin current IOUT = 200 mA,
−10 V < VIN < VOUT − 0.5 V 350 500 µA
I(SHDN) Shutdown ground pin current −0.4 V < V(EN) < 0.4 V,
−10 V < VIN < VOUT − 0.5 V 0.1 2.0 µA
I(FB) Feedback pin current , −10 V < VIN < VOUT − 0.5 V 0.05 1.0 µA
PSRR
Power supply rejection
TPS72325
IOUT = 200 mA, 1 kHz, CIN = COUT =
10 µF65
dB
PSRR
Power supply rejection
ratio TPS72325 IOUT = 200 mA, 10 kHz, CIN = COUT =
10 µF48 dB
VnOutput noise voltage TPS72325 COUT = 10 µF, 10 Hz = 100 kHz,
IOUT = 200 mA 60 µVrms
t(STR) Startup time VOUT = −2.5 V, COUT = 1 µF, RL = 25 Ω1 ms
VEN(hi) Enable threshold positive 1.5 V
VEN(lo) Enable threshold negative −1.5 V
VDIS(hi) Disable threshold positive 0.4 V
VDIS(lo) Disable threshold negative −0.4 V
I(EN) Enable pin current −10 V ≤ VIN ≤ V − 0.5 V,
−10 V ≤ V(EN) ≤ ±3.5 V 0.1 2.0 µA
Thermal shutdown temperature
Shutdown, temperature increasing 165
°C
Thermal shutdown temperature Reset, temperature decreasing 145 °C
TJOperating junction temperature −40 125 °C
(1) Maximum VIN = VOUT + VDO or − 2.7 V, whichever is more negative.
SLVS346−SEPTEMBER 2003
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4
FUNCTIONAL BLOCK DIAGRAM
TPS72301
OUT
IN
FB
GND
EN
Vref
1.19 V
TPS72325
OUT
IN
GND
EN
Current Limit
/ Thermal
Protection
Current Limit
/ Thermal
Protection
NR
5 pF
100 kΩ
Vref
1.19 V
100 kΩ
5 pF
−
+
−
+
R1
R1
R2
R1 + R2 = 97 kW
R1 + R2 = 97 kW
R2
Terminal Functions
TERMINAL
DESCRIPTION
NAME NO.
DESCRIPTION
GND 1 Ground
VIN 2 Unregulated input supply
EN 3 Bipolar enable pin. Driving this pin above the positive enable threshold or below the negative enable threshold turns
on the regulator. Driving this pin below the positive disable threshold and above the negative disable threshold puts
the regulator into shutdown mode.
NR 4 Fixed voltage versions only. Connecting an external capacitor between this pin and ground, bypasses noise
generated by the internal bandgap. This allows output noise to be reduced to very low levels.
FB 4 Adjustable voltage version only. This is the input to the control loop error amplifier. It is used to set the output voltage
of the device
VOUT 5 Regulated output voltage. A small 2.2 µF ceramic capacitor is needed from this pin to GND to ensure stability.
SLVS346−SEPTEMBER 2003
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5
TYPICAL CHARACTERISTICS
(TPS72325 VIN = VOUT(nom) − 0.5 V, IOUT = 1 mA, V(EN) = 1.5 V, COUT = 2.2 µF, C(NR) = 0.01 µF unless otherwise noted)
Figure 1
−2.525
−2.513
−2.500
−2.488
−2.475
−10 −9 −8 −7 −6 −5 −4 −3 −2
TJ = −40°C
TJ = 25°C
TJ = 85°C
TJ = 125°C
VIN − Input Voltage − V
− Output Volatge − V
OUTPUT V O LTAGE
vs
INPUT VOLTAGE
VOUT
Figure 2
−2.525
−2.513
−2.500
−2.488
−2.475
0 50 100 150 200
IOUT − Output Current − mA
OUTPUT V O LTAGE
vs
OUTPUT CURRENT
TJ = 125°C
TJ = 25°C
TJ = −40°C
− Output Volatge − VVOUT
Figure 3
−2.525
−2.513
−2.500
−2.488
−2.475
−40 −20 0 20 40 60 80 100 120 140
TA − Ambient Temperature − °C
OUTPUT V O LTAGE
vs
AMBIENT TEMPERATURE
VI = 10 V,
IO = 0
VI = 3 V,
IO = 200 mA
VI = 10 V,
IO = 200 mA
VI = 3 V,
IO = 0
− Output Volatge − VVOUT
Figure 4
0
50
100
150
200
250
300
350
−10 −9 −8 −7 −6 −5 −4 −3 −2
VIN − Input Voltage − V
− Dropout Voltage − mV
TPS72301
DROPOUT VO LTAGE
vs
INPUT VOLTAGE
VDO
TJ = 125°C
TJ = −40°C
TJ = 25°C
Figure 5
0
50
100
150
200
250
300
350
0 25 50 75 100 125 150 175 200
IOUT − Output Current − mA
− Dropout Voltage − mV
DROPOUT VO LTAGE
vs
OUTPUT CURRENT
VDO
TJ = 125°C
TJ = −40°C
TJ = 25°C
Figure 6
0
50
100
150
200
250
300
350
−40 −20 0 20 40 60 80 100 120 14
0
− Dropout Voltage − mV
TPS72325
DROPOUT VO LTAGE
vs
AMBIENT TEMPERATURE
VDO
TA − Ambient Temperature − °C
Figure 7
0
50
100
150
200
250
300
350
400
450
500
−10 −9 −8 −7 −6 −5 −4 −3 −2 −1 0
RL = 12.5 Ω
VIN − Input Voltage − V
Ground Current −
GROUND CURRENT
vs
INPUT VOLTAGE
Aµ
No,Loads
Figure 8
0
50
100
150
200
250
300
350
400
0 50 100 150 200
Ground Current −
GROUND CURRENT
vs
OUTPUT CURRENT
Aµ
IOUT − Output Current − mA
TJ = 25°C
TJ = −40°C
TJ = 125°C
Figure 9
0
50
100
150
200
250
300
350
400
450
500
−40 −20 0 20 40 60 80 100 120 140
GROUND CURRENT
vs
AMBIENT TEMPERATURE
VI = 10 V, IO = 0
VI = 10 V, IO = 200 mA
VI = 3 V, IO = 0
TA − Ambient Temperature − °C
Ground Current − Aµ
SLVS346−SEPTEMBER 2003
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6
Figure 10
550
300
350
400
450
500
600
650
700
750
800
−40 −20 0 20 40 60 80 100 120 140
TPS72325
CURRENT LIMIT
vs
AMBIENT TEMPERATURE
TA − Ambient Temperature − °C
Current Limit − mA
Figure 11
0
50
100
150
200
250
−40 −20 0 20 40 60 80 100 120 140
VIN = −3 V
VIN = −10 V
STANDBY CURRENT
vs
AMBIENT TEMPERATURE
TA − Ambient Temperature − °C
Standby Current − nA
Figure 12
−2000
−1800
−1600
−1400
−1200
−1000
−800
−600
−400
−200
0
200
−40 −20 0 20 40 60 80 100 120 140
VOUT = −1.2 V
VOUT = −2.5 V
TPS72301
FEEDBACK PIN CURRENT
vs
AMBIENT TEMPERATURE
TA − Ambient Temperature − °C
Standby Current − nA
Figure 13
−1000
−800
−600
−400
−200
0
200
400
600
800
1000
−40 −20 20 40 60 80 100 120 140
0
VIN = −10 V, V(EN)= 3.5 V
ENABLE PIN CURRENT
vs
AMBIENT TEMPERATURE
TA − Ambient Temperature − °C
Enable Pin Current − nA
VIN = −10 V, V(EN) −0.5 V
VIN = −10 V, V(EN)= −10 V
Figure 14
−0.25
−0.13
0
0.13
0.25
−40 −20 0 20 40 60 80 100 120 14
0
LINE AND LOAD REGULATION
vs
AMBIENT TEMPERATURE
TA − Ambient Temperature − °C
Line Regulation − %/V
Load
Line
Load Regulation − %/mA
Figure 15
−10
−9
−8
−7
−6
−5
−4
−3
−2
−10 −9 −8 −7 −6 −5 −4 −3 −2
VIN − Input Voltage − V
Minimum Required Input Voltage − V
TPS72301
MINIMUM REQUIRED INPUT VOLTAGE
vs
OUTPUT VOLTAGE
TJ = −40°C
TJ = 125°C
Figure 16
TPS72325
LINE TRANSIENT RESPONSE
0
0
−4.0
−4.5
−3.5
−3.0
VOUT − Output Voltage − mV
VIN − Input Voltage − V
t − Time − µs
0604020 80 100 140120 160 180 200
CIN = 2.2 µF
COUT= 2.2 µF
Cbyp = 0 µF
50
−50
Figure 17
TPS72325
LOAD TRANSIENT RESPONSE
t − Time − µs
Current Load − mA VOUT
Output Voltage − V
∆ − Change In
0
−100
100
0
0604020 80 100 140120 160 180 200
−200
CIN = 2.2 µF
COUT= 2.2 µF
Cbyp = 0 µF
Figure 18
TPS72325
LOAD TRANSIENT RESPONSE
t − Time − µs
Current Load − mA
VOUT
Output Voltage − V
∆
− Change In
0
−200
100
0
0604020 80 100 140120 160 180 200
−100
CIN = 2.2 µF
COUT= 2.2 µF
Cbyp = 0 µF
SLVS346−SEPTEMBER 2003
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7
Figure 19
TPS72325
START-UP RESPONSE
CIN= 2.2 µF,
COUT = 2.2 µF,
IOUT = 50 mA,
Cbyp = 0 µF
t − Time − ms
0 0.30.
2
0.1 0.4 0.5 0.70.6 0.8 0.9 1
VOUT − Output Voltage − mV
VIN − Input Voltage − V
Figure 20
0
1
3
2
1
TPS72325
START-UP RESPONSE
0
2
t − Time − ms
0 0.30.20.1 0.4 0.5 0.70.6 0.8 0.9 1
CIN = 2.2 µF,
COUT = 2.2 µF,
IOUT = 50 mA,
Cbyp = 0.01 µF
VOUT − Output Voltage − mV
VIN − Input Voltage − V
Figure 21
TPS72325
POWERUP-POWERDOWN
CIN = 2.2 µF,
COUT = 2.2 µF,
IOUT = 50 mA,
Cbyp = 0 µF
0 V
−3.5 V
V
OUT
− Output Voltage − mV
210346578910
t − Time − ms
VIN − Input Voltage − V
Figure 22
0
50
100
150
200
250
1 10 100 1 k 10 k 100 k
C(NR) − pF
Total Noise −
TPS72325
T OTAL NOISE
vs
C(NR) (10 Hz − 100 kHz)
Vµrms
COUT = 2.2 µF,
IOUT = 100 mA CIN −2.2 µF
COUT = 10 µF,
IOUT = 100 mA
COUT = 2.2 µF,
IOUT = 25 µA
COUT = 10 µF,
IOUT = 25 µA
Figure 23
t − Time −1 ms / div
TPS72325
OUTPUT NOISE
vs
TIME
CIN −2.2 µF, COUT = 2.2 µF,
Cbyp = 0.01 µF, IOUT = 100 mA
100 µV / div
Figure 24
Vrms Hz
f − Frequency − Hz
100 n
100 1 k 10 k
Noise Spectral Density −
TPS72325
NOISE SPECTRAL DENSITY
vs
FREQUENCY
10
100
k
10 n
IOUT = 25 µA
CIN = 0.01 µF ,
COUT = 2.2 µF,
Cbyp = 0.01 µF,
IOUT = 100 mA
µ
1µ
Figure 25
Vrms Hz
f − Frequency − Hz
100 1 k 10 k
Noise Spectral Density −
TPS72325
NOISE SPECTRAL DENSITY
vs
FREQUENCY
100 k
100 n
10 n
IOUT = 25 µA
IOUT = 100 mA
CIN = 0 µF,
COUT = 2.2 µF,
Cbyp = 0.01 µF,
10µ
1µ
Figure 26
40
30
0
10 100 1 k 10 k
50
60
90
100 k 1 M
70
10
−10
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
f − Frequency − Hz
PSRR − Power Supply Rejection Ratio − dB
20
80
IOUT = 1 mA
IOUT = 100 mA
IOUT = 200 mA
VIN = −5 V,
CIN = 10 µF,
COUT = 10 µF,
Cbyp = 0
Figure 27
40
30
0
10 100 1 k 10 k
50
60
90
100 k 1 M
70
10
−10
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
f − Frequency − Hz
PSRR − Power Supply Rejection Ratio − dB
20
80
IOUT = 100 mA
IOUT = 200 mA
VIN = −5 V,
CIN = 10 µF,
COUT = 10 µF,
Cbyp = 0.01
IOUT = 1 mA
SLVS346−SEPTEMBER 2003
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8
APPLICATION INFORMATION
DEVICE OPERATION
The TPS723xx is a low-dropout negative linear voltage
regulator with a rated current of 200 mA. It is offered in
trimmed output voltages between −1.5 V and −5.2 V and
as an adjustable regulator from −1.2 V to −10 V. It features
very low noise and high PSRR making it ideal for high
sensitivity analog and RF applications. A shutdown mode
is available, reducing ground current to 2 µA maximum
over temperature and process. The TPS723xx is offered
in a small SOT23 package and is specified over a −40°C
to 125°C temperature range.
ENABLE
The enable pin is active above 1.5 V and below −1.5 V,
allowing it to be controlled by a standard TTL signal or by
connection to VI if not used. When driven to GND most
internal circuitry is turned off, putting the TPS723xx into
shutdown mode, drawing 2 µA maximum ground current.
ADJUSTABLE VOLTAGE APPLICATIONS
The TPS72301 allows designers to specify any output
voltage from −10 V to −1.2 V. As shown in the application
circuit in Figure 28, an external resistor divider is used to
scale the output voltage VO to the reference voltage
1.186 V. For best accuracy, use precision resistors for R1
and R2.
OUT
FB
R2
GND
EN
IN
3
2
4
1
R1
5
VO+1.186 ǒ1)R1
R2Ǔ
Figure 28. TPS72301 Adjustable LDO Regulator
Programming
CAPACITOR SELECTION FOR STABILITY
Appropriate input and output capacitors should be used for
the intended application. The TPS723xx only requires a
2.2-µF ceramic output capacitor to be used for stable
operation. Both the capacitor value and ESR affect
stability, output noise, PSRR, and transient response. For
typical applications, a 2.2-µF ceramic output capacitor
located close to the regulator is sufficient.
OUTPUT NOISE
Without external bypassing, output noise of the TPS723xx
from 10 Hz to 100 kHz is 200 µVRMS typical. The dominant
contributor to output noise is the internal bandgap
reference. Adding an external 0.01-µF capacitor to ground
reduces noise to 60 µVRMS. Best noise performance is
achieved using appropriate low ESR capacitors for
bypassing noise at the NR and VOUT pins. See the Noise
vs COUT plot in the Typical Characteristics section.
POWER SUPPLY REJECTION
The TPS723xx offers a very high power supply rejection
ratio (PSRR) for applications with noisy input sources or
highly sensitive output supply lines. For best PSRR, use
high quality input and output capacitors.
CURRENT LIMIT
The TPS723xx has internal circuitry that monitors and
limits output current to protect the regulator from damage
under all load conditions. When output current reaches t h e
output current limit (550 mA typical), protection circuitry
turns on, reducing output voltage to ensure current does
not increase. See Current Limit in the Typical
Characteristics section.
THERMAL PROTECTION
As protection from damage due to excessive junction
temperatures, the TPS723xx has internal protection
circuitry. When junction temperature reaches
approximately 1 6 5 °C, the output device is turned off. After
the device has cooled by about 20 °C, the output device is
enabled, allowing normal operation. For reliable operation,
design is for worst case junction temperature of ≤ 125°C
taking into account worst case ambient temperature and
load conditions.
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