Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9RS08KA8
Rev. 4, 6/2009
© Freescale Semiconductor, Inc., 2008-2009. All rights reserved.
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
MC9RS08KA8
Features:
• 8-Bit RS08 Central Processor Unit (CPU)
– Up to 20 MHz CPU at 1.8 V to 5.5 V across temperature
range of –40°C to 85°C
– Subset of HC08 instruction set with added BGND
instruction
•On-Chip Memory
– 8 KB flash read/program/erase over full operating
voltage and temperature; KA4 has 4 KB flash
– 254 byte random-access memory (RAM); KA4 has 126
byte RAM
– Security circuitry to prevent unauthorized access to
RAM and flash contents
• Power-Saving Modes
– Wait and stop
– Wakeup from power-saving modes using real-time
interrupt (RTI), KBI, or ACMP
• Clock Source Options
– Oscillator (XOSC) — Loop-Control Pierce oscillator;
crystal or ceramic resonator range of 31.25 kHz to
39.0625 kHz or 1 MHz to 5 MHz
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2% resolution
and 2% deviation over temperature and voltage;
supports bus frequencies up to 10 MHz
• System Protection
– Watchdog computer operating properly (COP) reset
with option to run from dedicated 1 kHz internal clock
source or bus clock
– Low-Voltage detection with reset or interrupt
– Illegal opcode detection with reset
– Illegal address detection with reset
– Flash block protection
• Development Support
– Single-Wire background debug interface
– Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
• Peripherals
–ADC — 12-channel, 10-bit resolution; 2.5 μs
conversion time; automatic compare function; operation
in stop; fully functional from 2.7 V to 5.5 V (8-channels
available on 16-pin package)
–TPM — One 2-channel; selectable input capture, output
compare, or buffered edge- or center-aligned PWM on
each channel
–IIC — Inter-Integrated circuit bus module capable of
operation up to 100 kbps with maximum bus loading;
capable of higher baudrates with reduced loading
–MTIM1 and MTIM2 — Two 8-bit modulo timers
–KBI — Keyboard interrupts with rising or falling edge
detect; eight KBI ports in 16-pin and 20-pin packages
–ACMP — Analog comparator: full rail-to-rail supply
operation; option to compare to fixed internal bandgap
reference voltage; can operate in stop mode
• Input/Output
– 14/18 GPIOs including one output only pin and one
input only pin
– Hysteresis and configurable pullup device on all input
pins; configurable slew rate and drive strength on all
output pins
• Package Options
– 16-pin SOIC, PDIP or TSSOP
– 20-pin SOIC or PDIP
MC9RS08KA8 Series
Covers: MC9RS08KA8
MC9RS08KA4
TBD
20-Pin W-SOIC
Case 751D
16-Pin W-SOIC
Case 751G
20-Pin PDIP
Case 738C
16-Pin PDIP
Case 648
TBD
TBD
TBD
16-Pin TSSOP
Case 948F
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor2
Table of Contents
1 MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3.2 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . . .5
3.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . .6
3.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .6
3.5 ESD Protection and Latch-Up Immunity . . . . . . . . . . . . .7
3.6 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.7 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .15
3.8 External Oscillator (XOSC) Characteristics . . . . . . . . .18
3.9 AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.9.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.9.2 TPM/MTIM Module Timing . . . . . . . . . . . . . . . . 20
3.10 Analog Comparator (ACMP) Electrical . . . . . . . . . . . . 20
3.11 Internal Clock Source Characteristics . . . . . . . . . . . . . 21
3.12 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.13 Flash Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5 Mechanical Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will
be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to:
http://freescale.com/
The following revision history table summarizes changes contained in this document.
Revision Date Description of Changes
1 1/22/2008 Initial public release
2 10/7/2008
Updated Figure 4 and Figure 10.
Updated “How to Reach Us” information.
Added 16-pin TSSOP package information.
3 11/4/2008 Updated operating voltage in Ta b le 7.
4 6/11/2009 Added output voltage of high drive at 5 V, Iload = 10 mA in the Ta b le 7 .
Related Documentation
Find the most current versions of all documents at: http://www.freescale.com
Reference Manual (MC9RS08KA8RM)
Contains extensive product information including modes of operation, memory,
resets and interrupts, register definition, port pins, CPU, and all module
information.
MCU Block Diagram
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 3
1 MCU Block Diagram
The block diagram, Figure 1, shows the structure of the MC9RS08KA8 MCU.
Figure 1. MC9RS08KA8 Series Block Diagram
2 Pin Assignments
This section shows the pin assignments in the packages available for the MC9RS08KA8 series.
KEYBOARD INTERRUPT
USER FLASH
USER RAM
RS08 CORE
CPU BDC
16-BIT TIMER/PWM
MODULE (TPM)
PORT B
RS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
VOLTAGE REGULATOR
PORT A
LOW-POWER OSCILLATOR
20 MHz INTERNAL CLOCK
SOURCE (ICS)
31.25 kHz to 39.0625 kHz
1 MHz to 5 MHz
(XOSC)
VSS
VDD
ANALOG-TO-DIGITAL
CONVERTER (ADC)
10-BIT
PORT C
(MC9RS08KA8 = 8192 BYTES)
(MC9RS08KA4 = 4096 BYTES)
(MC9RS08KA8 = 254 BYTES)
(MC9RS08KA4 = 126 BYTES)
IIC MODULE(IIC)
ANALOG COMPARATOR
(ACMP)
8-BIT TIMER
(MTIM1 and MTIM2)
VPP
COP
WAKEUP
RTI
LVD
PTC0/ADP8
PTB3/KBIP7/ADP7
PTB2/KBIP6/ADP6
PTB1/KBIP5/ADP5
PTB0/KBIP4/ADP4
PTA2/KBIP2/SDA/ADP2
PTA3/KBIP3/SCL/ADP3
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
PTC1/ADP9
PTC2/ADP10
PTB4/TPMCH0
PTC3/ADP11
PTA5/TCLK/RESET/VPP
PTA4/ACMPO/BKGD/MS
PTB7/SCL/EXTAL
PTB6/SDA/XTAL
PTB5/TPMCH1
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Pin Assignments
Freescale Semiconductor4
Figure 2. MC9RS08KA8 Series in 20-Pin PDIP/SOIC Package
Table 1. Pin Availability by Package Pin-Count
Pin
Number <-- Lowest Priority --> Highest
20 16 Port Pin Alt 1 Alt 2 Alt 3 Alt 4
1 1 PTA5 TCLK RESET VPP
2 2 PTA4 ACMPO BKGD MS
33 V
DD
44 V
SS
5 5 PTB7 SCL1
1IIC pins can be remapped to PTA3 and PTA2
EXTAL
6 6 PTB6 SDA1XTAL
7 7 PTB5 TPMCH12
2TPM pins can be remapped to PTA0 and PTA1
8 8 PTB4 TPMCH02
9 — PTC3 ADP11
10 — PTC2 ADP10
11 — PTC1 ADP9
12 — PTC0 ADP8
13 9 PTB3 KBIP7 ADP7
14 10 PTB2 KBIP6 ADP6
15 11 PTB1 KBIP5 ADP5
16 12 PTB0 KBIP4 ADP4
17 13 PTA3 KBIP3 SCL1ADP3
18 14 PTA2 KBIP2 SDA1ADP2
19 15 PTA1 KBIP1 TPMCH12ADP1 ACMP–
20 16 PTA0 KBIP0 TPMCH02ADP0 ACMP+
1
2
3
4
5
6
7
8
9
10 11
13
14
PTC2/ADP10
PTB4/TPMCH0
PTC3/ADP11 PTC0/ADP8
PTB3/KBIP7/ADP7
PTB2/KBIP6/ADP6
PTB1/KBIP5/ADP5
PTB0/KBIP4/ADP4
PTA2/KBIP2/SDA/ADP2
PTA3/KBIP3/SCL/ADP3
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
PTC1/ADP9
PTA5/TCLK/RESET/VPP
PTA4/ACMPO/BKGD/MS
VDD
VSS
PTB7/SCL/EXTAL
PTB6/SDA/XTAL
PTB5/TPMCH1
15
16
17
18
19
20
12
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 5
Figure 3. MC9RS08KA8 Series in 16-Pin PDIP/SOIC/TSSOP Package
3 Electrical Characteristics
3.1 Introduction
This chapter contains electrical and timing specifications for the MC9RS08KA8 series of microcontrollers
available at the time of publication.
3.2 Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the
customer a better understanding the following classification is used and the parameters are tagged
accordingly in the tables where appropriate:
NOTE
The classification is shown in the column labeled “C” in the parameter
tables where appropriate.
Table 2. Parameter Classifications
PThose parameters are guaranteed during production testing on each individual device.
CThose parameters are achieved by the design characterization by measuring a statistically relevant
sample size across process variations.
T
Those parameters are achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted. All values shown in the typical column are within this
category.
DThose parameters are derived mainly from simulations.
1
2
3
4
5
6
7
89
10
11
13
14
15
16
12
PTB3/KBIP7/ADP7
PTB2/KBIP6/ADP6
PTB1/KBIP5/ADP5
PTB0/KBIP4/ADP4
PTA2/KBIP2/SDA/ADP2
PTA3/KBIP3/SCL/ADP3
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
PTB4/TPMCH0
PTA5/TCLK/RESET/VPP
PTA4/ACMPO/BKGD/MS
VDD
VSS
PTB7/SCL/EXTAL
PTB6/SDA/XTAL
PTB5/TPMCH1
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor6
3.3 Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not
guaranteed. Stress beyond the limits specified in Table 3 may affect device reliability or cause permanent
damage to the device. For functional operating conditions, refer to the remaining tables in this chapter.
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (for instance, VSS or VDD) or the programmable pull-up
resistor associated with the pin is enabled.
3.4 Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package
thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in
on-chip logic and voltage regulator circuits and it is user-determined rather than being controlled by the
MCU design. In order to take PI/O into account in power calculations, determine the difference between
actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of
unusually high pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very
small.
Table 3. Absolute Maximum Ratings
Rating Symbol Value Unit
Supply voltage VDD –0.3 to 5.8 V
Maximum current into VDD IDD 120 mA
Digital input voltage VIn –0.3 to VDD + 0.3 V
Instantaneous maximum current
Single pin limit (applies to all port pins)1, 2, 3
1Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two
resistance values.
2All functional non-supply pins are internally clamped to VSS and VDD except the RESET/VPP pin which is internally
clamped to VSS only.
3Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum
current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD
and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater
than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are:
if no system clock is present, or if the clock rate is very low which would reduce overall power consumption.
ID ±25 mA
Storage temperature range Tstg –55 to 150 °C
Table 4. Thermal Characteristics
Rating Symbol Value Unit
Operating temperature range (packaged) TA
TL to TH
–40 to 85 °C
Maximum junction temperature TJMAX 105 °C
Thermal resistance 16-pin PDIP θJA 80 °C/W
Thermal resistance 16-pin SOIC θJA 112 °C/W
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 7
The average chip-junction temperature (TJ) in °C can be obtained from:
TJ = TA + (PD × θJA) Eqn. 1
where:
TA = Ambient temperature, °C
θJA = Package thermal resistance, junction-to-ambient, °C /W
PD = Pint + PI/O
Pint = IDD × VDD, Watts chip internal power
PI/O = Power dissipation on input and output pins user determined
For most applications, PI/O << Pint and can be neglected. An approximate relationship between PD and TJ
(if PI/O is neglected) is:
PD = K ÷ (TJ + 273°C) Eqn. 2
Solving Equation 1 and Equation 2 for K gives:
K = PD × (TA + 273°C) + θJA× (PD)2 Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring
PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by
solving equations 1 and 2 iteratively for any value of TA.
3.5 ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Thermal resistance 16-pin TSSOP θJA 75 °C/W
Thermal resistance 20-pin PDIP θJA 75 °C/W
Thermal resistance 20-pin SOIC θJA 96 °C/W
Table 4. Thermal Characteristics (continued)
Rating Symbol Value Unit
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor8
3.6 DC Characteristics
This section includes information about power supply requirements, I/O pin characteristics, and power
supply current in various operating modes.
Table 5. ESD and Latch-up Test Conditions
Model Description Symbol Value Unit
Human
Body
Series resistance R1 1500 Ω
Storage capacitance C 100 pF
Number of pulses per pin — 3 —
Machine
Series resistance R1 0 Ω
Storage capacitance C 200 pF
Number of pulses per pin — 3 —
Latch-up Minimum input voltage limit — –2.5 V
Maximum input voltage limit — 7.5 V
Table 6. ESD and Latch-Up Protection Characteristics
No. Rating1
1Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Symbol Min Max Unit
1 Human body model (HBM) VHBM ±2000 — V
2 Machine model (MM) VMM ±200 — V
3 Charge device model (CDM) VCDM ±500 — V
4
Latch-up current at TA = 85°C
(applies to all pins except pin 9
PTC3/ADP11)
ILAT ±1002
2These pins meet JESD78A Class II (section 1.2) Level A (section 1.3) requirement of ±100mA.
—mA
Latch-up current at TA = 85°C
(applies to pin 9 PTC3/ADP11) ILAT ±753
3This pin meets JESD78A Class II (section 1.2) Level B (section 1.3) characterization to ±75mA.
This pin is only present on 20 pin package types.
—mA
Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient)
Parameter Symbol Min Typical Max Unit
Supply voltage (run, wait and stop modes.)
0 < fBus <10MHz
VDD rising
VDD falling
VDD 2.0
1.8
—5.5V
Minimum RAM retention supply voltage applied to VDD VRAM 0.81——V
Low-voltage Detection threshold
(VDD falling)
(VDD rising)
VLVD 1.80
1.88
1.86
1.94
1.95
2.03
V
Power on RESET (POR) voltage VPOR10.9 — 1.7 V
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 9
Input high voltage (VDD > 2.3V) (all digital inputs) VIH 0.70 × VDD ——V
Input high voltage (1.8 V ≤ VDD ≤ 2.3 V) (all digital inputs) VIH 0.85 × VDD ——V
Input low voltage (VDD > 2.3 V) (all digital inputs) VIL — — 0.30 × VDD V
Input low voltage (1.8 V ≤ VDD ≤ 2.3 V)
(all digital inputs) VIL — — 0.30 × VDD V
Input hysteresis (all digital inputs) Vhys10.06 × VDD ——V
Input leakage current (per pin)
VIn = VDD or VSS, all input only pins |IIn| — 0.025 1.0 μA
High impedance (off-state) leakage current (per pin)
VIn = VDD or VSS, all input/output |IOZ| — 0.025 1.0 μA
Internal pullup resistors2(all port pins) RPU 20 45 65 kΩ
Internal pulldown resistors2(all port pins except PTA5) RPD 20 45 65 kΩ
PTA5 Internal pulldown resistor —45—95kΩ
Output high voltage — Low Drive (PTxDSn = 0)
5 V, ILoad = 2 mA
3 V, ILoad = 1 mA
1.8 V, ILoad = 0.5 mA
VOH
VDD – 0.8
—
—
—
—
—
—
V
Output high voltage — High Drive (PTxDSn = 1)
5 V, ILoad = 10 mA
5 V, ILoad = 5 mA
3 V, ILoad = 3 mA
1.8 V, ILoad = 2 mA
VDD – 0.8
—
—
—
—
—
—
—
—
Maximum total IOH for all port pins |IOHT|— —40 mA
Output low voltage — Low Drive (PTxDSn = 0)
5 V, ILoad = 2 mA
3 V, ILoad = 1 mA
1.8 V, ILoad = 0.5 mA
VOL
—
—
—
—
—
—
0.8
V
Output low voltage — High Drive (PTxDSn = 1)
5 V, ILoad = 10 mA
5 V, ILoad = 5 mA
3 V, ILoad = 3 mA
1.8 V, ILoad = 2 mA
—
—
—
—
—
—
—
—
0.8
Maximum total IOL for all port pins IOLT ——40 mA
DC injection current3, 4, 5 ,6
VIn < VSS, VIn > VDD
Single pin limit
Total MCU limit, includes sum of all stressed pins
—
—
—
—
0.2
0.8 mA
Input capacitance (all non-supply pins) CIn ——7pF
1This parameter is characterized and not tested on each device.
2Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown.
3All functional non-supply pins are internally clamped to VSS and VDD except the RESET/VPP which is internally clamped
to VSS only.
4Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
5Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
6This parameter is characterized and not tested on each device.
Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient) (continued)
Parameter Symbol Min Typical Max Unit
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor10
Figure 4. Typical IOH vs. VDD–VOH
VDD = 5.5 V (High Drive)
Figure 5. Typical IOH vs. VDD–VOH
VDD = 5.5 V (Low Drive)
IOH vs VDD-VOH (High Drive) at VDD = 5.5 V
-25
-20
-15
-10
-5
0
0.1 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
VDD-VOH (V)
IOH
(mA)
85C
25C
-40C
IOH vs VDD-VOH (Low Drive) at VDD = 5.5 V
-12
-10
-8
-6
-4
-2
0
0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VDD-VOH (V)
IOH
(mA)
85C
25C
-40C
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 11
Figure 6. Typical IOH vs. VDD–VOH
VDD = 3 V (High Drive)
Figure 7. Typical IOH vs. VDD–VOH
VDD = 3 V (Low Drive)
IOH vs VDD-VOH (High Drive) at VDD = 3 V
-20
-15
-10
-5
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
VDD-VOH (V)
IOH
(mA)
85C
25C
-40C
IOH vs VDD-VOH (Low Drive) at VDD = 3 V
-5
-4
-3
-2
-1
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
VDD-VOH (V)
IOH
(mA)
85C
25C
-40C
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor12
Figure 8. Typical IOH vs. VDD–VOH
VDD = 1.8 V (High Drive)
Figure 9. Typical IOH vs. VDD–VOH
VDD = 1.8 V (Low Drive)
IOH vs VDD-VOH (High Drive) at VDD = 1.8 V
-7
-6
-5
-4
-3
-2
-1
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
VDD-VOH (V)
IOH
(mA)
85C
25C
-40C
IOH vs VDD-VOH (Low Drive) at VDD = 1.8 V
-1.4
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
VDD-VOH (V)
IOH
(mA)
85C
25C
-40C
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 13
Figure 10. Typical IOL vs. VDD–VOL
VDD = 5.5 V (High Drive)
Figure 11. Typical IOL vs. VDD–VOL
VDD = 5.5 V (Low Drive)
IOL vs VOL (High Drive) at VDD = 5.5 V
0
5
10
15
20
25
0.1 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
VOL (V)
IOL (mA)
85C
25C
-40C
IOL vs VOL (Low Drive) at VDD = 5.5 V
0
5
10
15
0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VOL (V)
IOL(mA)
85C
25C
-40C
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor14
Figure 12. Typical IOL vs. VDD–VOL
VDD = 3 V (High Drive)
Figure 13. Typical IOL vs. VDD–VOL
VDD = 3 V (Low Drive)
IOL vs VOL (High Drive) at VDD = 3 V
0
5
10
15
20
0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4
VOL (V)
IOL (mA)
85C
25C
-40C
IOL vs VOL (Low Drive) at VDD = 3 V
0
1
2
3
4
5
0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4
VOL (V)
IOL (mA)
85C
25C
-40C
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 15
Figure 14. Typical IOL vs. VDD–VOL
VDD = 1.8 V (High Drive)
Figure 15. Typical IOL vs. VDD–VOL
VDD = 1.8 V (Low Drive)
3.7 Supply Current Characteristics
Table 8. Supply Current Characteristics
Parameter Symbol VDD (V) Typical1Max2Temp. (°C)
Run supply current3 measured at
(fBus = 10 MHz) RIDD10
52.4 mA 5 mA 25
85
32.4 mA — 25
85
1.80 1.7 mA — 25
85
IOL vs VOL (High Drive) at VDD = 1.8 V
0
1
2
3
4
5
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
VOL (V)
IOL (mA)
85C
25C
-40C
IOL vs VOL (Low Drive) at VDD = 1.8 V
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
VOL(V)
IOL(mA)
85C
25C
-40C
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor16
Run supply current3 measured at
(fBus = 1.25 MHz) RIDD1
50.42 mA 2 mA 25
85
30.42 mA — 25
85
1.80 0.3 mA — 25
85
Stop mode supply current SIDD
52.4 μA5 μA
8 μA
25
85
32 μA— 25
85
1.80 1.5 μA— 25
85
ADC adder from stop4—
5128 μA150 μA
165 μA
25
85
3121 μA— 25
85
1.80 79 μA— 25
85
ACMP adder from stop
(ACME = 1) —
521 μA22 μA25
85
318.5 μA— 25
85
1.80 17.5 μA— 25
85
RTI adder from stop
with 1 kHz clock source enabled5—
52.4 μA2 μA25
85
31.9 μA— 25
85
1.80 1.5 μA— 25
85
RTI adder from stop
with 1 MHz external clock source reference
enabled
—
52.1 μA2 μA25
85
31.6 μA— 25
85
1.80 1.2 μA— 25
85
LVI adder from stop
(LVDE=1 and LVDSE=1) —
570 μA80 μA25
85
365 μA— 25
85
1.80 60 μA— 25
85
1Typicals are measured at 25°C.
2Maximum value is measured at the nominal VDD voltage times 10% tolerance. Values given here are preliminary
estimates prior to completing characterization.
3Not include any DC loads on port pins.
4Required asynchronous ADC clock and LVD to be enabled.
Table 8. Supply Current Characteristics (continued)
Parameter Symbol VDD (V) Typical1Max2Temp. (°C)
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 17
Figure 16. Typical Run IDD vs. VDD for FEI Mode
5Most customers are expected to find that auto-wakeup from stop can be used instead of the higher current wait
mode. Wait mode typical is 1.3 mA at 3 V and 1 mA at 2 V with fBus = 1 MHz.
Run IDD vs VDD at FEI mode
0.00
0.50
1.00
1.50
2.00
2.50
3.00
5.5 5.0 3.3 3.0 2.7 2.0 1.8 1.7
Run IDD (mA)
VDD (V)
10 MHz
4 MHz
1.25 MHz
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor18
3.8 External Oscillator (XOSC) Characteristics
3.9 AC Characteristics
This section describes AC timing characteristics for each peripheral system.
Table 9. Oscillator Electrical Specifications (Temperature Range = –40 to 125°C Ambient)
Num C Rating Symbol Min Typical1
1Typical data was characterized at 5.0 V, 25 °C or is recommended value.
Max Unit
1C
Oscillator crystal or resonator (EREFS = 1, ERCLKEN = 1)
Low range (RANGE = 0)
High range (RANGE = 1) FEE or FBE mode 2
High range (RANGE = 1, HGO = 1) FBELP mode
High range (RANGE = 1, HGO = 0) FBELP mode
2The input clock source must be divided using RDIV to within the range of 31.25 kHz to 39.0625 kHz.
flo
fhi
fhi-hgo
fhi-lp
32
1
1
1
—
—
—
—
38.4
5
16
8
kHz
MHz
MHz
MHz
2 D Load capacitors C1, C2
See crystal or resonator
manufacturer’s
recommendation.
3D
Feedback resistor
Low range (32 kHz to 100 kHz)
High range (1 MHz to 16 MHz)
RF—
—
10
1
—
—
MΩ
4D
Series resistor
Low range, low gain (RANGE = 0, HGO = 0)
Low range, high gain (RANGE = 0, HGO = 1)
High range, low gain (RANGE = 1, HGO = 0)
High range, high gain (RANGE = 1, HGO = 1)
≥ 8 MHz
4 MHz
1 MHz
RS
—
—
—
—
—
—
0
100
0
0
0
0
—
—
—
0
10
20
kΩ
5C
Crystal start-up time 3
Low range, low gain (RANGE = 0, HGO = 0)
Low range, high gain (RANGE = 0, HGO = 1)
High range, low gain (RANGE = 1, HGO = 0)4
High range, high gain (RANGE = 1, HGO = 1)4
3This parameter is characterized and not tested on each device. Proper PC board layout procedures must be followed to
achieve specifications.
44 MHz crystal.
tCSTL-LP
tCSTL-HGO
tCSTH-LP
tCSTH-HGO
—
—
—
—
200
400
5
20
—
—
—
—
ms
6D
Square wave input clock frequency (EREFS = 0, ERCLKEN = 1)
FEE or FBE mode 2
FBELP mode
fextal 0.03125
0
—
—
5
40
MHz
MCU
EXTAL XTAL
Crystal or Resonator
R
S
C2
RF
C1
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 19
3.9.1 Control Timing
Figure 17. Reset Timing
Figure 18. KBI Pulse Width
Table 10. Control Timing
Num C Parameter Symbol Min Typical Max Unit
1 D Bus frequency (tcyc = 1/fBus)f
Bus 0—10MHz
2 D Real time interrupt internal oscillator period tRTI 700 1000 1300 μs
3 D External RESET pulse width1
1This is the shortest pulse guaranteed to pass through the pin input filter circuitry. Shorter pulses may or may not be recognized.
textrst 150 — — ns
4 D KBI pulse width2
2This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
tKBIPW 1.5 tcyc ——ns
5 D KBI pulse width in stop1tKBIPWS 100 — — ns
6D
Port rise and fall time (load = 50 pF)3
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
3Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40°C to 85°C.
tRise, tFall —
—
11
35
—
—
ns
textrst
RESET
tKBIPW
KBI Pin
tKBIPW
KBI Pin
(rising or high level)
(falling or low level)
tKBIPWS
tKBIPWS
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor20
3.9.2 TPM/MTIM Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that
can be used as the optional external source to the timer counter. These synchronizers operate from the
current bus rate clock.
Figure 19. Timer External Clock
Figure 20. Timer Input Capture Pulse
3.10 Analog Comparator (ACMP) Electrical
Table 11. TPM Input Timing
Num C Rating Symbol Min Max Unit
1 D External clock frequency fTPMext DC fBus/4 MHz
2 D External clock period tTPMext 4—t
cyc
3 D External clock high time tclkh 1.5 — tcyc
4 D External clock low time tclkl 1.5 — tcyc
5 D Input capture pulse width tICPW 1.5 — tcyc
Table 12. Analog Comparator Electrical Specifications
Num C Characteristic Symbol Min Typical Max Unit
1 D Supply voltage VDD 1.80 — 5.5 V
2 P Supply current (active) IDDAC —2035μA
3 D Analog input voltage1VAIN VSS – 0.3 — VDD V
4 P Analog input offset voltage1VAIO —2040mV
5 C Analog Comparator hysteresis1VH3.0 9.0 15.0 mV
6 C Analog source impedance1RAS ——10kΩ
7 P Analog input leakage current IALKG ——1.0μA
8 C Analog Comparator initialization delay tAINIT ——1.0μs
tTCLK
tclkh
tclkl
TCLK
tICPW
TPMCHn
tICPW
TPMCHn
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 21
3.11 Internal Clock Source Characteristics
3.12 ADC Characteristics
9P
Analog Comparator bandgap reference
voltage VBG 1.1 1.208 1.3 V
1These data are characterized but not production tested.
Table 13. Internal Clock Source Specifications
Num C Characteristic Symbol Min Typical1
1Data in typical column was characterized at 3.0 V and 5.0 V, 25 °C or is typical recommended value.
Max Unit
1 C Average internal reference frequency — untrimmed fint_ut 25 31.25 41.66 kHz
2 P Average internal reference frequency — trimmed fint_t 31.25 39.06 39.0625 kHz
3 C DCO output frequency range — untrimmed fdco_ut 12.8 16 21.33 MHz
4 P DCO output frequency range — trimmed fdco_t 16 20 20 MHz
5C
Resolution of trimmed DCO output frequency
at fixed voltage and temperature Δfdco_res_t —— 0.2 %fdco
6C
Total deviation of trimmed DCO output frequency
over voltage and temperature Δfdco_t —— 2%fdco
7 C FLL acquisition time2,3
2This parameter is characterized and not tested on each device.
3This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or
changing from FLL disabled (FBILP) to FLL enabled (FEI, FBI).
tacquire —— 1ms
8C
Stop recovery time (FLL wakeup to previous acquired
frequency)
IREFSTEN = 0
IREFSTEN = 1
t_wakeup —
100
86
—μs
Table 14. 5 Volt 10-bit ADC Operating Conditions
C Characteristic Conditions Symb Min. Typical Max. Unit
D Input voltage — VADIN VSS —V
DD V
C Accuracy VDD = 2 V — — 8 bit — —
C Input capacitance — CADIN —4.55.5pF
C Input resistance — RADIN —3 5kΩ
CAnalog source resistance
external to MCU
10 bit mode
fADCK > 4MHz
fADCK < 4MHz RAS
—
—
—
—
5
10 kΩ
8 bit mode (all valid fADCK)——10
Table 12. Analog Comparator Electrical Specifications (continued)
Num C Characteristic Symbol Min Typical Max Unit
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor22
Figure 21. ADC Input Impedance Equivalency Diagram
DADC conversion clock
frequency
High Speed (ADLPC=0)
fADCK
0.4 — 8.0
MHz
Low Power (ADLPC=1) 0.4 — 8.0
Table 15. 10-bit ADC Characteristics
Characteristic Conditions C Symb Min Typical1Max Unit
Supply current
ADLPC = 1
ADLSMP = 1
ADCO = 1
—TI
DDAD — 133 — μA
Supply current
ADLPC = 1
ADLSMP = 0
ADCO = 1
—TI
DDAD — 218 — μA
Supply current
ADLPC = 0
ADLSMP = 1
ADCO = 1
—TI
DDAD — 327 — μA
Supply current
ADLPC = 0
ADLSMP = 0
ADCO = 1
—CI
DDAD —0.582 1mA
Table 14. 5 Volt 10-bit ADC Operating Conditions (continued)
C Characteristic Conditions Symb Min. Typical Max. Unit
+
–
+
–
V
AS
R
AS
C
AS
V
ADIN
Z
AS
Pad
leakage
due to
input
protection
Z
ADIN
SIMPLIFIED
INPUT PIN EQUIVALENT
CIRCUIT
R
ADIN
ADC SAR
ENGINE
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
INPUT PIN
R
ADIN
C
ADIN
INPUT PIN
R
ADIN
INPUT PIN
R
ADIN
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 23
3.13 Flash Specifications
This section provides details about program/erase times and program-erase endurance for the flash
memory. For detailed information about program/erase operations, see the reference manual.
Supply current Stop, reset, module off TIDDAD —0.011 1 μA
ADC asynchronous clock
source
High speed (ADLPC = 0)
TfADACK
—3.3—
MHz
Low power (ADLPC = 1) — 2 —
Conversion time (including
sample time)
Short sample (ADLSMP=0)
Pt
ADC
—20—
ADCK
cycles
Long sample (ADLSMP=1) — 40 —
Sample time
Short sample (ADLSMP=0)
Pt
ADS
—3.5—
ADCK
cycles
Long sample (ADLSMP=1) — 23.5 —
Total unadjusted error
10 bit mode
CE
TUE
—±1±2.5
LSB2
8 bit mode — ±0.5 ±1.0
Differential non-linearity
10 bit mode P
DNL
—±0.5 ±1.0
LSB2
8 bit mode T — ±0.3 ±0.5
Monotonicity and No-Missing-Codes guaranteed
Integral non-linearity
10 bit mode
CINL
—±0.5 ±1.0
LSB2
8 bit mode — ±0.3 ±0.5
Zero-scale error
10 bit mode P
EZS
—±0.5 ±1.5
LSB2
8 bit mode T — ±0.5 ±0.5
Full-Scale error
VADIN = VDDA
10 bit mode P
EFS
—±0.5 ±1.5
LSB2
8 bit mode T — ±0.5 ±0.5
Quantization error
10 bit mode
DE
Q
——±0.5
LSB2
8 bit mode — — ±0.5
Input leakage error
pad leakage3 * RAS
10 bit mode
DE
IL
—±0.2 ±2.5
LSB2
8 bit mode — ±0.1 ±1
1Typical values assume Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference only and are
not tested in production.
21 LSB = (VREFH – VREFL)/2N
3Based on input pad leakage current. Refer to pad electrical.
Table 16. Flash Characteristics
Characteristic Symbol Min Typical1Max Unit
Supply voltage for program/erase VDD 2.7 — 5.5 V
Table 15. 10-bit ADC Characteristics (continued)
Characteristic Conditions C Symb Min Typical1Max Unit
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor24
Figure 22. Example VPP Filtering
Program/Erase voltage VPP 11.8 12 12.2 V
VPP current
Program
Mass erase
IVPP_prog
IVPP_erase
—
—
—
—
200
100
μA
μA
Supply voltage for read operation
0 < fBus < 10 MHz VRead 1.8 — 5.5 V
Byte program time tprog 20 — 40 μs
Mass erase time tme 500 — — ms
Cumulative program HV time2thv ——8ms
Total cumulative HV time
(total of tme & thv applied to device) thv_total ——2hours
HVEN to program setup time tpgs 10 — — μs
PGM/MASS to HVEN setup time tnvs 5——μs
HVEN hold time for PGM tnvh 5——μs
HVEN hold time for MASS tnvh1 100 — — μs
VPP to PGM/MASS setup time tvps 20 — — ns
HVEN to VPP hold time tvph 20 — — ns
VPP rise time3tvrs 200 — — ns
Recovery time trcv 1——μs
Program/erase endurance
TL to TH = –40°C to 85°C— 1000 — — cycles
Data retention tD_ret 15 — — years
1Typicals are measured at 25 °C.
2thv is the cumulative high voltage programming time to the same row before next erase. Same address can not be
programmed more than twice before next erase.
3Fast VPP rise time may potentially trigger the ESD protection structure, which may result in over current flowing into the pad
and cause permanent damage to the pad. External filtering for the VPP power source is recommended. An example VPP
filter is shown in Figure 22.
Table 16. Flash Characteristics (continued)
Characteristic Symbol Min Typical1Max Unit
100 Ω
VPP
12 V 1 nF
Electrical Characteristics
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 25
Figure 23. Flash Program Timing
Figure 24. Flash Mass Erase Timing
PGM
HVEN
VPP2 tvps
trs
tnvh trcv
tvph
thv
1 Next Data applies if programming multiple bytes in a single row, refer to MC9RS08KA8 Series Reference Manual.
2 VDD must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
WRITE DATA1
tnvs
tpgs
tprog
Data Next
Data
MASS
HVEN
VPP1 tvps
trs
tnvh1
trcv
tvph
tme
1 VDD must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
tnvs
MC9RS08KA8 Series MCU Data Sheet, Rev. 4
Ordering Information
Freescale Semiconductor26
4 Ordering Information
This section contains ordering numbers for MC9RS08KA8 series devices. See below for an example of
the device numbering system.
5 Mechanical Drawings
This following pages contain mechanical specifications for MC9RS08KA8 series package options.
• 16-pin PDIP (plastic dual in-line pin)
• 16-pin W-SOIC (wide body small outline integrated circuit)
• 16-pin TSSOP (thin shrink sSmall outline package)
• 20-pin PDIP (plastic dual in-line pin)
• 20-pin W-SOIC (wide body small outline integrated circuit)
Table 17. Device Numbering System
Device Number
Memory Package
Flash RAM Type Designator Document No.
MC9RS08KA8
MC9RS08KA4
8K bytes
4K bytes
254 bytes
126 bytes
16 PDIP PG 98ASB42431B
16 W-SOIC WG 98ASB42567B
16 TSSOP TG 98ASH70247A
20 PDIP PJ 98ASB42899B
20 W-SOIC WJ 98ASB42343B
MC
Temperature range
Family
Memory
Status
Core
(C = –40 °C to 85 °C)
(9 = Flash-Based)
9RS08 KA XX
(MC = Fully qualified) Package designator (See Tab l e 17 )
8
Approximate memory size (in KB)
C
Document Number: MC9RS08KA8
Rev. 4
6/2009
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