100ELT22M - Fairchild Semiconductor

January 2003

Revised January 2003

100ELT22 5V Dual TTL to Differenti al PECL Transl ator

100ELT22

5V Dual TTL to Differential PECL Translator

General Description

The 100ELT22 is a TTL to differential PECL translator

operating from a single +5 V supp ly.

Both outputs of a differential pair should be terminated in

50Ω to VCC - 2.0V even if only one output is being used. If

an output pair is unused both outputs can be left open

(un-terminated).

The 100 series is temperature compensated.

Features

■Typical propagation delay of 300 ps

■<100 ps between outputs

■Max ICC of 30 mA

■Fairchild MSOP-8 package is a drop-in replacement to

ON TSSOP-8

■Flow through pinout

■Meets or exceeds JEDEC specification EIA/JESD78 IC

latch-up test

■Moisture Sensitivity Level 1

■ESD Perform ance:

Human Body Mod el > 2000V

Machine Model > 200V

Ordering Code:

Devices also available in Tape and R eel. Speci fy by appending suffix let te r “X” to the ord ering code.

Connection Diagram

Top View

Pin Descriptions

Logic Diagram

Order Number Product Package DescriptionPackage Code

Number Top Mark

100ELT22M M08A KLT22 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

100ELT22M8

(Preliminary) MA08D KT22 8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide

Pin Name Description

Qn, QnPECL Differential Outputs

D0, D1TTL Inputs

VCC Positive Supply

GND Ground

www.fairchildsemi.com 2

100ELT22

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: The “Absolute Maximum Ratings” are thos e values bey ond which

the saf ety of the device cannot be gu aranteed. Th e device shoul d not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “R ecomm ended Oper ating Co ndition s” table will def ine the condit ions

for actu al device operation.

PECL DC Electrical Characteri stics VCC = 5.0V; GND = 0.0V (Note 2)

Note 2: Output parameters vary 1 to 1 with VCC. VCC can vary +0.5V/−0.8V.

Note 3: Outputs ar e t erminat ed t hrough a 50Ω Re sistor to VCC − 2.0V.

Note: Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than

500LFPM maintained.

TTL DC Electrical Characteristics VCC = 5.0V; GND = 0.0V (Note 4); TA = −40°C to +85°C

Note 4: VCC can vary +0.5V/−0.8V.

AC Electrical Characteristi cs VCC = 5.0V; GND = 0.0V (Note 5)

Note 5: VCC can vary +0.5V/−0.8V.

Note 6: Specifications for standard TTL input signal (see Figure 1).

Note 7: Within-device s k ew is def ined as identical transitions on similar paths th rough a device.

Supply Voltage (VCC) 0.0V to +7.0V

Input Voltage (VI) VI ≤ VCC 0.0V to + 7.0V

DC Output Current (IOUT)

Continuous 50 mA

Surge 100 mA

Storage Temperature (TSTG)−65°C to + 150°C

Power Supply Operating VCC = 4.2V to 5.5V

TTL Input Voltage 0.0V to VCC

Free Air Operating Temperature (TA)−40°C to +85°C

Symbol Parameter −40°C 25°C 85°CUnits

Min Typ Max Min Typ Max Min Typ Max

ICC Power Supply Current 30 30 30 mA

VOH Output HIGH Voltage (Note 3) 3915 3995 4120 3975 4045 4120 3975 4050 4120 mV

VOL Output LOW Voltage (Note 3) 3170 3305 3445 3190 3295 3380 3190 3295 3380 mV

Symbol Parameter Min Typ Max Units Condition

IIH Input HIGH Current 20 µAVIN = 2.7V

100 VIN = VCC

IIL Input LOW Current −200 µAV

IN = 0.5V

VIK Clamp Diode Voltage −1.2 V IIN = −18 mA

VIH Input HIGH Voltage 2.0 V

VIL Input LOW Voltage 0.8 V

Symbol Parameter −40°C25°C85°CUnits Figure

Min Typ Max Min Typ Max Min Typ Max Number

fMAX Maximum Input Frequency TBD TBD TBD MHz

tJITTER Cycle-to-Cycle Jitter TBD TBD TBD ps

tPLH, tPHL Propagation Delay to Output (Note 6) 100 600 100 600 100 600 ps Figure 1

tr, tfOutput Rise Time/Fall Times 200 500 200 500 200 500 ns Figure 2

(20% to 80%)

tskpp Part to Part Skew 500 500 500 ps

tskew Within Device Skew (Note 7) 100 100 100 ps

3 www.fairchildsemi.com

100ELT22

Switching Waveforms

Note: VM varies 1:1 with VEE FIGURE 1. TTL to Differential PECL Propagation Delay

FIGURE 2. Differential Output Edge Rates

www.fairchildsemi.com 4

100ELT22

Physical Dimensions inches (millimeters) unless otherwise noted

8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Package Number M08A

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

5 www.fairchildsemi.com

100ELT22 5V Dual TTL to Differenti al PECL Transl ator

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide

Package Number MA08D

Fairchild does not assume an y responsibility for u se of any circuitry described, no circuit patent license s are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r syst ems are dev ic es or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instruct ions fo r use pr ovi de d in the l abe ling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A crit ical componen t in any com ponen t of a life s uppor t

device or system whose failure to perform can be rea-

sonabl y e xpec ted to cause th e fa i lure of the l ife s upport

device or system, or to affect its safety or effectiveness.