(INTERSIL FEATURES Low frequency drift with temperature - 50ppm/ C Simultaneous sine, square, and triangle wave outputs Low distortion - 1% (sine wave output) High linearity - 0.1% (triangle wave output) @ Wide operating frequency range - 0.001Hz to 0.3MHz Variable duty cycle - 2% to 98% High level outputs - TTL to 28V Easy to use - just a handful of external components required ICL8038 Precision Waveform Generator/ Voltage Controlled Oscillator GENERAL DESCRIPTION The ICL8038 Waveform Generator is a monolithic integrated circuit capable of producing high accuracy sine, square, triangular, sawtooth and pulse waveforms with a minimum of external components. The frequency (or repetition rate) can be selected externally from .001Hz to more than 300kHz using either resistors or capacitors, and frequency modulation and sweeping can be accomplished with an external voltage. The ICL8038 is fabricated with advanced monolithic technology, using Schottky-barrier diodes and thin film resistors, and the output is stable over a wide range of temperature and supply variations. These devices may be interfaced with phase locked loop circuitry to reduce temperature drift to less than 50ppm/C. BLOCK DIAGRAM PIN CONFIGURATION (outline dwg JD) vt 6 CURRENT SOURCE COMPARATOR "1 a WV | . siNaouust Li * fa] Ne COMPARATOR SINE WAVE ] Fa] Ne TRIANGLE [3] _ fig SINE WAVE pure iccsose [NST crete | 4] _ Pal vor Gnd FREQUENCY . MING tne ene eed fase te vt [e] * - 2] OUT | Vv" or GND FM wm pias [2 , rs} heer SINE: BUFFER J+! J BUFFER ert] } SU Ww WN ORDERING INFORMATION TYPE TEMPERATURE RANGE STABILITY PACKAGE ORDER PART NUMBER 8038 CC 0C to +70C 50ppm/C typ CERDIP ICL8038 CC JD 8038 BC 0C to +70C 100 ppm/C max CERDIP ICL8038 BC JD 8038 AC oC to +70C 50ppm/C max CERDIP ICL8038 AG JD 8038 BM -55C to +125C 100ppm/C max CERDIP 1CL8038 BM JD 8038 AM -55C to +125C 50ppm/C max CERDIP ICL8038 AM JD 5-190ICL8038 INTERSIL MAXIMUM RATINGS Supply Voltage ........ cece cece eet eee nett ete eee ens +18V or 36V Total Power Dissipation ....... 0.0... cece ce cece eee eee nee enna te ceenens 750mW Input Voltage (any Pin) ........ 66sec eee eee eens Not To Exceed Supply Voltages Input Current (Pins 4 and 5) oo... cece cece eee rete eee n eee nee 25mA Output Sink Current (Pins 3 and 9) 20... . 6... cece eee eee eee eee eee e ees 25mA Storage Temperature Range .......... 0c reece cece een ener e ees 65C to +125C Operating Temperature Range: BO3B8AM, B8038BM ....... eee e eee renee teen teen nett eens -55C to +125C BOSBAC, B03B8BC, BO3BCCS ... occ ec eee nett teen eens OC to +70C Lead Temperature (Soldering, 10 se.) 20... 2... cece eee eee cnet nee 300C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. NOTE 1: Derate ceramic package at 12.5mW/C for ambient temperatures above 100C. ELECTRICAL CHARACTERISTICS (Vgupp = +10V or +20V, Ta = 25C, RL = 10k, Test Circuit Unless Otherwise Specified) CHARACTERISTICS MIN TYP + Maximum and Current (V9 = 30V) ( = 5mA) = 100k) NOTE 2: Ra and Re currents not included. NOTE 3: Vsupp = 20V; Ra and Re = 10k, f = 9kHz; Can be extended to 1000.1. See Figures 13 and 14. NOTE 4: 82k connected between pins 11 and 12, Triangle Duty Cycle set at 50%. (Use Ra and Rp.) NOTE 5: Over operating temperature range, Fig. 2, pins 7 and 8 connected, Vsupr = +10V. See Fig. 6c for T.C. vs VsupP. -191ICL8038 TEST CONDITIONS PARAMETER Current 10k0 Ra Re. RL 10k, 10k0 10k 10kN INTERSIL MEASURE into Pin at Pin at at Pin at 9 at at Pin Swi Closed at Pin Waveform at Pin 3 at NOTE 1: The hi and Jo frequencies can be obtained by connecting pin 8 to pin 7 (fri) and then connecting pin 8 to pin 6 (fo). Otherwise apply Sweep Voltage at pin 8 (2/3 Vsupp +2V) < Vsweer < Vsupp where Vsupp is the total supply voltage. In Fig. 2, pin 8 should vary between 5.3V and 10V with respect to ground. NOTE 2: 10V < V* < 30V, or +5V < Vsupp < +15V. NOTE 3: Oscillation can be halted by forcing pin 10 to +5 volts or -5 volts. DEFINITION OF TERMS: TEST CIRCUIT Supply Voltage (Vsupp). The total supply voltage from V to V". Supply Current. The supply current required from the power supply to operate the device, excluding load currents and the currents through Ra and Rp. Frequency Range. The frequency range at the square wave output through which circuit operation is guaranteed. Sweep FM Range. The ratio of maximum frequency to minimum frequency which can be obtained by applying a sweep voltage to pin 7 8. For correct operation, the sweep voltage should be within the range (2/3 Vgupp + 2V) < Veweer < Vsupe FM Linearity. The percentage deviation from the best-fit straight line on the control voltage versus output frequency curve. Output Amplitude. The peak-to-peak signal amplitude appearing at the outputs. Saturation Voltage. The output voltage at the collector of Q23 when +10V Ra As Ru 10k 10k 10k 4 5 9 __ J l J | sw N.C. is ICL8038 3 W IRrRI 10 " 12_2 fy Le AsInE this transistor is turned on. It is measured fora sink current of 2mA. Rise and Fall Times. The time required for the square wave output to change from 10% to 90%, or 90% to 10%, of its final value. Triangle Waveform Linearity. The percentage deviation from the best-fit straight line on the rising and falling triangle waveform. Tota) Harmonic Distortion. The total harmonic distortion ai the sine- wave output. TYPICAL PERFORMANCE CHARACTERISTICS 20 SUPPLY CURRENT 16 15 20 25 SUPPLY VOLTAGE 30 NORMALIZED FREQUENCY 1 = o 8 es f& + = g 8 8 8 S .03 10 15 20 25 SUPPLY VOLTAGE 5-192 = = S : S 3 _ o = 2 8 NORMALIZED FREQUENCY 3 _ a 30 -tov 60-25 0 25 75 (125 TEMPERATURE CICL8038 THEORY OF OPERATION (see block diagram, first page) An external capacitor C is charged and discharged by two current sources. Current source #2 is switched on and off by a flip-flop, while current source #1 is on continuously. Assuming that the flip-flop is in a state such that current source #2 is off, and the capacitor is charged with a current, the voltage across the capacitor rises linearily with time. When this voltage reaches the level of comparator #1 (set at 2/3 of the supply voltage), the flip-flop is triggered, changes states, and releases current source #2. This current source normally carries a current 21, thus the capacitor is discharged with a net-current | and the voltage across it drops linearly with time. When it has reached the level of comparator #2 (set at 1/3 of the supply voltage), the flip-flop is triggered into its original state and the cycle starts again. INTERSIL Four waveforms are readily obtainable from this basic generator circuit. With the current sources set at | and 2t respectively, the charge and discharge times are equa). Thus a triangle waveform is created across the capacitor and the flip-flop produces a square-wave. Both waveforms are fed to buffer stages and are available at pins 3 and 9. The levels of the current sources can, however, be selected over a wide range with two external resistors. Therefore, with the two currents set at values different from | and 2I, an asymmetrical sawtooth appears at terminal 3 and pulses with a duty cycle from less than 1% to greater than 99% are available at terminal 9. The sine-wave is created by feeding the triangle-wave into a non-linear network (sine-converter). This network provides a decreasing shunt-impedance as the potential of the triangle moves toward the two extremes. Performance of the Square-Wave Output 0 2 4 6 8 10 LOAD RESISTANCE-k!) 2 15 0.5 SATURATION VOLTAGE 0 0 2 4 6 8 10 LOAD CURRENT-mA Performance of Triangle-Wave Output 1.0 z 12 | > 125C. 11 25C oAD , .9 CURRENT 1.0 dap conn i TO vt \ oo 6 8 10 12 14 16 18 20 OAD CURRENT-mA 2 M NORMALIZED OUTPUT VOLTAGE 2 Sain on NORMALIZED PEAK OUTPUT VOLTAGE cre 06 10Hz 100Hz 1kHz 10kHz100kHz IMHz FREQUENCY LINEARITY-% 0.01 1OHz 100Hz 1kHz 10kHz 100kHz 1MHz FREQUENCY Performance of Sine-Wave Output = -_ 2 = NORMALIZED OUTPUT VOLTAGE o *) 1OHz 100Hz 1kHz 10kHz 100kHz 1MHz FREQUENCY 12 10 DISTORTION-% o Qo 1OHz 100Hz 1kHz 10kHz 100kHz 1MHz FREQUENCY -193ICL8038 Square-Wave Duty Cycle 50% (INTERSIL Square-Wave Duty Cycle - 80% Phase Relationship of Waveforms WAVEFORM TIMING The symmetry of all waveforms can be adjusted with the external timing resistors. Two possible ways to accomplish this are shown in Figure 1. Best results are obtained by keeping the timing resistors Ra and Re separate (a). Ra controls the rising portion of the triangle and sine-wave and the 1 state of the square-wave. The magnitude of the triangle-waveform is set at 1/3 VsupP; therefore the rising portion of the triangle is, _CxXV _CX1/3XVIXRA _ He = Tex g RAXS The falling portion of the triangle and sine-wave and the 0 state of the square-wave is: p= OXY Cx1/3V" _ 5, RaRec eT ~ 2, Vsupp _ 1. Vsupe ~ 3 2Ra-Re 5 Ra 5 Ra Thus a 50% duty cycle is achieved when Ria = Ra. If the duty-cycle is to be varied over a smail range about 50% only, the connection shown in Figure 1b is slightly more convenient. If no adjustment of the duty cycle is desired, terminals 4 and 5 can be shorted together, as shown in Figure 1c. This connection, however, causes an inherently larger variation of the duty-cycle, frequency, etc. With two separate timing resistors, the frequency is given by ee RB ) titte 5 ( + __ 3 Rac\1 7RaRe f= or, if Ra =Rea=R 03 f= RE for Figure ta) lf a single timing resistor is used (Figure tc only), the frequency is _ 0.15 Re Neither time nor frequency are dependent on supply voltage, even though none of the voltages are regulated inside the integrated circuit. This is due to the fact that both currents and thresholds are direct, linear functions of the supply voltage and thus their effects cancel. To minimize sine-wave distortion the 82kN resistor between pins 11 and 12 is best made variable. With this arrangement distortion of less than 1% is achievable. To recluce this even further, two potentiometers can be connected as shown in Figure 2; this configuration allows a typical reduction of sine-wave distortion close to 0.5%. (a) (b) {e) 4 ve ne vt 1kO R AL "RA Re RL AN LI, ICL8038 3/0 AW 8 ICL8038 3 VW 10) 11 ; ton WN Pr Wh L Vor GND T. i 4 0 V" or GND ho Figure 1: Possible Connections for the External Timing Resistors. 5-194ICL8038 | 1k 8 ICL8038 10 1 12 1 Vor GND Figure 2: Connection to Achieve Minimum Sine-Wave Distortion. SELECTING Ra, Re AND C For any given output frequency, there is a wide range of RC combinations that will work, however certain constraints are placed upon the magnitude of the charging current for optimum performance. At the low end, currents of less than 1A are undesirable because circuit leakages will contribute significant errors at high temperatures. At higher currents (| > 5mA), transistor betas and saturation voltages wiil contribute increasingly larger errors. Optimum performance will, therefore, be obtained with charging currents of 10uA to 1mA. If pins 7 and 8 are shorted together, the magnitude of the charging current due to Ra can be calculated from: _ Bix Vsurp 1 _ VSure I= Art Ro) Ra OFA A similar calculation holds for Re. The capacitor value should be chosen at the upper end of its possible range. WAVEFORM OUT LEVEL CONTROL AND POWER SUPPLIES The waveform generator can be operated either from a single power-supply (10 to 30 Volts) or a dual power-supply (+5 to +15 Volts). With a single power-supply the average levels of the triangle and sine-wave are at exactly one-haif of the supply voltage, while the square-wave alternates between vr and ground. A split power supply has the advantage that all waveforms move symmetrically about ground. The square-wave output is not committed. A load resistor can be connected to a different power-supply, as long as the applied voltage remains within the breakdown capability of the waveform generator (30V). In this way, the square-wave output can be made TTL compatibie (load resistor connected to +5 Volts) while the waveform generator itself is powered from a much higher voltage. INERSIL FREQUENCY MODULATION AND SWEEPING The frequency of the waveform generator is a direct function of the DC voltage at terminal 8 (measured from Vv"). By altering this voltage, frequency modulation is performed. For small deviations (e.g. 10%) the modulating signal can be applied directly to pin 8, merely providing DC decoupling with a capacitor as shown in Figure 3a. An external resistor between pins 7 and 8 is not necessary, but it can be used to _increase input impedance from about 8kO (pins 7 and 8 connected together), to about (R + 8k). For larger FM deviations or for frequency sweeping, the modulating signal is applied between the positive supply voltage and pin 8 (Figure 3b). In this way the entire bias for the current sources is created by the modulating signal, and a very large (e.g. 1000:1) sweep range is created (f = 0 at Vsweep = 0). Care must be taken, however, to regulate the supply voltage; in this configuration the charge current is no longer a function of the supply voltage (yet the trigger thresholds still are) and thus the frequency becomes dependent on the supply voltage. The potential on Pin 8 may be swept down from V* by (1/3 Vsupp - 2V). (a) . vt Ra Ra RL +7 4 5 6 9 JL o) R 4s I1CL8038 af} oA Ay, zo 10 41 12.2 }of\ f\, i c 81k _~---o Vor GND (b) ve SWEEP RA Ra Rt VOLTAGE {8 ICL8038 3} AA, 1 2 2 Wa T. tk -______-#--__--0 V" or GND Figure 3: Connections for Frequency Modulation (a) and Sweep (b) 5-195ICL8038 APPLICATIONS yt RA RB 7 4 5 6 2 AMPLITUDE 100k Tat 8 ICL.8038 7 20k 10 Wt 47k r: * v Figure 4: Sine Wave Output Buffer Amplifiers. The sine wave output has a relatively high output impedance (1kO Typ). The circuit of Figure 4 provides buffering, gain and amplitude adjustment. A simple op amp follower could also be used. FREQUENCY duty cycle variations with sweep. HIGH FREQUENCY ThA SYMMETRY 1N753A 5000 {6.2V) 4.7kQ INTERSIL +15V RA RB 15k 7 4 5 9}. 8 ICL8038 INO14 1 10. 2/-- INS14 2N4392 >}0 sTROBE 100k OFF LT +15V (+10V) 15V (-10V on 8 {-10) Figure 5: Strobe-Tone Burst Generator. With a dual supply voltage the external capacitor on Pin 10 canbe shorted to ground to halt the 8038 oscillation. Figure 5 shows a FET switch, diode ANDed with an input strobe signal to allow the output to always start on the same slope. +10V tk wom AF 4.7k 4.7k 15k 5 4 6 g ! 10k 8 {CL8038 3 RA, 10 11 12 hoe 20k 2 =15M i 0047 uF DISTORTION T -10V Figure 6: Variable Audio Oscillator, 20Hz to 20kHz. To obtain a 1000:1 Sweep Range on the 8038 the voltage across external resistors Ra and Re must decrease to nearly zero. This requires that the highest voltage on control Pin 8 exceed the voltage at the top of Ra and Re by a few hundred millivolts. The Circuit of Figure 6 achieves this by using a diode to lower the effective supply voltage on the 8038. The large resistor on pin 5 helps reduce L 100kN 2 47k0 < 1k c 1M2 100k0 AAR i if 2 Low , 1,000pF FREQUENCY ev 4 5 6 yun SYMMETRY 9 SINE-WAVE 4K ICLeu38 WN ourPuT 741 8 FUNCTIONGENERATOR 3/ NN, __\o CO 2 1 < pPe | 10 1" 12 504F = 15V 10K OFFSET L 100K => 3,900pF SINE-WAVE DISTORTION ~15v Figure 7: Linear Voltage Controlied Oscillator The linearity of input sweep voltage versus output frequency can be significantly improved by using an op amp as shown in Figure 7. 5-196IiCL8038 USE IN PHASE-LOCKED LOOPS Its high frequency stability makes the ICL8038 an ideal building block for a phase-locked loop. In this application the remaining functional blocks, the phase-detector and the amplifier, can be formed by a number of available ICs (e.g. MC 4344, NE 562, HA 2800, HA 2820). In order to match these building blocks to each other, two steps must be taken. First, two different supply voltages are used and the square wave output is returned to the supply of the phase detector. This assures that the VCO input voltage will not exceed the capabilities of the phase detector. If a smaller VCO signal is required, a simple resistive voltage divider is connected between pin 9 of the waveform generator and the VCO input of the phase-detector. INVERSIL Second, the DC output level of the amplifier must be made com- patible to the DC level required at the FM input of the waveform generator (pin 8, 0.8 x V*). The simplest solution here is to pro- vide a voltage divider to V* (R1, Re asshown) ifthe amplifierhasa lower output level, or to ground if its level is higher. The divider can be made part of the low-pass filter. This application not only provides for a free-running frequency with very low temperature drift, but it also has the unique feature of producing a large reconstituted sinewave signal with a frequency identical to that at the input: For further information, see Intersil Application Bulletin A013, Everything You Always Wanted to Know About The 8038. vit DUTY R CYCLE 1 FREQUENCY, ADJUST TRIANGLE FMBIAS, 4 5 6 OUT ; o47 3fo Vv + SQUARE SINE WAVE WAVE QUT our ICLe038 ? 8 a- Wy vco re DEMODULATED FM INPUT o-~ +~ AMPLIFIER +--e---oFM | SWEEP PHASE DETECTOR INPUT SINE WAVE 8 ir ADS. 7 10 11 12 _ | TIMING S/7 SINE LOW-PASS cap. A WAVE FILTER . ? ADJ. V7/GND Figure &: Waveform Generator Used as Stable VCO in a Phase-Locked Loop 5-197