AD6311
1/8- to 1/16 Duty VFD Controller/Driver
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev. A5 Dec 29, 2003
1/11
Features
- 4-pin serial interface
- Key scanning (12x4 matrices)
- Programming display modes (16-digit & 12-
segment to 8-digit & 20-segment)
- Programming dimming step
- High-voltage output (VDD-35V max)
- 5 channels LED ports
- 4-pin general-purpose input port
- Built-in oscillator
- No external resistor necessary for driver outputs
General Description
The AD6311 is a VFD (Vacuum Fluorescent
Display) controller/driver that is driven on a 1/8- to
1/16 duty factor (include key scan). It consists of 12
segment/key scan output lines, 8 grid output lines,
8 segment/grid output drive lines, a display memory,
a control circuit, and a key scan circuit. Serial data
is input to the AD6311 through a four-line serial
interface.
Pin Assignments
Grid
4
Grid
3
Grid
2
Grid
1
LED
5
LED
4
LED
3
LED
2
LED
1
VSS
OSC
Seg
6
/ KS
6
V
DD
VEE
Grid8
Grid7
Grid6
Key2
Key1
STB
CLK
NC
DIN
DOUT
Sw4
Sw3
Sw2
Sw1
Seg
5
/ KS
5
Seg
4
/ KS
4
Seg
3
/ KS
3
Seg20 / Grid9
Seg19 / Grid10
Seg18 / Grid11
42
43
44
45
46
47
48
49
50
51
52
24
23
22
21
20
19
18
17
16
15
14
11
10
9
8
7
6
5
4
3
2
1
29
30
31
32
33
34
35
36
37
38
39
Key4
Key3
13
12
26
25
27
28
Grid
5
40
41
V
DD
VDD
Seg17 / Grid12
Seg14 / Grid15
Seg15 / Grid14
Seg16 / Grid13
Seg13 / Grid16
Seg
2
/ KS
2
Seg
1
/ KS
1
Seg
12
/ KS
12
Seg
11
/ KS
11
Seg
10
/ KS
10
Seg
9
/ KS
9
Seg
8
/ KS
8
Seg
7
/ KS
7
Use all the power pins.
AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Anachip Corp.
www.anachip.com.tw Rev. A5 Dec 29, 2003
2/11
Pin Descriptions
Symbol Name No. Description
DIN Data input 6
Input serial data at rising edge of shift clock,
starting from the low order bit.
DOUT Data output 5
Output serial data at the falling edge of the shift
clock, starting from low order bit. This is N-ch
open-drain output pin.
STB Strobe 9
Initializes serial interface at the rising or falling
edge of the AD6311. It then waits for reception of a
command. Data input after STB falling is
processed as a command. While command data is
processed, current processing is stopped, and the
serial interface is initialized. While STB is high,
CLK is ignored.
CLK Clock input 8
Reads serial data at the rising edge, and outputs
data at the falling edge.
OSC Oscillator pin 52
Connect resistor in between this pin and Vdd to set
up the oscillation frequency.
Seg1/KS1 to
Seg12/KS12 High-voltage output 15 to 26 Multi-function pins, Segment output pins (Dual
function as key scan source)
Grid1 to Grid8 High-voltage output (Grid) 37 to 44 Grid output pins
Seg13/Grid16 to
Seg20/Grid9 High-voltage output (Segment/grid) 27 to 32
35, 36
These pins are selectable for segment or grid
driving.
LED1 to LED5 LED output 46 to 50 CMOS output
KEY1 to KEY4 Key data input 10 to 13 Data input to these pins is latched at the end of the
display cycle.
VDD Logic power 14, 33, 45 Logic power supply
VSS Logic ground 51 Connect this pin to system GND.
VEE Pull-down level 34 Driver power supply
SW1 to SW4 Switch input 1 to 4 These pins constitute a 4-bit general-purpose input
port.
NC NC 7 No connection
Ordering Information
AD6311X X X
Packing
Blank : TrayQ: QFP-52L
Package Lead
Blank: Normal
F: Lead Free
AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Anachip Corp.
www.anachip.com.tw Rev. A5 Dec 29, 2003
3/11
Block Diagram
4-bit
latch
D
IN
D
OUT
CLK
STB
R
V
DD
4
4
V
DD
(+5V)
816
8
8
20 12
8
V
EE
(-30V)
Vss
(0V)
Serial
I/F
5-bit latch
LED
1
LED
5
OSC
SW
1
to
SW
4
KEY
1
to
KEy
4
Command
decoder
Display memory
20 bit
X
16Words
20-bit
output latch
Timing generator
key scan
Key data memory
(4
X
2)
16-bit shift register
Dimming
circuit
Data selector
Grid driver Segment
driver
Seg
1
Seg
12
Seg
13
/Grid
16
Grid
1
Grid
8
Segment/grid
driver
Seg
20
/Grid
9
AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Anachip Corp.
www.anachip.com.tw Rev. A5 Dec 29, 2003
4/11
Absolute Maximum Ratings (TA=25℃,VSS=0V )
Parameter Symbol Rating Unit
Logic supply voltage VDD -0.5 to +7.0 V
Driver supply voltage VEE V
DD +0.5 to VDD -40 V
Logic input voltage VI1 -0.5 to VDD +0.5 V
VFD driver output voltage VO2 V
EE-0.5 to VDD +0.5 V
LED driver output current IO1 +15 mA
VFD driver output current IO2 -40(grid) –15 (segment) mA
Operating ambient temperature TOPT -25 to +85 ℃
Storage temperature TSTG -50 to +125 ℃
Operating Conditions (TA=0 to +70℃,VSS=0V)
Parameter Symbol Conditions Min. Typ. Max. Unit
Logic supply voltage VDD 4.5 5 5.5 V
High-level input voltage VIH 0.7·VDD V
DD V
Low-level input voltage VIL 0 0.3xVDD V
Driver supply voltage VEE 0 VDD-35 V
DC Characteristics (Ta=0 to 70℃, VDD=4.5 to 5.5V, VSS=0V, VEE=VDD-35V)
Parameter Symbol Conditions Min. Typ. Max. Unit
High-level output voltage VOH1 LED1-LED5,IOH1=-1mA 0.9VDD V
Low-level output voltage VOL1 LED1-LED5,IOL1=12mA 1 V
Low-level output voltage VOL2 D
OUT,IOL2=2mA 0.4 V
High-level output current IOH21 V
O=VDD-2V,Seg1 to Seg12 -3 mA
High-level output current IOH22 VO=VDD-2V,Grid 1 to Grid8,
Seg13/Grid16 to Seg20/Grid9 -15 mA
Driver leakage current IOLEAK V
O=VDD-35V, driver off -10 μA
Output pull-down resistor RL Driver output 50 100 150
kΩ
High-level input voltage VIH 0.7VDD V
Low-level input voltage VIL 0.3VDD V
AC Characteristics (Ta=0 to +70℃,VDD=4.5 to 5.5 V)
Parameter Symbol Conditions Min. Typ. Max. Unit
Oscillation frequency fOSC R=51 kΩ 350 500 650 KHZ
Maximum clock frequency fmax. Duty=50% 1 MHZ
Clock pulse width PWCLK 500 ns
Strobe pulse width PWSTB 1 µs
Data setup time tSETUP 100 ns
Data hold time tHOLD 100 ns
Clock-strobe time tCLK-STB CLK↑→STB↑ 1 µs
Wait time tWAIT CLK↑→CLk↓(Note) 1 µs
Note: Refer to page 8.
AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Anachip Corp.
www.anachip.com.tw Rev. A5 Dec 29, 2003
5/11
Function Description
1.0 Command
A command sets the display mode and status of the VFD driver. The first 1 byte input to the AD6311
through the Din pin after the STB pin has fallen is regarded as a command. If STB is made high while a
command/data is transmitted, serial communication is initialized, and the command/data being
transmitted is invalid (however, the command/data already transmitted remains valid).
1.1 Display mode setting command
This command initializes the AD6311 and selects the number of segments and number of grids (8 grid
& 20 segments to 16 grid & 12 segments). When this command is executed, display is forcibly turned
off, and key scanning is also stopped. To resume display, a display ON command must be executed. If
the same mode is selected, however, nothing is performed.
LSB
0 0 - - b3 b2 b1 b0
MSB
Don't care Selects display mode
0xxx : 8 digits, 20 segments
1000: 9 digits, 19 segments
1001: 10 digits, 18 segments
1010: 11 digits, 17 segments
1011: 12 digits, 16 segments
1100: 13 digits, 15 segments
1101: 14 digits, 14 segments
1110: 15 digits, 13 segments
1111: 16 digits, 12 segments
On power application, the 16-digit, 12-segment mode is selected.
1.2 Data setting command
This command sets data write and data read modes. On power application, the normal operation mode
and address increment mode are set.
0 1 - - b3 b2 b1 b0
Don't care
MSB LSB
Sets data write and read modes.
00: Writes data to display memory.
01: Writes data to LED port.
10: Reads key data.
11: Reads SW data.
Sets address increment mode (display memory).
0: Incremenets address after data has been
written.
1: Fixes address.
Sets test mode
0: Normal operation
1: Test mode
AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Anachip Corp.
www.anachip.com.tw Rev. A5 Dec 29, 2003
6/11
1.3 Address setting command
This command sets an address of the display memory. If address 30H or higher is set, the data is
ignored, until a correct address is set. On power application, the address is set to 00H.
1 1 b5 b3 b2 b1 b0
MSB LSB
b4
Address (00H-2FH)
1.4 Display control command
10- b3b2b1b0
MSB LSB
-
Don't care Sets dimming quantity.
000: Sets pulse width to 1/16.
001: Sets pulse width to 2/16.
010: Sets pulse width to 4/16.
011: Sets pulse width to 10/16.
100: Sets pulse width to 11/16.
101: Sets pulse width to 12/16.
110: Sets pulse width to 13/16.
111: Sets pulse width to 14/16.
Tums on/off display.
0: Display off (key scan continues )
1: Display on
On power application, the 1/16-pulse width is set, the display is turned off and key scanning is stopped.
2.0 Display RAM Address and Display Mode
The display RAM stores the data transmitted from an external device to the AD6311 through the serial
interface, and is assigned addresses as follows, in units of 8 bits:
Seg
1 Seg4 Seg
8 Seg
12 Seg
16 Seg
20
00 HL 00 HU 01 HL 01 HU 02 HL GRID1
03 HL 03 HU 04 HL 04 HU 05 HL GRID2
06 HL 06 HU 07 HL 07 HU 08 HL GRID3
09 HL 09 HU 0 AHL 0 AHU 0 BHL GRID4
0 CHL 0 CHU 0 DHL 0 DHU 0 EHL GRID5
0 FHL 0 FHU 10 HL 10 HU 11 HL GRID6
12 HL 12 HU 13 HL 13 HU 14 HL GRID7
15 HL 15 HU 16 HL 16 HU 17 HL GRID8
18 HL 18 HU 19 HL 19 HU 1 AHL GRID9
1 BHL 1 BHU 1 CHL 1 CHU 1 DHL GRID10
1 EHL 1 EHU 1 FHL 1 FHU 20 HL GRID11
21 HL 21 HU 22 HL 22 HU 23 HL GRID12
24 HL 24 HU 25 HL 25 HU 26 HL GRID13
27 HL 27 HU 28 HL 28 HU 29 HL GRID14
2 AHL 2 AHU 2 BHL 2 BHU 2 CHL GRID15
2 DHL 2 DHU 2 EHL 2 EHU 2 FHL GRID16
b0 b3 b4 b7
XX HL XXHU
AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Anachip Corp.
www.anachip.com.tw Rev. A5 Dec 29, 2003
7/11
Lower 4 bits Higher 4 bits
Only the lower 4 bits of the addresses assigned to Seg17 through Seg20 are valid, and the higher 4 bits
are ignored.
3.0 LED Port
Data is written to the LED port by a write command, starting from the least significant bit of the port.
When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED goes off . The data
of bits 6 through 8 is ignored.
---b4b3b2b1b0
MSB LSB
Don't care
LED1
LED2
LED3
LED4
LED5
On power application, all the LEDs remain dark.
4.0 Key Matrix and Key-Input data Storage RAM
The key matrix is of 12×4 configuration, as shown below.
Seg1/KS1
Seg2/KS2
Seg3/KS3
Seg4/KS4
Seg5/KS5
Seg6/KS6
Seg7/KS7
Seg8/KS8
Seg9/KS9
Seg10/KS10
Seg11/KS11
Seg12/KS12
KEY
1
KEY
2
KEY
3
KEY
4
The data of each key is stored as illustrated below, and is read by a read command, starting from the least
significant bit. When the most significant bit of data (Seg12 b7) has been read, the least significant bit of the
next data (Seg1 b0) is read.
KEY1
...
KEY4 KEY1
...
KEY4
Seg
1
/KS
1
Seg
3
/KS
3
Seg
5
/KS
5
Seg
7
/KS
7
Seg
9
/KS
9
Seg
11
/KS
11
Seg
2
/KS
2
Seg
4
/KS
4
Seg
6
/KS
6
Seg
8
/KS
8
Seg
10
/KS
10
Seg
12
/KS
12
b4--------b7b0--------b3
Reading sequence
AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Anachip Corp.
www.anachip.com.tw Rev. A5 Dec 29, 2003
8/11
5.0 SW Data
The SW data is read by a read command, starting from the least significant bit. Bits 5 through 8 of the
SW data are 0.
0 0 0 0 b3 b2 b1 b0
MSB LSB
SW1
SW2
SW3
SW4
Timing Diagram
(1) Serial Communication Format
Reception (command/write data)
If data continues
STB
b7b6b2b1b0
D
IN
87321CLK
Transmission (read data)
654321
t
WAIT
87654321
b7b6b5b4b3b2b1b0
b0 b1 b2 b3 b4 b5
STB
D
IN
CLK
D
OUT
Data reading starts.Data reading command is set.
(Note)
Because the DOUT pin is an N-ch, open-drain output pin, be sure to connect an external pull-up resistor to
this pin (1kΩ to 10 kΩ).
Note : When data is read, a wait time tWAIT of 1 μs is necessary since the rising of the eighth clock that has set the command, until the
falling of the first clock that has read the data.
AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Anachip Corp.
www.anachip.com.tw Rev. A5 Dec 29, 2003
9/11
(2) Key Scanning and Display Timing
1/16
T
DISP
T
DISP
500
μ
s
SEG Output
Grid1
Grid2
Gird3
DIG1 DIG2 DIG3 DIGn
Key scan data
DIG1
1 frame = T
DISP
×
(n+1)
Gridn
≅
One cycle of key scanning consists of two frames, and data of 12×4 matrices is stored in RAM.
AC characteristic waveform
fosc
50%
OSC
STB
CLK
D
IN
D
OUT
Sn/Gn
t
THZ
90%
10%
t
TZH
PW
CLK
PW
CLK
t
HOLD
t
SETUP
tPLZ
PW
STB
t
CLK-STB
tPZL
AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Anachip Corp.
www.anachip.com.tw Rev. A5 Dec 29, 2003
10/11
Applications
Updating display memory by incrementing address
Command 4Data nCommand 3Command 2Command 1 Data 1D
IN
CLK
STB
Command 1: sets display mode
Command 2: sets data(write data to display memory)
Command 3: sets address
Data 1 to n: transfers display data (48 bytes max.)
Command 4: controls display
Updating specific display memory
DataCommand 2Command 2 DataCommand 1
D
IN
CLK
STB
Command 1: sets data
Command 2: sets address
Data: display data
AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Anachip Corp.
www.anachip.com.tw Rev. A5 Dec 29, 2003
11/11
Package Information
52 pins QFP dimension Unit: mm
39 27
26
14
131
52
40
14.0
±
0.5
14.0
±
0.5
17.2
±
0.5
0.15 TYP.
2.7(MAX.)
1.6 TYP.
0.88 TYP.1.0 TYP.0.4 TYP.
17.2
±
0.5
Marking Information
AC
AD6311 X
Part Number
Logo
ID code: internal
Year:
Top view
"02" = 2002
"01" = 2001
XX XX XXX
Nth week: 01~52
Blank: Nomal
F: Lead Free Package
QFP52
