SW
C1
10 μF
L1
6.8 μH
R1
R2
VBAT
VOUT
FB
C2
2.2 μF
C3
47 μF
LBO
PGND
LBI
PS
EN
GND
TPS61020
VO
3.3 V Up To
200 mA
Low Battery
Output
R3
R4 R5
0.9-V To
6.5-V Input
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
TPS6102x 96% Efficient Synchronous Boost Converters
1 Features 3 Description
The TPS6102x devices provide a power supply
1• Qualified for Automotive Applications solution for products powered by either a one-cell,
• 96% Efficient Synchronous Boost Converter two-cell, or three-cell alkaline, NiCd or NiMH, or one-
• Output Voltage Remains Regulated When Input cell Li-Ion or Li-polymer battery. Output currents can
Voltage Exceeds Nominal Output Voltage go as high as 200 mA while using a single-cell
alkaline, and discharge it down to 0.9 V. It can also
• Device Quiescent Current: 25 µA (Typ) be used for generating 5 V at 500 mA from a 3.3-V
• Input Voltage Range: 0.9 V to 6.5 V rail or a Li-Ion battery. The boost converter is based
• Fixed and Adjustable Output Voltage Options Up on a fixed frequency, pulse-width-modulation (PWM)
to 5.5 V controller using a synchronous rectifier to obtain
maximum efficiency. At low load currents, the
• Power Save Mode for Improved Efficiency at Low converter enters the Power Save Mode to maintain a
Output Power high efficiency over a wide load current range. The
• Low Battery Comparator Power Save Mode can be disabled, forcing the
• Low EMI-Converter (Integrated Anti-ringing converter to operate at a fixed switching frequency.
Switch) The maximum peak current in the boost switch is
limited to a value of 800 mA, 1500 mA or 1800 mA
• Load Disconnect During Shutdown depending on the device version.
• Over-Temperature Protection The TPS6102x devices keep the output voltage
• Small 3-mm × 3-mm QFN-10 Package regulated even when the input voltage exceeds the
nominal output voltage. The output voltage can be
2 Applications programmed by an external resistor divider, or is
• All One-Cell, Two-Cell and Three-Cell Alkaline, fixed internally on the chip. The converter can be
disabled to minimize battery drain. During shutdown,
NiCd or NiMH or Single-Cell Li Battery Powered the load is completely disconnected from the battery.
Products A low-EMI mode is implemented to reduce ringing
• Portable Audio Players and, in effect, lower radiated electromagnetic energy
• PDAs when the converter enters the discontinuous
• Cellular Phones conduction mode. The device is packaged in a 10-pin
VSON PowerPAD™ package.
• Personal Medical Products
• Camera White LED Flash Light Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
TPS61025-Q1
TPS61027-Q1 VSON (10) 3.00mm x 3.00mm
TPS61029-Q1
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Simplified Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
www.ti.com
Table of Contents
11.2 Feature Description............................................... 10
1 Features.................................................................. 111.3 Device Functional Modes...................................... 12
2 Applications ........................................................... 111.4 Programming ........................................................ 12
3 Description............................................................. 112 Application and Implementation........................ 14
4 Simplified Schematic............................................. 112.1 Application Information.......................................... 14
5 Revision History..................................................... 212.2 Typical Application................................................ 16
6 Device Comparison Table..................................... 313 Power Supply Recommendations ..................... 20
7 Pin Configuration and Functions......................... 314 Layout................................................................... 20
8 Specifications......................................................... 414.1 Layout Guidelines ................................................. 20
8.1 Absolute Maximum Ratings ...................................... 414.2 Layout Example .................................................... 20
8.2 ESD Ratings ............................................................ 415 Device and Documentation Support................. 21
8.3 Recommended Operating Conditions....................... 415.1 Documentation Support ....................................... 21
8.4 Thermal Information.................................................. 415.2 Related Links ........................................................ 21
8.5 Electrical Characteristics........................................... 515.3 Trademarks........................................................... 21
9 Typical Characteristics.......................................... 615.4 Electrostatic Discharge Caution............................ 21
10 Parameter Measurement Information.................. 815.5 Glossary................................................................ 21
11 Detailed Description ............................................. 916 Mechanical, Packaging, and Orderable
11.1 Functional Block Diagram (TPS61029)................... 9Information........................................................... 21
5 Revision History
Changes from Original (November 2009) to Revision A Page
• Added Device Information table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1
• Added ESD Ratings table ...................................................................................................................................................... 4
• Improved image quality for all equations and figures........................................................................................................... 12
2Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated
TPS61029-Q1
FB
LBO
GND VBAT
SW
VOUT
LBI
PS
EN PGND
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
www.ti.com
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
6 Device Comparison Table
PART NUMBER (1) OUTPUT VOLTAGE (DC/DC) NOMINAL SWITCH CURRENT LIMIT
TPS61029-Q1 Adjustable 1800 mA
TPS61025-Q1(2) 3.3 V 1500 mA
TPS61027-Q1(2) 5 V 1500 mA
(1) For all available packages, see the orderable addendum at the end of the datasheet
(2) Product preview. Contact TI factory for more information
7 Pin Configuration and Functions
VSON (DRC) (DPN)
10-Pin Package
TOP VIEW
Pin Functions
PIN I/O DESCRIPTION
NAME NO.
EN 1 I Enable input (1/VBAT enabled, 0/GND disabled)
FB 3 I Voltage feedback of adjustable versions
GND 5 Control / logic ground
LBI 7 I Low battery comparator input (comparator enabled with EN), may not be left floating, should be connected to
GND or VBAT if comparator is not used
LBO 4 O Low battery comparator output (open drain)
PS 8 I Enable/disable power save mode (1/VBAT disabled, 0/GND enabled)
SW 9 I Boost and rectifying switch input
PGND 10 Power ground
VBAT 6 I Supply voltage
VOUT 2 O Boost converter output
PowerPAD™ Must be soldered to achieve appropriate power dissipation. Should be connected to PGND.
Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 3
TPS61029-Q1
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
www.ti.com
8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Input voltage range SW, VOUT, LBO, VBAT, PS, EN, FB, LBI –0.3 7 V
TJOperating virtual junction temperature range –40 150 °C
Tstg Storage temperature range –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
8.2 ESD Ratings VALUE UNIT
TPS61025-Q1, TPS61027-Q1, and TPS61029-Q1 in DRC package
Human-body model (HBM), per AEC Q100-002(1) ±2000
All pins except EN, GND, ±500
V(ESD) Electrostatic discharge VBAT, and PGND V
Charged-device model (CDM), per AEC
Q100-011 Corner pins (EN, GND, ±750
VBAT, and PGND)
TPS61029-Q1 in DPN package Human-body model (HBM), per AEC Q100-002(1) ±2000
All pins except EN, GND, ±500
V(ESD) Electrostatic discharge VBAT, and PGND V
Charged-device model (CDM), per AEC
Q100-011 Corner pins (EN, GND, ±750
VBAT, and PGND)
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
8.3 Recommended Operating Conditions MIN MAX UNIT
Supply voltage at VBAT, VI(TPS61025, TPS61027) 0.9 6.5 V
Supply voltage at VBAT, VI(TPS61029) 0.9 5.5 V
Operating virtual junction temperature range, TJ–40 125 °C
8.4 Thermal Information DRC DPN
THERMAL METRIC(1) UNIT
10 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 47.2 47.9
RθJC(top) Junction-to-case (top) thermal resistance 67.5 58.3
RθJB Junction-to-board thermal resistance 21.6 22.4 °C/W
ψJT Junction-to-top characterization parameter 1.7 0.9
ψJB Junction-to-board characterization parameter 21.8 22.5
RθJC(bot) Junction-to-case (bottom) thermal resistance 3.6 4.5
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated
TPS61029-Q1
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
www.ti.com
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
8.5 Electrical Characteristics
Over recommended junction temperature range with TA= TJ= –40°C to 125°C and over recommended input voltage
range ,(typical at an ambient temperature range of 25°C) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC/DC STAGE
Minimum input voltage for start-up RL= 120 Ω0.9 1.2 V
Input voltage range, after start-up
VI0.9 6.5 V
(TPS61025, TPS61027)
Input voltage range, after start-up (TPS61029) 0.9 5.5 V
VOOutput voltage range (TPS61029) 1.8 5.5 V
VFB Feedback voltage (TPS61025, TPS61027) 490 500 510 mV
f Oscillator frequency 480 600 720 kHz
ISW Switch current limit (TPS61025, TPS61027) VOUT = 3.3 V 1200 1500 1800 mA
ISW Switch current limit (TPS61029) VOUT = 3.3 V 1500 1800 2100 mA
Start-up current limit 0.4 x ISW mA
SWN switch on resistance VOUT = 3.3 V 260 mΩ
SWP switch on resistance VOUT = 3.3 V 290 mΩ
Total accuracy (including line and load regulation) ±3%
Line regulation 0.6%
Load regulation 0.6%
VBAT 1 3 µA
IO= 0 mA, VEN = VBAT = 1.2 V,
Quiescent current VOUT = 3.3 V, TA= 25°C
VOUT 25 45 µA
VEN = 0 V, VBAT = 1.2 V,
Shutdown current 0.1 1 µA
TA= 25°C
CONTROL STAGE
VUVLO Undervoltage lockout threshold VLBI voltage decreasing 0.8 V
VIL LBI voltage threshold VLBI voltage decreasing 490 500 510 mV
LBI input hysteresis 10 mV
LBI input current EN = VBAT or GND 0.01 0.1 µA
VOL LBO output low voltage VO= 3.3 V, IOI = 100 µA 0.04 0.4 V
Vlkg LBO output leakage current VLBO = 7 V 0.01 0.1 µA
0.2 × V
VIL EN, PS input low voltage VBAT
0.8 × V
VIH EN, PS input high voltage VBAT
EN, PS input current Clamped on GND or VBAT 0.01 0.1 µA
Overtemperature protection 140 °C
Overtemperature hysteresis 20 °C
Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 5
TPS61029-Q1
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
Efficiency - %
IO- Output Current - mA
VBAT = 1.2 V
VBAT = 3.6 V
VBAT = 2.4 V
VO= 5 V
VBAT = 1.8 V
50
55
60
65
70
75
80
85
90
95
100
0.9 1.4 1.9 2.4 2.9 3.4 3.9 4.4 4.9
Efficiency - %
VI- Input Voltage - V
IO= 100 mA VO= 3.3 V
IO= 10 mA
IO= 250 mA
0
200
400
600
800
1000
1200
1400
0.9 1.7 2.5 3.3 4.1
Maximum Output Current - mA
4.9 6.55.7
VI- Input Voltage - V
VO= 3.3 V VO= 5 V
VO= 1.8 V
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
www.ti.com
9 Typical Characteristics Table of Graphs FIGURE
Maximum output current vs Input voltage Figure 1
vs Output current (TPS61025) Figure 2
vs Output current (TPS61027) Figure 3
Efficiency vs Input voltage (TPS61025) Figure 4
vs Input voltage (TPS61027) Figure 5
vs Output current (TPS61025) Figure 6
Output voltage vs Output current (TPS61027) Figure 7
No load supply current into VBAT vs Input voltage Figure 8
No load supply current into VOUT vs Input voltage Figure 9
Figure 1. Maximum Output Current vs Input Voltage Figure 2. TPS61025 Efficiency vs Output Current
Figure 3. TPS61027 Efficiency vs Output Current Figure 4. TPS61025 Efficiency vs Input Voltage
6Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated
TPS61029-Q1
0.9 1.5 2 2.5 3 3.5 4
No Load Supply Current Into VOUT -
4.5 5 6 6.55.5
VI- Input Voltage - V
Am
-0.2
4.8
9.8
14.8
19.8
24.8
29.8
34.8
TA= 85°C
TA= -40°C
TA= 25°C
0
0.2
0.4
0.6
0.8
1.2
1.6
0.9 1.5 2 2.5 3 3.5 4
No Load Supply Current Into VBA
T -
4.5 5 6 6.55.5
VI- Input Voltage - V
Am
TA= 85°C
TA= 25°C
1
1.4
TA= -40°C
- Output Voltage - V
VO
IO- Output Current - mA
VBAT = 3.6 V
4.80
4.85
4.90
4.95
5
5.05
5.10
1 10 100 1000
VO= 5 V
50
55
60
65
70
75
80
85
90
95
100
0.9 1.4 1.9 2.4 2.9 3.4 3.9 4.4 4.9 5.4 5.9
Efficiency - %
VI- Input Voltage - V
IO= 100 mA
VO= 5 V
IO= 250 mA
IO= 10 mA
6.4
3.20
3.25
3.30
3.35
1 10 100 1000
- Output Voltage - V
VO
IO- Output Current - mA
VBAT = 2.4 V
VO= 3.3 V
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
www.ti.com
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
Figure 6. TPS61025 Output Voltage vs Output Current
Figure 5. TPS61027 Efficiency vs Input Voltage
Figure 7. TPS61027 Output Voltage vs Output Current Figure 8. No Load Supply Current Into VBAT vs Input
Voltage
Figure 9. No Load Supply Current Into VOUT vs Input Voltage
Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 7
TPS61029-Q1
SW
C1
10 µF
Power
Supply
L1
6.8 µH
R1
R2
VBAT
VOUT
FB
C2
2.2 µF
C3
47 µF
LBO
PGND
LBI
PS
EN
GND
TPS6102x
List of Components:
U1 = TPS6102xDRC
L1 = EPCOS B82462−G4682
C1, C2 = X7R/X5R Ceramic
C3 = Low ESR Tantalum
VCC
Boost Output
Control Output
R3
R4 R5
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
www.ti.com
10 Parameter Measurement Information
8Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated
TPS61029-Q1
Anti-
Ringing
Gate
Control
PGND
Regulator
Error
Amplifier
PGND
ControlLogic Oscillator
Temperature
Control
VOUT
PGND
FB
SW
VBAT
EN
PS
GND
LBI _
+
_
+
Backgate
Control
Vmax
Control
VOUT 10kΩ
20pF
_
+
Vref =0.5V
GND
LBO
LowBattery
Comparator
_
+Vref =0.5V
GND
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
www.ti.com
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
11 Detailed Description
TPS6102x is based on a fixed frequency, pulse-width-modulation (PWM), controller using synchronous
rectification to obtain maximum efficiency. Input voltage, output voltage, and voltage drop on the NMOS switch
are monitored and forwarded to the regulator. So changes in the operating conditions of the converter directly
affect the duty cycle and must not take the indirect and slow way through the control loop and the error amplifier.
At low load currents, the converter enters Power Save Mode to ensure high efficiency over a wide load current
range. The Power Save mode can be disabled, forcing the converter to operate at a fixed switching frequency.
11.1 Functional Block Diagram (TPS61029)
Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 9
TPS61029-Q1
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
www.ti.com
11.2 Feature Description
11.2.1 Controller Circuit
The controller circuit of the device is based on a fixed frequency multiple feedforward controller topology. Input
voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So
changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect
and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier,
only has to handle small signal errors. The input for it is the feedback voltage on the FB pin or, at fixed output
voltage versions, the voltage on the internal resistor divider. It is compared with the internal reference voltage to
generate an accurate and stable output voltage.
The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and
the inductor. The typical peak current limit is set to 1500 mA. An internal temperature sensor prevents the device
from getting overheated in case of excessive power dissipation.
11.2.1.1 Synchronous Rectifier
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier.
Because the commonly used discrete Schottky rectifier is replaced with a low RDS(ON) PMOS switch, the power
conversion efficiency reaches 96%. To avoid ground shift due to the high currents in the NMOS switch, two
separate ground pins are used. The reference for all control functions is the GND pin. The source of the NMOS
switch is connected to PGND. Both grounds must be connected on the PCB at only one point close to the GND
pin. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In
conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in
shutdown and allows current flowing from the battery to the output. This device however uses a special circuit
which takes the cathode of the backgate diode of the high-side PMOS and disconnects it from the source when
the regulator is not enabled (EN = low).
The benefit of this feature for the system design engineer is that the battery is not depleted during shutdown of
the converter. No additional components have to be added to the design to make sure that the battery is
disconnected from the output of the converter.
11.2.1.2 Down Regulation
In general, a boost converter only regulates output voltages which are higher than the input voltage. This device
operates differently. For example, it is able to regulate 3.0 V at the output with two fresh alkaline cells at the input
having a total cell voltage of 3.2 V. Another example is powering white LEDs with a forward voltage of 3.6 V from
a fully charged Li-Ion cell with an output voltage of 4.2 V. To control these applications properly, a down
conversion mode is implemented.
If the input voltage reaches or exceeds the output voltage, the converter changes to the conversion mode. In this
mode, the control circuit changes the behavior of the rectifying PMOS. It sets the voltage drop across the PMOS
as high as needed to regulate the output voltage. This means the power losses in the converter increase. This
has to be taken into account for thermal consideration. The down conversion mode is automatically turned off as
soon as the input voltage falls about 50 mV below the output voltage. For proper operation in down conversion
mode the output voltage should not be programmed below 50% of the maximum input voltage which can be
applied.
11.2.1.3 Device Enable
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry including the low-battery comparator is
switched off, and the load is isolated from the input (as described in the Synchronous Rectifier Section). This
also means that the output voltage can drop below the input voltage during shutdown. During start-up of the
converter, the duty cycle and the peak current are limited in order to avoid high peak currents drawn from the
battery.
10 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated
TPS61029-Q1
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
00.5 11.5 22.5 33.5 44.5 5
VBAT = 5 V
VBAT = 3.6 V
VBAT = 2.4 V
VBAT = 1.8 V
VBAT = 1.2 V
VO− Output Voltage − V
Precharge Current − A
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
www.ti.com
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
Feature Description (continued)
11.2.1.4 Softstart and Short Circuit Protection
When the device enables, the internal startup cycle starts with the first step, the precharge phase. During
precharge, the rectifying switch is turned on until the output capacitor is charged to a value close to the input
voltage. The rectifying switch is current limited during that phase. The current limit increases with the output
voltage. This circuit also limits the output current under short circuit conditions at the output. Figure 10 shows the
typical precharge current vs output voltage for specific input voltages:
Figure 10. Precharge and Short Circuit Current
After charging the output capacitor to the input voltage, the device starts switching. If the input voltage is below
1.4 V the device works with a fixed duty cycle of 50% until the output voltage reaches 1.4 V. After that the duty
cycle is set depending on the input output voltage ratio. Until the output voltage reaches its nominal value, the
boost switch current limit is set to 40% of its nominal value to avoid high peak currents at the battery during
startup. As soon as the output voltage is reached, the regulator takes control and the switch current limit is set
back to 100%.
11.2.1.5 Low Battery Detector Circuit—LBI/LBO
The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag
when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is
enabled. When the device is disabled, the LBO pin is high-impedance. The switching threshold is 500 mV at LBI.
During normal operation, LBO stays at high impedance when the voltage, applied at LBI, is above the threshold.
It is active low when the voltage at LBI goes below 500 mV.
The battery voltage, at which the detection circuit switches, can be programmed with a resistive divider
connected to the LBI pin. The resistive divider scales down the battery voltage to a voltage level of 500 mV,
which is then compared to the LBI threshold voltage. The LBI pin has a built-in hysteresis of 10 mV. See the
application section for more details about the programming of the LBI threshold. If the low-battery detection
circuit is not used, the LBI pin should be connected to GND (or to VBAT) and the LBO pin can be left
unconnected. Do not let the LBI pin float.
Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 11
TPS61029-Q1
parR3
200 k
C 20 pF 1
R4
W
æ ö
= ´ -
ç ÷
è ø
O O
FB
V V
R3 R4 1 180 k 1
V 500 mV
æ ö æ ö
= ´ - = W ´ -
ç ÷ ç ÷
è ø
è ø
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
www.ti.com
Feature Description (continued)
11.2.1.6 Low-EMI Switch
The device integrates a circuit that removes the ringing that typically appears on the SW node when the
converter enters discontinuous current mode. In this case, the current through the inductor ramps to zero and the
rectifying PMOS switch is turned off to prevent a reverse current flowing from the output capacitors back to the
battery. Due to the remaining energy that is stored in parasitic components of the semiconductor and the
inductor, a ringing on the SW pin is induced. The integrated antiringing switch clamps this voltage to VBAT and
therefore dampens ringing.
11.3 Device Functional Modes
11.3.1 Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage on VBAT is lower than
approximately 0.8 V. When in operation and the battery is being discharged, the device automatically enters the
shutdown mode if the voltage on VBAT drops below approximately 0.8 V. This undervoltage lockout function is
implemented in order to prevent the malfunctioning of the converter.
11.3.2 Power Save Mode
The PS pin can be used to select different operation modes. To enable power save, PS must be set low. Power
save mode is used to improve efficiency at light load. In power save mode the converter only operates when the
output voltage trips below a set threshold voltage. It ramps up the output voltage with one or several pulses and
goes again into power save mode once the output voltage exceeds the set threshold voltage. This power save
mode can be disabled by setting the PS to VBAT. In down conversion mode, power save mode is always active
and the device cannot be forced into fixed frequency operation at light loads.
11.4 Programming
11.4.1 Programming the Output Voltage
The output voltage of the TPS61020 dc/dc converter can be adjusted with an external resistor divider. The typical
value of the voltage at the FB pin is 500 mV. The maximum recommended value for the output voltage is 5.5 V.
The current through the resistive divider should be about 100 times greater than the current into the FB pin. The
typical current into the FB pin is 0.01 µA, and the voltage across R4 is typically 500 mV. Based on those two
values, the recommended value for R4 should be lower than 500 kΩ, in order to set the divider current at 1 µA or
higher. Because of internal compensation circuitry the value for this resistor should be in the range of 200 kΩ.
From that, the value of resistor R3, depending on the needed output voltage (VO), can be calculated using
Equation 1:
(1)
If as an example, an output voltage of 3.3 V is needed, a 1.0-MΩresistor should be chosen for R3. If for any
reason the value for R4 is chosen significantly lower than 200 kΩadditional capacitance in parallel to R3 is
recommended, in case the device shows instable regulation of the output voltage. The required capacitance
value can be easily calculated using Equation 2:
(2)
12 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated
TPS61029-Q1
BAT BAT
LBI threshold
V V
R1 R2 1 390 k 1
V 500 mV
-
æ ö æ ö
= ´ - = W ´ -
ç ÷ ç ÷
è ø
è ø
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
www.ti.com
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
Programming (continued)
11.4.2 Programming the LBI/LBO Threshold Voltage
The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The
typical current into the LBI pin is 0.01 µA, and the voltage across R2 is equal to the LBI voltage threshold that is
generated on-chip, which has a value of 500 mV. The recommended value for R2 is therefore in the range of 500
kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage VBAT, can be
calculated using Equation 3.
(3)
The output of the low battery supervisor is a simple open-drain output that goes active low if the dedicated
battery voltage drops below the programmed threshold voltage on LBI. The output requires a pullup resistor with
a recommended value of 1 MΩ. If not used, the LBO pin can be left floating or tied to GND.
Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 13
TPS61029-Q1
SW
C1
10 µF
L1
6.8 µH
R1
R2
VBAT
VOUT
FB
C2
2.2 µF
C3
47 µF
LBO
PGND
LBI
PS
EN
GND
TPS61027
List of Components:
U1 = TPS61027DRC
L1 = EPCOS B82462-G4682
C1, C2 = X7R,X5R Ceramic
C3 = Low ESR Tantalum
VCC 5 V
Boost Output
LBO
R5
Battery
Input
SW
C1
10 µF
L1
6.8 µH
R1
R2
VBAT
VOUT
FB
C2
2.2 µF
C3
100 µF
LBO
PGND
LBI
PS
EN
GND
TPS61027
List of Components:
U1 = TPS61027DRC
L1 = EPCOS B82462-G4682
C1, C2 = X7R,X5R Ceramic
C3 = Low ESR Tantalum
VCC 5 V
Boost Output
LBO
R5
Battery
Input
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
www.ti.com
12 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
12.1 Application Information
The devices are designed to operate from an input voltage supply range between 0.9 V (Vin rising UVLO is 1.2V)
and 6.5 V with a maximum switching current limit up to 1.8A. The devices operate in PWM mode for medium to
heavy load conditions and in power save mode at light load currents. In PWM mode the TPS6102x converter
operates with the nominal switching frequency of 600kHz typically. As the load current decreases, the converter
enters power save mode, reducing the switching frequency and minimizing the IC quiescent current to achieve
high efficiency over the entire load current range. The Power Save mode can be disabled when connecting PS
pin to logic high, forcing the converter to operate at a fixed switching frequency.
12.1.1 Application Examples
Figure 11. Power Supply Solution for Maximum Output Power Operating From a Single Alkaline Cell
Figure 12. Power Supply Solution for Maximum Output Power Operating From a Dual/Triple Alkaline Cell
or Single Li-Ion Cell
14 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated
TPS61029-Q1
SW
C1
10 µF
L1
6.8 µH
R1
R2
VBAT
VOUT
R5
C2
2.2 µF
C3
47 µF
LBO
PGND
LBI
PS
EN
GND
TPS61027
List of Components:
U1 = TPS61027DRC
L1 = EPCOS B82462-G4682
C1, C2, C5, C6 = X7R,X5R Ceramic
C3 = Low ESR Tantalum
DS1 = BAT54S
LBO
C5
0.1 µF
DS1 C6
1 µF
VCC2 -5 V
Unregulated
Auxiliary Output
Battery
Input
FB
VCC1 5 V
Boost Main Output
SW
C1
10 µF
L1
6.8 µH
R1
R2
VBAT
VOUT
R5
C2
2.2 µF
C3
47 µF
LBO
PGND
LBI
PS
EN
GND
TPS61027
List of Components:
U1 = TPS61027DRC1
L1 = EPCOS B82462-G4682
C3, C5, C6, = X7R,X5R Ceramic
C3 = Low ESR Tantalum
DS1 = BAT54S
LBO
C5
0.1 µF
DS1
C6
1 µF
VCC2 10 V
Unregulated
Auxiliary Output
Battery
Input
FB
VCC1 5 V
Boost Main Output
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
www.ti.com
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
Application Information (continued)
Figure 13. Power Supply Solution With Auxiliary Positive Output Voltage
Figure 14. Power Supply Solution With Auxiliary Negative Output Voltage
Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 15
TPS61029-Q1
( )
BAT OUT BAT
L OUT
V V V
L
I V
´ ±
=D ´ ¦ ´
OUT
L OUT
BAT
V
I I
V 0.8
= ´ ´
SW
C1Power
Supply
L1
R1
R2
VBAT
VOUT
FB
C2 C3
LBO
PGND
LBI
PS
EN
GND
TPS61020
VCC
Boost Output
Control Output
R3
R4 R5
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
www.ti.com
12.2 Typical Application
TPS6102x with 1.2V-6.5 VIN, 800 mA Output Current
Figure 15. Typical Application Circuit for Adjustable Output Voltage Option
12.2.1 Design Requirements
The TPS6102x dc/dc converters are intended for systems powered by a single up to triple cell Alkaline, NiCd,
NiMH battery with a typical terminal voltage between 0.9 V and 6.5 V. They can also be used in systems
powered by one-cell Li-Ion or Li-Polymer with a typical voltage between 2.5 V and 4.2 V. Additionally, any other
voltage source with a typical output voltage between 0.9 V and 6.5 V can power systems where the TPS6102x is
used.
12.2.1.1 Inductor Selection
A boost converter normally requires two main passive components for storing energy during the conversion. A
boost inductor and a storage capacitor at the output are required. To select the boost inductor, it is
recommended to keep the possible peak inductor current below the current limit threshold of the power switch in
the chosen configuration. For example, the current limit threshold of the TPS6102xs switch is 1800 mA at an
output voltage of 5 V. The highest peak current through the inductor and the switch depends on the output load,
the input (VBAT), and the output voltage (VOUT). Estimation of the maximum average inductor current can be done
using Equation 4:
(4)
For example, for an output current of 200 mA at 3.3 V, at least 920 mA of average current flows through the
inductor at a minimum input voltage of 0.9 V.
The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it is
advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the
magnetic hysteresis losses in the inductor, as well as output voltage ripple and EMI. But in the same way,
regulation time at load changes rises. In addition, a larger inductor increases the total system costs. With those
parameters, it is possible to calculate the value for the inductor by using Equation 5:
(5)
Parameter fis the switching frequency and ΔILis the ripple current in the inductor, i.e., 20% × IL. In this example,
the desired inductor has the value of 5.5 µH. With this calculated value and the calculated currents, it is possible
to choose a suitable inductor. In typical applications a 6.8 µH inductance is recommended. The device has been
optimized to operate with inductance values between 2.2 µH and 22 µH. Nevertheless operation with higher
inductance values may be possible in some applications. Detailed stability analysis is then recommended. Care
has to be taken that load transients and losses in the circuit can lead to higher currents as estimated in
Equation 5. Also, the losses in the inductor caused by magnetic hysteresis losses and copper losses are a major
parameter for total circuit efficiency.
The following inductor series from different suppliers have been used with the TPS6102x converters:
16 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated
TPS61029-Q1
( )
( )
REG
FB
4 R3 R4
d
AV R4 1 i 0.9 s
´ +
= = ´ + ´ w´ m
ESR OUT ESR
V I RD = ´
( )
OUT OUT BAT
min
OUT
I V V
Cv V
´ -
=¦ ´ D ´
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
www.ti.com
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
Table 1. List of Inductors(1)
SUPPLIER INDUCTOR SERIES
CDRH4D28
Sumida CDRH5D28
7447789
Wurth Elektronik 744042
EPCOS B82462-G4
SD25
Cooper Electronics Technologies SD20
(1) See Third-Party Products Discalimer
12.2.1.2 Input Capacitor
At least a 10-µF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior
of the total power supply circuit. A ceramic capacitor or a tantalum capacitor with a 100-nF ceramic capacitor in
parallel, placed close to the IC, is recommended.
12.2.1.3 Output Capacitor
The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of
the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is
possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, by
using Equation 6:
(6)
Parameter fis the switching frequency and ΔV is the maximum allowed ripple.
With a chosen ripple voltage of 10 mV, a minimum capacitance of 24 µF is needed. The total ripple is larger due
to the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 7:
(7)
An additional ripple of 16 mV is the result of using a tantalum capacitor with a low ESR of 80 mΩ. The total ripple
is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In this
example, the total ripple is 26 mV. Additional ripple is caused by load transients. This means that the output
capacitor has to completely supply the load during the charging phase of the inductor. A reasonable value of the
output capacitance depends on the speed of the load transients and the load current during the load change.
With the calculated minimum value of 24 µF and load transient considerations the recommended output
capacitance value is in a 47 to 100 µF range. For economical reasons, this is usually a tantalum capacitor.
Therefore, the control loop has been optimized for using output capacitors with an ESR of above 30 mΩ. The
minimum value for the output capacitor is 10 µF.
12.2.2 Detailed Design Procedure
12.2.2.1 Small Signal Stability
When using output capacitors with lower ESR, like ceramics, the adjustable voltage version is recommended.
The missing ESR can be compensated in the feedback divider. Typically a capacitor in the range of 4.7 pF in
parallel to R3 helps to obtain small signal stability with lowest ESR output capacitors. For more detailed analysis,
the small signal transfer function of the error amplifier and the regulator, which is given in Equation 8, can be
used:
(8)
Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 17
TPS61029-Q1
t - Time - 50 μs/div
VI= 3.6 V,
RL= 250 Ω,
VO= 5 V
Output Voltage
50 mV/div, AC
Inductor Current
200 mA/div, DC
t - Time - 50 μs/div
VI= 1.2 V,
RL= 330 Ω,
VO= 3.3 V
Output Voltage
20 mV/div, AC
Inductor Current
100 mA/div, DC
t - Time - 1 μs/div
VI= 1.2 V,
RL= 33 Ω,
VO= 3.3 V
Output Voltage
20 mV/div
Inductor Current
200 mA/div
t - Time - 1 μs/div
VI= 3.6 V,
RL= 25 Ω,
VO= 5 V
Output Voltage
20 mV/div
Inductor Current
200 mA/div
J(MAX) A
D(MAX)
JA
T T 125 C 85 C
P 847 mW
R 47.2 C / W
q
-° - °
= = =
°
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
www.ti.com
12.2.2.2 Thermal Information
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-
dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below.
• Improving the power dissipation capability of the PCB design
• Improving the thermal coupling of the component to the PCB
• Introducing airflow in the system
The maximum recommended junction temperature (TJ) of the TPS6102x devices is 125°C. The thermal
resistance of the 10-pin QFN 3 × 3 package (DRC) is RΘJA = 47.2°C/W, if the PowerPAD is soldered. Specified
regulator operation is assured to a maximum ambient temperature TAof 85°C. Therefore, the maximum power
dissipation is about 847 mW. More power can be dissipated if the maximum ambient temperature of the
application is lower.
(9)
12.2.3 Application Curves
Figure 16. TPS61025 Output Voltage In Continuous Mode Figure 17. TPS61027 Output Voltage In Continuous Mode
Figure 18. TPS61025 Output Voltage In Power Save Mode Figure 19. TPS61027 Output Voltage In Power Save Mode
18 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated
TPS61029-Q1
t - Time - 500 s/divµ
VI= 3.6 V,
RL= 50 ,Ω
VO= 5 V
Output Voltage
2 V/div
, DC
Inductor Current
200 mA/div, DC
Voltage At SW
2 V/div, DC
Enable
5 V/div
, DC
t - Time - 1 ms/div
Output Voltage
1 V/div, DC
Inductor Current
200 mA/div, DC
Voltage At SW
2 V/div, DC
Enable
5 V/div, DC
VI= 2.4V,
RL= 33 Ω,
VO= 3.3 V
t - Time - 2 ms/div
VI= 1.8 V to 2.4 V,
RL= 33 Ω,
VO= 3.3 V
Input Voltage
500 mV/div, AC
Output Voltage
20 mV/div, AC
t - Time - 2 ms/div
VI= 3 V to 3.6 V,
RL= 25 W,
VO= 5 V
Input Voltage
500 mV/div, AC
Output Voltage
20 mV/div, AC
t - Time - 2 ms/div
VI= 1.2 V,
IL= 100 mA to 200 mA,
VO= 3.3 V
Output Current
100 mA/div, DC
Output Voltage
20 mV/div, AC
t - Time - 2 ms/div
Output Current
100 mA/div, DC
Output Voltage
20 mV/div, AC
VI= 3.6 V,
IL= 100 mA to 200 mA,
VO= 5 V
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
www.ti.com
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
Figure 21. TPS61027 Load Transient Response
Figure 20. TPS61025 Load Transient Response
Figure 22. TPS61025 Line Transient Response Figure 23. TPS61027 Line Transient Response
Figure 24. TPS61025 Start-Up After Enable Figure 25. TPS61027 Start-Up After Enable
Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 19
TPS61029-Q1
GND
Exposed
Thermal PAD
VIA connect with LBO, LBI, EN Feedback
Resistors 1
Input
Capacitor
Ground
LBO
FB
VOUT
VBAT
LBI
PS
SW
Inductor
Output
Capacitor
Feedback
Resistors 2
Ground
VOUT
LBO Resistor
EN PGND
VIN
Top Layer
LBI Resistor 2
LBI Resistor 1
VIA connect with Ground
Bottom Layer
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
www.ti.com
13 Power Supply Recommendations
This input supply should be well regulated with the rating of TPS6102x. If the input supply is located more than a
few inches from the device, additional bulk capacitance may be required in addition to the ceramic bypass
capacitors. An electrolytic or tantalum capacitor with a value of 47 μF is a typical choice.
14 Layout
14.1 Layout Guidelines
• As for all switching power supplies, the layout is an important step in the design, especially at high peak
currents and high switching frequencies.
• If the layout is not carefully done, the regulator could show stability problems as well as EMI problems.
Therefore, use wide and short traces for the main current path and for the power ground tracks.
• The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
• Use a common ground node for power ground and a different one for control ground to minimize the effects
of ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
• The feedback divider should be placed as close as possible to the control ground pin of the IC.
• To lay out the control ground, it is recommended to use short traces as well, separated from the power
ground traces. This avoids ground shift problems, which can occur due to superimposition of power ground
current and control ground current.
14.2 Layout Example
Figure 26. Layout
20 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated
TPS61029-Q1
TPS61025-Q1, TPS61027-Q1
,
TPS61029-Q1
www.ti.com
SLVSA31A –NOVEMBER 2009–REVISED DECEMBER 2014
15 Device and Documentation Support
15.1 Documentation Support
15.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
15.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY DOCUMENTS SOFTWARE COMMUNITY
TPS61025-Q1 Click here Click here Click here Click here Click here
TPS61027-Q1 Click here Click here Click here Click here Click here
TPS61029-Q1 Click here Click here Click here Click here Click here
15.3 Trademarks
PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
15.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
15.5 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
16 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 21
TPS61029-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 24-Dec-2014
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS61029QDPNRQ1 ACTIVE VSON DPN 10 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 61029Q
TPS61029QDRCRQ1 ACTIVE VSON DRC 10 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 OES
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 24-Dec-2014
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS61029-Q1 :
•Catalog: TPS61029
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS61029QDPNRQ1 VSON DPN 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
TPS61029QDRCRQ1 VSON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Dec-2014
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS61029QDPNRQ1 VSON DPN 10 3000 367.0 367.0 35.0
TPS61029QDRCRQ1 VSON DRC 10 3000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Dec-2014
Pack Materials-Page 2
GENERIC PACKAGE VIEW
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
DRC 10 VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
4204102-3/M
www.ti.com
PACKAGE OUTLINE
C
10X 0.30
0.18
2.4 0.1
2X
2
1.65 0.1
8X 0.5
1.0
0.8
10X 0.5
0.3
0.05
0.00
A3.1
2.9 B
3.1
2.9
(0.2) TYP
4X (0.25)
2X (0.5)
VSON - 1 mm max heightDRC0010J
PLASTIC SMALL OUTLINE - NO LEAD
4218878/B 07/2018
PIN 1 INDEX AREA
SEATING PLANE
0.08 C
1
56
10
(OPTIONAL)
PIN 1 ID 0.1 C A B
0.05 C
THERMAL PAD
EXPOSED
SYMM
SYMM
11
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
10X (0.24)
(2.4)
(2.8)
8X (0.5)
(1.65)
( 0.2) VIA
TYP
(0.575)
(0.95)
10X (0.6)
(R0.05) TYP
(3.4)
(0.25)
(0.5)
VSON - 1 mm max heightDRC0010J
PLASTIC SMALL OUTLINE - NO LEAD
4218878/B 07/2018
SYMM
1
56
10
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:20X
11
SYMM
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
SOLDER MASK
OPENING
SOLDER MASK
METAL UNDER
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(R0.05) TYP
10X (0.24)
10X (0.6)
2X (1.5)
2X
(1.06)
(2.8)
(0.63)
8X (0.5)
(0.5)
4X (0.34)
4X (0.25)
(1.53)
VSON - 1 mm max heightDRC0010J
PLASTIC SMALL OUTLINE - NO LEAD
4218878/B 07/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 11:
80% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
SYMM
1
56
10
EXPOSED METAL
TYP
11
SYMM
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