User's Guide
SNVA306B–November 2007–Revised April 2013
AN-1758 LP38502SD-ADJ Evaluation Board
1 Introduction
The LP38502SD-ADJ is a 1.5A Low-Dropout (LDO) linear regulator in the LLP-8 package which has an
adjustable output voltage (set by external resistors).
2 Basic Application Circuit
The basic application circuit which is built up on the evaluation board is shown in Figure 1:
Figure 1. Basic Application Circuit
3 Changing the Output Voltage
The resistors R1 and R2 set the output voltage. The equation to determine output voltage is:
VOUT = VADJ x (1 + R1/R2) (1)
where VADJ is typically 0.6V.
The board has installed values of:
R1 = 19.1kΩ
R2 = 6.04kΩ
which sets the output to 2.5V.
R1 can be adjusted to change the nominal output voltage to other values. The minimum output voltage
which can be set is the ADJ pin voltage, which is approximately 0.6V. This is obtained by installing a
jumper or low value resistor (less than 10Ω) at R1. The maximum usable output voltage is limited by the
maximum input voltage which is 5.5V. Since rated dropout voltage at full current is 0.375V, this means the
maximum usable output voltage for full current operation is about 5.1V.
4 Feedforward Capacitor C2
The PCB layout includes a location for C2, which is a feedforward capacitor connected across R1. If the
data sheet guidelines are followed, and R2 does not exceed 10 kΩ, C2 is not required and has no effect
on performance. The internal compensation is such that an internal zero provides more than adequate
phase margin so external compensation is never needed.
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Power Dissipation
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However, if the value of R2 is increased above 10 kΩ, the effect of the internal zero gradually diminishes
and the phase margin is reduced. At an R2 value of approximately 50 kΩ, the phase margin will be low
enough that instability may occur. In such cases, some of the lost phase margin can be regained by
placing a capacitor at C2. Although it is sometimes possible to regain adequate phase margin this way, it
is recommended that the data sheet guidelines be followed and R2 not exceed 10 kΩ(so C2 is never
required).
5 Power Dissipation
The power dissipated within the regulator IC is given by:
PD= IL(VIN - VOUT) (2)
Where:
PDis the power dissipated in the IC regulator U1.
ILis the load current.
VIN is the value of VIN measured at TP2 (not at J1).
VOUT is the value of VOUT measured at TP5 (not at J4).
The thermal resistance of U1 from junction to ambient can be assumed to be approximately 80°C/W for
this assembly. That means that the junction temperature will rise about 80°C above ambient for each Watt
of power dissipated within the IC.
The parametric specifications of the IC are for a maximum junction temperature of 125°C, and the
maximum allowable junction temperature is 150°C. This limits maximum usable power dissipation for
this package to approximately 1.5W. If power dissipation exceeds this (and the junction temperature
approaches 150°C) the part may go into thermal shutdown.
6 PCB Component Layout
The components listed in the basic application circuit can be identified using the silkscreen on the top
layer of the PCB (see Figure 2):
Figure 2. Top View of the PCB Assembly
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Bill of Materials
7 Bill of Materials
The initial evaluation boards were built up for a 2.5V regulated output. The components used in the PCB
assembly are listed below:
Table 1. Bill of Materials
Designator Qty. Description Part Number
PCB 1 PC board 551600046-001
R1 1 Resistor, 19.1kΩ, 1% Vishay CRCW08051912F
R2 1 Resistor, 6.04kΩ, 1% Vishay CRCW08056041F
R3 1 Resistor, 51.1kΩ, 1% Vishay CRCW08055112F
J1 1 Red Banana Jack Digi-Key J-151-ND
J2,J3 2 Black Banana Jack Digi-Key J-152-ND
J4 1 Blue Banana Jack Digi-Key J-155-ND
C1,C3 2 Cap, CER, 10 µF Digi-Key PCC2225CT-ND
TP1-TP5 5 Test Points Newark 160-2043-02-01-00
U1 1 IC, LP38502 LP38502SD-ADJ
C2 ****NOT INSTALLED FOR THIS ASSEMBLY
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