DG401/403/405 Vishay Siliconix Low-Power, High-Speed CMOS Analog Switches DESCRIPTION FEATURES The DG401/403/405 monolithic analog switches were designed to provide precision, high performance switching of analog signals. Combining low power (0.35 W, typ) with high speed (tON: 75 ns, typ), the DG401 series is ideally suited for portable and battery powered industrial and military applications. * * * * * * 44 V Supply Max Rating 15 V Analog Signal Range On-Resistance - rDS(on): 30 Low Leakage - ID(on): 40 pA Fast Switching - tON: 75 ns Ultra Low Power Requirements - PD: 0.35 W * TTL, CMOS Compatible * Single Supply Capability Built on the Vishay Siliconix proprietary high-voltage silicongate process to achieve high voltage rating and superior switch on/off performance, break-before-make is guaranteed for the SPDT configurations. An epitaxial layer prevents latchup. BENEFITS * Wide Dynamic Range * Break-Before-Make Switching Action * Simple Interfacing Each switch conducts equally well in both directions when on, and blocks up to 30 V peak-to-peak when off. On-resistance is very flat over the full 15 V analog range, rivaling JFET performance without the inherent dynamic range limitations. APPLICATIONS * * * * * * The three devices in this series are differentiated by the type of switch action as shown in the functional block diagrams. Audio and Video Switching Sample-and-Hold Circuits Battery Operation Test Equipment Communications Systems PBX, PABX FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION DG401 DG401 LCC Dual-In-Line and SOIC NC D1 NC NC NC NC NC NC D2 1 16 S1 2 15 IN1 3 14 4 13 5 12 6 11 7 8 Key 3 1 S1 20 IN1 19 4 18 V- GND NC 5 17 GND VL NC 6 16 NC NC 7 NC 8 10 IN2 9 S2 15 14 9 NC Document Number: 70049 S-61921-Rev. G, 16-Oct-06 2 NC NC V- V+ Top View D1 10 11 D2 NC 12 S2 13 VL V+ Two SPST Switches per Package TRUTH TABLE Logic Switch 0 OFF 1 ON Logic "0" 0.8 V Logic "1" 2.4 V IN2 Top View www.vishay.com 1 DG401/403/405 Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION DG403 DG403 LCC Dual-In-Line and SOIC D1 NC D3 S3 S4 D4 NC D2 NC D1 NC 16 S1 1 2 15 3 14 4 13 5 12 IN1 Key V+ 11 7 10 IN2 8 9 S2 1 20 18 V- S3 5 17 GND NC 6 16 NC S4 D4 7 15 VL 8 14 V+ 9 10 11 12 NC D2 NC Top View DG405 DG405 16 S1 2 15 D3 3 14 S3 4 13 S4 5 12 D4 NC D2 6 11 NC D1 NC Key 3 IN1 Logic SW1, SW2 0 OFF SW3, SW4 ON 1 ON OFF Logic "0" 0.8 V Logic "1" 2.4 V 13 IN2 2 1 S1 20 IN1 19 Two DPST Switches per Package D3 4 18 V- GND S3 5 17 GND 16 Switch NC 6 Logic VL NC 0 OFF V+ S4 7 15 VL 1 ON 8 14 10 IN2 8 9 S2 D4 9 10 11 NC D2 NC www.vishay.com 2 TRUTH TABLE V- 7 Top View Two SPDT Switches per Package LCC 1 NC S2 Top View Dual-In-Line and SOIC D1 19 4 VL 6 2 IN1 D3 V- GND 3 S1 12 S2 V+ TRUTH TABLE Logic "0" 0.8 V Logic "1" 2.4 V 13 IN2 Top View Document Number: 70049 S-61921-Rev. G, 16-Oct-06 DG401/403/405 Vishay Siliconix ORDERING INFORMATION Temp Range Package Part Number DG401 - 40 to 85 C 16-Pin Plastic DIP DG401DJ DG401DJ-E3 16-Pin Plastic DIP DG403DJ DG403DJ-E3 DG403 - 40 to 85 C 16-Pin Narrow SOIC DG403DY DG403DY-E3 DG403DY-T1 DG403DY-T1-E3 DG405 16-Pin Plastic DIP - 40 to 85 C 16-Pin Narrow SOIC DG405DJ DG405DJ-E3 DG405DY DG405DY-E3 DG405DY-T1 DG405DY-T1-E3 ABSOLUTE MAXIMUM RATINGS TA = 25 C, unless otherwise noted Parameter Symbol V+ to V- Limit GND to V- 25 VL (GND - 0.3 V) to (V+) + 0.3 V Digital Inputsa, VS, VD (V-) - 2 V to (V+) + 2 V or 30 mA, whichever occurs first Current (Any Terminal) Continuous 30 Current, S or D (Pulsed 1 ms, 10 % duty) 100 Storage Temperature Power Dissipation (Package)b Unit 44 (DJ, DY Suffix) 16-Pin Plastic 16-Pin SOICd DIPc - 65 to 125 V mA C 450 600 mW Notes: a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 6 mW/C above 75 C. d. Derate 7.6 mW/C above 75 C. Document Number: 70049 S-61921-Rev. G, 16-Oct-06 www.vishay.com 3 DG401/403/405 Vishay Siliconix SPECIFICATIONSa D Suffix - 40 to 85 C Test Conditions Unless Specified V+ = 15 V, V- = - 15 V Parameter Symbol VL = 5 V, VIN = 2.4 V, 0.8 Vf Tempb IS = - 10 mA, VD = 10 V V+ = 13.5 V, V- = - 13.5 V IS = - 10 mA, VD = 5 V, 0 V V+ = 16.5 V, V- = - 16.5 V Room Full 30 45 55 Room Full 3 3 5 Typc Mind Maxd Unit 15 V Analog Switch Analog Signal Rangee VANALOG Drain-Source On-Resistance rDS(on) Drain-Source On-Resistance rDS(on) IS(off) Switch Off Leakage Current ID(off) Channel On Leakage Current ID(on) Full - 15 - 0.5 -5 - 0.5 -5 0.5 5 0.5 5 - 0.04 -1 - 10 1 10 Full 0.005 -1 1 Full 0.005 -1 1 V+ = 16.5 V, V- = - 16.5 V VD = 15.5 V, VS = 15.5 V Room Hot Room Hot V+ = 16.5 V, V- = - 16.5 V VS = VD = 15.5 V Room Hot - 0.01 - 0.01 nA Digital Control Input Current VIN Low IIL Input Current VIN High IIH VIN under test = 0.8 V All Other = 2.4 V VIN under test = 2.4 V All Other = 0.8 V A Dynamic Characteristics Turn-On Time tON 75 150 Turn-Off Time Break-Before-Make Time Delay (DG403) RL = 300 , CL = 35 pF See Figure 2 Room tOFF Room 30 100 tD RL = 300 , CL = 35 pF Room 35 Q CL = 10 nF Vgen = 0 V, Rgen = 0 Room 60 OIRR XTALK RL = 100 , CL = 5 pF f = 1 MHz Charge Injection Off Isolation Reject Ratio Channel-to-Channel Crosstalk Source Off Capacitance CS(off) Drain Off Capacitance CD(off) Channel On Capacitance f = 1 MHz, VS = 0 V CD, CS(on) Room 72 Room 90 Room 12 Room 12 Room 39 Room Full Room Full Room Full Room Full 0.01 ns 5 pC dB pF Power Supplies Positive Supply Current I+ Negative Supply Current I- Logic Supply Current IL Ground Current IGND V+ = 16.5 V, V- = - 16.5 V VIN = 0 or 5 V - 0.01 1 5 -1 -5 0.01 - 0.01 1 5 A -1 -5 Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25 C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 4 Document Number: 70049 S-61921-Rev. G, 16-Oct-06 DG401/403/405 Vishay Siliconix TYPICAL CHARACTERISTICS 25 C, unless noted 7 3.5 V+ = 15 V V- = -15 V 6 3 SW1, 2 5 2.5 V TH (V) V T (V) VL = 7 V 4 SW3, 4 3 2 1.5 2 1 1 0.5 0 VL = 5 V 0 0 2 4 6 8 10 12 14 16 18 5 10 15 20 VL - Logic Supply (V) 35 60 50 V+ = 15 V, V- = -15 V VL = 5 V 45 r DS(on) - Drain-Source On-Resistance ( ) r DS(on) - Drain-Source On-Resistance ( ) 30 Input Switching Threshold vs. Supply Voltages Input Switching Threshold vs. Logic Supply Voltage 40 35 85 C 30 25 C 25 0 C 20 15 - 40 C 10 5 0 -15.0 TA = 25 C 50 6V 10 V 12 V 15 V 20 V 40 30 22 V 20 10 -10.0 -5.0 0.0 5.0 10.0 - 25 15.0 - 15 -5 5 26 15 VD - Drain Voltage (V) VD - Drain Voltage (V) rDS(on) vs. VD and Power Supply Voltage rDS(on) vs. VD and Temperature 100 50 TA = 25 C 90 CL = 10 nF 40 7.5 V 80 30 70 60 12 V 50 15 V 10 0 20 V 40 100 pF 22 V 30 - 10 20 - 20 10 0 5 10 15 20 25 VD - Drain Voltage (V) rDS(on) vs. VD and Power Supply Voltage (V- = 0 V) Document Number: 70049 S-61921-Rev. G, 16-Oct-06 1 nF 20 10 V Q (pC) r DS(on) - Drain-Source On-Resistance ( ) 25 (V+) - 30 - 15 - 10 -5 0 5 10 15 VS - Source Voltage (V ) Charge Injection vs. Analog Voltage www.vishay.com 5 DG401/403/405 Vishay Siliconix TYPICAL CHARACTERISTICS 25 C, unless noted 1000p 40 V+ = 15 V V- = -15 V VL = 5 V VD = 14 V Id (off) 20 Id (on) Is (off) I S, I D (pA) 100p I D (off) Is (off) 0 Id (on) - 20 - 40 10p - 60 Id (off) - 80 1p - 40 - 20 0 20 40 60 - 100 80 - 15.0 Temperature (C) - 10.0 - 5.0 0.0 5.0 10.0 15.0 VD or V S - Drain or Source Voltage (V) Leakage Current vs. Analog Voltage Leakage Current vs. Temperature 100 nA 120 I- V+ = 15 V V- = - 15 V VL = 5 V I+ V+ = 15 V V- = - 15 V VL = 5 V 100 tON 1 nA t ON , t OFF (ns) I+, I-, IL (A) IL 100 pA 80 VS = 10 V VS = - 10 V 60 tOFF VS = 10 V 40 10 pA 20 VS = -10 V 1 pA 0 - 40 - 20 0 20 40 60 80 100 - 40 - 20 0 TA - Temperature (C) 80 100 Switching Time vs. Temperature* Supply Current vs. Temperature 180 300 VS = 5 V 160 270 0V VS = 5 V 240 140 VS = - 5 V 120 210 100 80 tON 60 tOFF 20 180 -5V 150 - 15 V 120 90 VS = 5 V 40 t ON , t OFF (ns) t ON , t OFF (ns) 20 40 60 TA - Temperature ( C) -5V 30 VS = - 5 V 0 tON - 15 V 60 tOFF 0V 0 0 5 10 15 20 25 0 5 10 15 20 25 V+, V- Positive and Negative Supplies (V) V+ - Positive Supply (V) Switching Time vs. Power Supply Voltage* Switching Time vs. Positive Supply Voltage* *Refer to Figure 2 for test conditions. www.vishay.com 6 Document Number: 70049 S-61921-Rev. G, 16-Oct-06 DG401/403/405 Vishay Siliconix TYPICAL CHARACTERISTICS 25 C, unless noted 100 mA 10 mA Supply Current (A) 1 mA 100 A 10 A 1 A 100 nA 10 nA 10 100 1K 10K 100K 1M 10M Frequency (Hz) Supply Current vs. Switching Frequency SCHEMATIC DIAGRAM (TYPICAL CHANNEL) V+ S VL V- VIN Level Shift/ Drive V+ GND D V- Figure 1. Document Number: 70049 S-61921-Rev. G, 16-Oct-06 www.vishay.com 7 DG401/403/405 Vishay Siliconix TEST CIRCUITS VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the output waveform. +5V Logic Input + 15 V VL V+ S 10 V D 0V tOFF Switch Input* VO tf < 20 ns tf < 20 ns 50 % VS VO 90 % IN RL 1 k V- GND CL 35 pF Switch Input* - 15 V tON 90 % VO -V S * VS = 10 V for t ON, V S = - 10 V for tOFF CL (includes fixture and stray capacitance) RL VO = V S 0V Switch Output Note: RL + rDS(on) Logic input waveform is inverted for switches that have the opposite logic sense control Figure 2. Switching Time +5V + 15 V VL VS1 VS2 3V Logic Input 50 % V+ S1 D1 S2 D2 0V VS1 VO1 VO1 Switch Output IN RL1 V- GND 90 % VO2 RL2 L2 0V VS2 VO2 CL1 CL2 90 % 0V Switch Output tD tD - 15 V CL (includes fixture and stray capacitance) Figure 3. Break-Before-Make Rg +5V + 15 V VL V+ S IN Vg VO CL 10 nF 3V GND VO D VO IN On Off On VQ = VO x CL - 15 V Figure 4. Charge Injection www.vishay.com 8 Document Number: 70049 S-61921-Rev. G, 16-Oct-06 DG401/403/405 Vishay Siliconix TEST CIRCUITS C +5V C V+ Rg = 50 50 RL V- D S2 RL 100 IN GND V+ IN 0.8 V C GND Off Isolation = 20 log - 15 V VS XTALK Isolation = 20 log VO C = RF bypass C = RF bypass +5V + 15 V + 15 V C C C C VL V+ S VS VS VO Figure 7. Crosstalk Figure 5. Off Isolation VL C V- - 15 V +5V C Rg = 50 VO 0 V, 2.4 V VL S1 VS VO D S VS + 15 V + 15 V C VL +5V V+ S VO D Meter Rg = 50 RL 100 IN 0 V, 2.4 V GND V- IN HP4192A Impedance Analyzer or Equivalent 0 V, 2.4 V D C GND V- C f = 1 MHz - 15 V C = RF bypass Figure 6. Insertion Loss Document Number: 70049 S-61921-Rev. G, 16-Oct-06 - 15 V Figure 8. Capacitances www.vishay.com 9 DG401/403/405 Vishay Siliconix APPLICATIONS +5V + 15 V VL Left Source 1 Right Left D1 ein S3 D3 Left IN1 D2 V+ D1 S3 D3 + - eout S4 D4 C1 Integrate/ Reset Right TTL IN2 Channel Select VL S1 IN1 S2 TTL + 15 V V+ S1 Source 2 Right +5V S2 D2 S4 D4 C2 IN2 DG403 GND DG403 Slope Select V- GND V- - 15 V - 15 V Figure 9. Stereo Source Selector Figure 10. Dual Slope Integrator Dual Slope Integrators: The DG403 is well suited to configure a selectable slope integrator. One control signal selects the timing capacitor C1 or C2. Another one selects ein or discharges the capacitor in preparation for the next integration cycle. Band-Pass Switched Capacitor Filter: +5V + 15 V VL V+ S1 D1 S3 D3 IN1 Single-pole double-throw switches are a common element for switched capacitor networks and filters. The fast switching times and low leakage of the DG403 allow for higher clock rates and consequently higher filter operating frequencies. ein S2 D2 S4 D4 IN2 DG403 Clock GND V- - 15 V + - eout Figure 11. Band-Pass Switched Capacitor Filter www.vishay.com 10 Document Number: 70049 S-61921-Rev. G, 16-Oct-06 DG401/403/405 Vishay Siliconix APPLICATIONS Peak Detector: A3 acting as a comparator provides the logic drive for operating SW1. The output of A2 is fed back to A3 and compared to the analog input ein. If ein > eout the output of A3 is high keeping SW1 closed. This allows C1 to charge up to the ana- log input voltage. When ein goes below eout A3 goes negative, turning SW1 off. The system will therefore store the most positive analog input experienced. Reset SW2 ein - A1 + + A3 - SW1 R1 + A2 - DG401 eout C1 Figure 12. Positive Peak Detector Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?70049. Document Number: 70049 S-61921-Rev. G, 16-Oct-06 www.vishay.com 11 Legal Disclaimer Notice Vishay Notice Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale. Document Number: 91000 Revision: 08-Apr-05 www.vishay.com 1