LM1203B - National Semiconductor

TL/H/11489

LM1203B 100 MHz RGB Video Amplifier System

January 1996

LM1203B

100 MHz RGB Video Amplifier System

General Description

The LM1203B is an improved version of the popular

LM1203 wideband video amplifier system. The device is in-

tended for high resolution RGB CRT monitors. In addition to

three matched video amplifiers, the LM1203B contains

three gated differential input black level clamp comparators

for brightness control and three matched attenuator circuits

for contrast control. Each video amplifier contains a gain set

or ‘‘Drive’’ node for setting maximum system gain or provid-

ing gain trim capability for white balance. The LM1203B also

contains a voltage reference for the video inputs. The

LM1203B is pin and function compatible with the LM1203.

Applications

YHigh resolution RGB CRT monitors

YVideo AGC amplifiers

YWideband amplifiers with gain and DC offset controls

Features

YThree wideband video amplifiers (100 MHz @b3 dB)

YMatched (g0.1 dB or 1.2%) attenuators for

contrast control

YThree externally gated comparators for

brightness control

YProvisions for individual gain control (Drive) of each

video amplifier

YVideo input voltage reference

YLow impedance output driver

YStable on a single sided board

Improvements over LM1203

Y100 MHz vs 70 MHz bandwidth

YVOUT low: 0.15V vs 0.9V

Ytr,t

: 3.7 ns vs 5 ns

YBuilt in power down spot killer

Block and Connection Diagrams

28-Lead Molded DIP

TL/H/11489–1

Order Number LM1203BN

See NS Package Number N28B

C1996 National Semiconductor Corporation RRD-B30M66/Printed in U. S. A.

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales

Office/Distributors for availability and specifications.

Supply Voltage (VCC)

Pins 1, 13, 23, 28 (Note 3) 13.5V

Peak Video Output Source Current

(Any 1A) Pins 15, 20, or 25 28 mA

Voltage at Any Input Pin (VIN)V

CC tVIN tGND

Power Dissipation (PD)

(Above 25§C Derate

Based on iJA and TJ) 2.5W

Thermal Resistance (iJA) 50§C/W

Junction Temperature (TJ) 150§C

ESD Susceptibility (Note 4) 2.0 kV

Storage Temperature b65§Ctoa

150§C

Lead Temperature

(Soldering, 10 seconds) 265§C

Operating Ratings (Note 2)

Temperature Range b20§Ctoa

80§C

Supply Voltage (VCC) 10.8V sVCC s13.2V

DC Electrical Characteristics See Test Circuit

(Figure 2)

Ae25§C; VCC1 eVCC2 e12V. S17, 21, 26

Open; V12 e6V; V14 e0V; V15 e2.0V unless otherwise stated.

Symbol Parameter Conditions Typical Limit Units

(Note 5) (Note 6)

ISSupply Current VCC1 aVCC2,R

Le%70 95 mA(max)

(Note 7)

V11 Video Input Reference Voltage 2.8 2.5 V(min)

3.1 V(max)

IbVideo Input Bias Current Any One Amplifier 7 20 mA(max)

V14l Clamp Gate Low Input Voltage Clamp Comparators On 1.2 0.8 V(max)

V14h Clamp Gate High Input Voltage Clamp Comparators Off 1.6 2.0 V(min)

I14l Clamp Gate Low Input Current V14 e0V b1b5.0 mA(max)

I14h Clamp Gate High Input Current V14 e12V 0.07 0.2 mA(max)

IclampaClamp Cap Charge Current V5, 8 or 10 e0V 750 500 mA(min)

IclampbClamp Cap Discharge Current V5, 8 or 10 e5V b750 500 mA(min)

VOL Video Output Low Voltage V5, 8 or 10 e0V 0.15 0.5 V(max)

VOH Video Output High Voltage V5, 8, or 10 e5V 7.5 7 V(min)

DVO(2V) Video Output Offset Voltage Between Any Two 2g25 mV(max)

Amplifiers, V15 e2V

DVO(4V) Video Output Offset Voltage Between Any Two 2g25 mV(max)

Amplifiers, V15 e4V

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AC Electrical Characteristics See Test Circuit

(Figure 2)

Ae25§C, VCC1 eVCC2 e12V. S17, 21, 26

Closed; V14 e0V; V15 e4V unless otherwise stated.

Symbol Parameter Conditions Typical Limit Units

(Note 5) (Note 6)

AV max Video Amplifier Gain V12 e12V, VIN e560 mVPP 6.5 4.5 V/V(min)

DVV5V Attenuation @5V Ref: AV max, V12 e5V b8dB

V2V Attenuation @2V Ref: AV max, V12 e2V b30 dB

AV match Absolute Gain Match @AVmax V12 e12V (Note 8) g0.3 dB

DAV track 1 Gain Change between Amplifiers V12 e5V (Notes 8, 9) g0.1 dB

DAV track 2 Gain Change between Amplifiers V12 e2V (Notes 8, 9) g0.3 dB

THD Video Amplifier Distortion V12 e3V, VOe1V

PP 1%

3 dB) Video Amplifier Bandwidth V12 e12V, VOe4V

(Notes 10, 11) (With 36 pF Peaking Cap from 100 MHz

Pins 18, 22 and 27 to GND)

3 dB) Video Amplifier Bandwidth V12 e12V, VOe4V

PP 60 MHz

(Notes 10, 11) (No External Peaking Cap)

tr/tfOutput Rise/Fall Time VOe4V

PP (With 36 pF

(Note 10) Peaking Cap from Pins 18, 3.7 ns

22 and 27 to GND)

trOutput Rise Time (Note 10) VOe4V

PP (No External 5.5 ns

Peaking Capacitor)

tfOutput Fall Time (Note 10) VOe4V

PP (No External 6.0 ns

Peaking Capacitor)

Vsep 10 kHz Video Amplifier 10 kHz Isolation V12 e12V (Note 12) b70 dB

Vsep 10 MHz Video Amplifier 10 MHz Isolation V12 e12V (Notes 10, 12) b50 dB

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.

Note 2: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications

and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics

may degrade when the device is not operated under the listed test conditions.

Note 3: VCC supply pins 1, 13, 23, 28 must be externally wired together to prevent internal damage during VCC power on/off cycles.

Note 4: Human body model, 100 pF discharged through a 1.5 kXresistor.

Note 5: Typical specifications are specified at a25§C and represent the most likely parametric norm.

Note 6: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 7: The supply current specified is the quiescent current for VCC1 and VCC2 with RLe%, see

Figure 2

’s test circuit. The supply current for VCC2 (pin 23) also

depends on the output load. With video output at 2V DC, the additional current through VCC2 is 18 mA for

Figure 2

’s test circuit.

Note 8: Measure gain difference between any two amplifiers. VIN e1V

PP.

Note 9: DAVtrack is a measure of the ability of any two amplifiers to track each other and quantifies the matching of the three attenuators. It is the difference in

gain change between any two amplifiers with the contrast voltage (V12) at either 5V or 2V measured relative to an AVmax condition, V12 e12V. For example, at

AVmax the three amplifiers’ gains might be 17.4 dB, 16.9 dB and 16.4 dB and change to 7.3 dB, 6.9 dB and 6.5 dB respectively for V12 e5V. This yields the

measured typical g0.1 dB channel tracking.

Note 10: When measuring video amplifier bandwidth or pulse rise and fall times, a single sided with ground plane printed circuit board without socket is

recommended. Video amplifier 10 MHz isolation test also requires this printed circuit board.

Note 11: Adjust input frequency from 10 kHz (AVmax reference level) to the b3 dB corner frequency (fb3dB

Note 12: Measure output levels of the other two undriven amplifiers relative to the driven amplifier to determine channel separation. Terminate the undriven

amplifier inputs to simulate generator loading. Repeat test at fIN e10 MHz for Vsep e10 MHz.

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TL/H/11489–2

FIGURE 2. LM1203B Test Circuit

Typical Performance Characteristics VCC e12V, TAe25§C unless otherwise specified

Contrast vs Frequency

TL/H/11489–3

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Typical Performance Characteristics VCC e12V, TAe25§C unless otherwise specified (Continued)

Crosstalk vs Frequency

TL/H/11489–4

Frequency Response Using Various Peaking Caps

TL/H/11489–5

Attenuation vs Contrast Voltage

TL/H/11489–6

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TL/H/11489–7

FIGURE 3. LM1203B Typical Application

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Applications Information

Figure 4

shows the block diagram of a typical analog RGB

color monitor. The RGB monitor is used with CAD/CAM

work stations, PC’s, arcade games and in a wide range of

other applications that benefit from the use of color display

terminals. The RGB color monitor characteristics may differ

in such ways as sweep rates, screen size, CRT color trio

spacing (dot pitch), or in video amplifier bandwidths but will

still be generally configured as shown in

Figure 4

. Separate

horizontal and vertical sync signals may be required or they

may be contained in the green video input signal. The video

input signals are usually supplied by coax cable which is

terminated in 75Xat the monitor input and internally AC

coupled to the video amplifiers. These input signals are ap-

proximately 1V peak to peak in amplitude and at the input of

the high voltage video section, approxmiately 5V peak to

peak. At the cathode of the CRT the video signals can be as

high as 60V peak to peak. One important requirement of the

three video amplifiers is that they match and track each

other over the contrast and brightness control range. The

Figure 4

block labeled ‘‘VIDEO AMPLIFICATION WITH

GAIN AND DC CONTROL’’ describes the function of the

LM1203B which contains the three matched video amplifi-

ers, contrast control and brightness control.

Circuit Description

Figure 5

is a block diagram of one of the video amplifiers

along with the contrast and brightness controls. The con-

trast control is a DC-operated attenuator which varies the

AC gain of all three amplifiers simultaneously while not intro-

ducing any signal distortions or tracking erros. The bright-

ness control function requires a ‘‘sample and hold’’ circuit

(black level clamp) which holds the DC bias of the video

amplifiers and CRT cathodes constant during the black level

reference portion of the video waveform. The clamp com-

parator, when gated on during this reference period, will

charge or discharge the clamp capacitor until the plus input

of the clamp comparator matches that of the minus input

voltage which was set by the brightness control.

TL/H/11489–8

FIGURE 4. Typical RGB Color Monitor Block Diagram

TL/H/11489–9

FIGURE 5. Block Diagram of LM1203B Video Amplifier with Contrast and Black Level Control

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Circuit Description (Continued)

VIDEO AMPLIFIER SECTION

Figure 6

is a simplified schematic of one of the three video

amplifiers along with the recommended external compo-

nents. The IC pin numbers are circled and all external com-

ponents are shown outside the dashed line. The video input

is applied to pin 6 via a 10 mF coupling capacitor and a 47X

resistor. The resistor is added to limit the current through

the input pin should the applied voltage rise above VCC or

drop below ground. The performance of the LM1203B is not

degraded by the 47Xresistor. However if EMI is a concern,

this resistor can be increased to well over 100Xwhere the

rise and fall times will become longer. DC bias for the video

input is through the 10k resistor connected to the 2.8V refer-

ence at pin 11. The low frequency roll-off of the amplifier is

set by the 10k resistor and the 10 mF capacitor. Transistor

Q1 buffers the video signal to the base of Q2. Q2’s collector

current is then directed to the VCC1 supply directly or

through the 4k load resistor depending upon the differential

DC voltage at the bases of Q3 and Q4. This differential DC

voltage is generated by the contrast control circuit which is

described in the following sections. A 0.01 mF decoupling

capacitor in series with a 30Xresistor is required between

pins 2 and 3 to ensure high frequency isolation between the

three video amplifiers which share these common connec-

tions. The video signal is buffered by Q5 and Q6 and DC

level shifted by the voltage drop across R5. The magnitude

of the current through R5 is determined by the voltage at pin

8. The voltage at pin 8 is set by the clamp comparator out-

put current which charges or discharges the clamp hold ca-

pacitor during the black level period of the video waveform.

Transistors Q9 and Q10 are darlington connected to ensure

a minimum discharge of the clamp hold capacitor during the

time that the clamp capacitor is gated off. Q7, Q8 and R6

form a current mirror which sets a voltage at the base of

Q11. Q11 buffers the video signal to the base of Q12 which

provides additional signal gain. The ‘‘Drive’’ pin allows the

user to trim the Q12 gain of each amplifier to correct for gain

differences in the CRT and high voltage cathode driver gain

stages. A small capacitor (several pico-Farads) from the

‘‘Drive’’ pin to ground will cause high frequency peaking and

slightly improve the amplifier’s bandwidth.

For individual gain adjustment of each video channel, a 51X

resistor in series with a 100Xpotentiometer should be used

with the red and green channel drive pins. A 91Xresistor

used with the blue channel drive pin sets the blue channel

amplifier gain at approximately 6.2. The 100Xpotentiome-

ters at the red and green channel drive pins allow a gain of

6.2 with g25% gain adjustment. The video signal at the

TL/H/11489–10

FIGURE 6. Simplified Schematic of LM1203B Video Amplifier Section

with Recommended External Components

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Circuit Description (Continued)

collector of Q12 is buffered and level shifted down by Q13,

Q14 and Q15 to the base of the output emitter follower Q16.

A50Xdecoupling resistor is included in series with the emit-

ter of Q16 and the video output pin so as to prevent oscilla-

tions when driving capacitive loads. An external resistor

should be connected between the video output pin and

ground. The value of this resistor should not be less than

390Xor else package power limitations may be exceeded

under worse case conditions (high supply voltage, maximum

current, maximum temperature). The collector current from

the video output transistor of each video channel is returned

to the power supply at VCC2, pin 23. When making power

dissipation calculations note that the data sheet specifies

only the VCC1 and VCC2 supply current at 12V supply volt-

age with no pull down resistor at the output (i.e., RLe%,

see Test Circuit

Figure 2

). The IC power dissipation due to

VCC2 is dependent upon the external video output pull down

resistor.

INPUT REFERENCE AND CONTRAST

CONTROL SECTION

Figure 7

shows the input reference and contrast control cir-

cuitry. A temperature compensated 2.8V reference voltage

is made available at pin 11. The external DC biasing resis-

tors shown should not be larger than 10k because minor

differences in input bias currents of the individual video am-

plifiers may cause offsets in gain.

Figure 7

also shows how

the contrast control circuit is configured. R21, R22, Q22,

Q23, and Q24 establish a low impedance zero TC half sup-

ply voltage reference at the base of Q25. The differential

amplifier formed by Q27, Q28 and feedback transistor Q29

along with R28 and R29 establish a differential base voltage

for Q3 and Q4 in

Figure 6

. When externally adding or sub-

tracting current from the collector of Q28, a new differential

voltage is generated that reflects the change in the ratio of

currents in Q27 and Q28. To allow voltage control of the

current through Q28, resistor R27 is added between the

collector Q28 and pin 12. A capacitor should be connected

from pin 12 to ground to prevent noise from the contrast

control potentiometer from entering the IC.

TL/H/11489–11

FIGURE 7. Simplified Schematic of LM1203B Video Input

Reference and Contrast Control Circuits

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Circuit Description (Continued)

CLAMP GATE AND CLAMP

COMPARATOR SECTION

Figures 8

and

show simplified schematics of the clamp

gate and clamp comparator circuits. The clamp gate circuit

(Figure 8)

consists of a PNP input buffer transistor (Q46), a

PNP emitter coupled pair (Q47 and Q49) referenced on one

side to 2.1V and an output switch transistor Q53. When the

clamp gate input at pin 14 is high (l1.5V) the Q53 switch is

on and shunts the 200 mA current from current source Q54

to ground. When pin 14 is low (k1.3V) the Q53 switch is off

and the 200 mA current is mirrored by the current mirror

comprised of Q55 and Q36 (see

Figure 9

). Consequently

the clamp comparator comprised of the differential pair Q35

and Q37 is enabled. The input of each clamp comparator is

similar to the clamp gate except that an NPN emitter cou-

pled pair is used to control the current that will charge or

discharge the clamp capacitors at pins 5, 8, and 10. PNP

transistors are used at the inputs because they offer a num-

ber of advantages over NPNs. PNPs will operate with base

voltages at or near ground and will usually have a greater

emitter base breakdown voltage (BVebo). Because the dif-

ferential input voltage to the clamp comparator during the

video scan period could be greater than the BVebo of NPN

transistors, a resistor (R37) with a value one half that of R36

or R39 is connected between the bases of Q34 and Q38.

The clamp comparator’s common mode range is from

ground to approximately 9V and the maximum differential

input voltage is VCC and ground.

TL/H/11489–12

FIGURE 8. Simplified Schematic of LM1203B Clamp Gate Circuit

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Circuit Description (Continued)

TL/H/11489–13

FIGURE 9. Simplified Schematic of LM1203B Clamp Comparator Circuits

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Additional Applications of the LM1203B

Figure 10

shows the configuration for a three channel high

frequency amplifier with non gated DC feedback. Pin 14 is

tied low to turn on the clamp comparators (feedback amplifi-

ers). The inverting inputs (Pins 17, 21, 26) are connected to

the amplifier outputs from a low pass filter. Additional low

frequency filtering is provided by the clamp caps. The drive

resistors can be made variable or fixed at values between

0Xand 300X. Maximum output swings are achieved when

the DC output is set to approximately 4V. The high frequen-

cy response will be dependent upon external peaking at the

drive pins.

TL/H/11489–14

FIGURE 10. Three Channel High Frequency Amplifier with Non-Gated DC Feedback (Non-Video Applications)

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Additional Applications of the LM1203B (Continued)

Figure 11

shows a complete RGB video preamplifier circuit

using the LM1203B. A quad Exclusive-OR gate

(MM74HC86) is used to generate the back porch clamp sig-

nal from the composite sync input signal. The composite

H Sync input signal may have either polarity. The back

porch clamp signal applied to LM1203B’s pin 14 allows

clamping the video output signals to the black reference

level, thereby providing DC restoration. The back porch

clamp pulse width is determined by the time constant due to

the product of R11 and C15. For fast horizontal scan rates,

the back porch clamp pulse width can be made narrower by

decreasing the value of R11 or C15 or both. Note that an

MM74C86 Exclusive-Or gate may also be used, however,

the pin out is different than that of the MM74HC86.

For optimum performance and maximum bandwidth, high

speed buffer transistors (Q1, Q2, and Q3 in

Figure 11

) are

recommended. The 2N5770 NPN transistors maintain high

speed at high currents when driving the inputs of high volt-

age CRT drivers.

TL/H/11489–15

FIGURE 11. LM1203B Applications Circuit

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LM1203B versus LM1203

LM1203B is an improved version of the LM1203 RGB video

amplifier system and is pin and function compatible with the

LM1203. LM1203B’s output voltage can swing as low as

0.15V as opposed to 0.9V for the LM1203. This eliminates

the need for a level shift stage between the preamplifier and

the CRT driver in most applications.

The LM1203B also offers faster rise and fall times of 3.7 ns

versus 5 ns for the LM1203, resulting in 100 MHz bandwidth

versus 70 MHz for LM1203. A peaking capacitor across the

drive resistor is necessary to obtain these rise and fall times.

The LM1203B is stable on a well layed out single sided PC

board, but due to its wider bandwidth the device may oscil-

late if plugged directly into an existing LM1203 board. For

suggestions on optimum PC board layout, please refer to

the PC board layout given in the LM1203A data sheet. The

ground plane is not necessary for the LM1203B due to its

lower bandwidth.

The LM1203B also includes a built in power down spot killer

to prevent a flash on the screen upon power down. In some

preamplifiers, the video output signal may go high as the

device is being powered down. This may cause a whiter

than white level at the output of the CRT driver thus causing

a flash on the screen.

Reference

Ott, Henry W., ‘‘Noise Reduction Techniques in Electronic

Systems’’, John Wiley & Sons, New York, 1976.

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LM1203B 100 MHz RGB Video Amplifier System

Physical Dimensions inches (millimeters) unless otherwise noted

28-Lead Molded Dual-In-Line Package (N)

Order Number LM1203BN

NS Package Number N28B

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failure to perform, when properly used in accordance support device or system, or to affect its safety or

with instructions for use provided in the labeling, can effectiveness.

be reasonably expected to result in a significant injury

to the user.

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