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FEATURES
• HIGH INTERNAL DISSIPATION — 400 Watts
• HIGH CURRENT — 40A Continuous, 80A PEAK
• HIGH SLEW RATE — 50V/µs
• OPTIONAL BOOST VOLTAGE INPUTS
APPLICATIONS
• SEMI-CONDUCTOR TESTING
DESCRIPTION
The PA52 is a MOSFET power operational amplifier that
extends the performance limits of power amplifiers in slew
rate and power bandwidth, while maintaining high current and
power dissipation ratings.
Boost voltage inputs allow the small signal portion of the
amplifier to operate at a higher voltage than the high current
output stage. The amplifier is then biased to achieve close
linear swings to the supply rails at high currents for extra ef-
ficient operation.
EQUIVALENT SCHEMATIC
The JEDEC MO-127 12-pin Power Dip™ package (see
Package Outlines) is hermetically sealed and isolated from
the internal circuits. The use of compressible thermal washers
and/or improper mounting torque will void the product warranty.
Please see “General Operating Considerations”.
EXTERNAL CONNECTIONS
12-PIN DIP
PACKAGE STYLE CR
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ABSOLUTE MAXIMUM RATINGS
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS SUPPLY VOLTAGE, +VS to –VS 200V
BOOST VOLTAGE, +Vb to -Vb 230V
OUTPUT CURRENT, within SOA 80A
POWER DISSIPATION, internal 400W
INPUT VOLTAGE, differential ±20V
INPUT VOLTAGE, common mode ±Vb
TEMPERATURE, pin solder - 10s 300°C
TEMPERATURE, junction2 150°C
TEMPERATURE, storage –65 to +150°C
OPERATING TEMPERATURE RANGE, case –55 to +125°C
PA52 • PA52A
SPECIFICATIONS
NOTES: * The specification of PA52A is identical to the specification for PA52 in applicable column to the left
1. Unless otherwise noted: TC = 25°C, DC input specifications are ± value given. Power supply voltage is typical rating.
±VBOOST = ±VS.
2. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to
achieve high MTTF. For guidance, refer to the heatsink data sheet.
3. Rating applies if the output current alternates between both output transistors at a rate faster than 60 Hz.
The PA52 is constructed from MOSFET transistors. ESD handling procedures must be observed.
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.
CAUTION
PA52 PA52A
PARAMETER TEST CONDITIONS1 MIN TYP MAX MIN TYP MAX UNITS
INPUT
OFFSET VOLTAGE, initial 5 10 2 5 mV
OFFSET VOLTAGE, vs. temperature Full temperature range 20 50 * * µV/°V
OFFSET VOLTAGE, vs. supply 10 30 * * µV/V
BIAS CURRENT, initial 10 50 * * pA
BIAS CURRENT vs. supply .01 * pA/V
OFFSET CURRENT, initial 10 50 * * pA
INPUT IMPEDANCE, DC 10" * Ω
IMPUT CAPACITANCE 13 * pF
COMMON MODE VOLTAGE RANGE Full temperature range -VB +12
+VB -14 * V
COMMON MODE REJECTION,DC Full temp, range, VCM= ±20V 90 100 * * dB
INPUT NOISE 100KHZ BW, Rs=1KΩ 10 * µVrms
GAIN
OPEN LOOP,@ 15Hz Full temperature range 94 102 * * dB
GAIN BANDWIDTH PRODUCT RL=10Ω 3 * MHz
POWER BANDWIDTH RL=4Ω, Vo=180VP-P, Av=-10 90 * kHz
Full temperature range
OUTPUT
VOLTAGE SWING Io=40A ±VS 9.5 ±VS 8.0 * * V
VOLTAGE SWING, PA52 ±VBOOST=±VS±10V, Io=40A ±VS 5.8 ±VS 4.0 V
VOLTAGE SWING, PA52A ±VBOOST=±VS±10V, Io=50A ±VS 5.8 ±VS 5.0 V
CURRENT, peak 3ms 10% Duty Cycle 80 * A
SETTLING TIME TO.1% AV= -10,10V STEP,RL=4Ω 1 * µs
SLEW RATE AV=-10 50 * V/µs
RESISTANCE IO=0, NO LOAD, 2MHZ 2.5 * Ω
POWER SUPPLY
VOLTAGE, ±VBOOST Full temperature range +14, -12 ±30 ±115 * * * V
VOLTAGE, ±VS Full temperature range ±3 ±100 * * V
CURRENT,quiescent, boost supply 26 32 * * mA
CURRENT, quiescent, total 30 36 * * mA
THERMAL
RESISTANCE,AC,junction to case3 Full temperature range, F>60HZ .2 .25 * * °C/W
RESISTANCE,DC,junction to case Full temperature range, F>60HZ .25 .31 * * °C/W
RESISTANCE, junction to air Full temperature range 12 * °C/W
TEMPERATURE RANGE, case Meets full range specification -25 85 * * °C
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±
±
±
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APEX MICROTECHNOLOGY CORPORATION • TELEPHONE (520) 690-8600 • FAX (520) 888-3329 • ORDERS (520) 690-8601 • EMAIL prodlit@apexmicrotech.com
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TYPICAL PERFORMANCE
GRAPHS PA52 • PA52A
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
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OPERATING
CONSIDERATIONS
PA52 • PA52A
GENERAL
Please read Application Note 1 "General Operating Con-
siderations" which covers stability, supplies, heat sinking,
mounting, current limit, SOA interpretation, and specification
interpretation. Visit www.apexmicrotech.com for design tools
that help automate tasks such as calculations for stability,
internal power dissipation, current limit; heat sink selection;
Apex’s complete Application Notes library; Technical Seminar
Workbook; and Evaluation Kits.
CURRENT LIMIT
There is no internal circuit provision for current limit in the
PA52. However, the PA52 circuit board in the PA52 evaluation
kit does provide a means whereby the output current can be
sensed. An external circuit current limit can thereby be imple-
mented if needed. See EK27 data sheet for more details.
BOOST OPERATION
With the VBOOST feature the small signal stages of the
amplifier are operated at higher supply voltages than the
amplifier’s high current output stage. +VBOOST (pin 11) and
–VBOOST (pin 12) are connected to the small signal circuitry of
the amplifier. +VS (pin 9,10) and –VS (pin 3,4) are connected to
the high current output stage. An additional 10V on the VBOOST
pins is sufficient to allow the small signal stages to drive the
output transistors into saturation and improve the output voltage
swing for extra efficient operation when required. When close
swings to the supply rails is not required the +VBOOST and +VS
pins must be strapped together as well as the –VBOOST and –VS
pins. The boost voltage pins must not be at a voltage lower
than the VS pins.
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.
PA52U REV D APRIL 2003 © 2003 Apex Microtechnology Corp.
COMPENSATION
Compensation is internally fixed for a gain of 3 or more and
is not adjustable by the user. The PA52 therefore is not unity
gain stable.
POWER SUPPLY BYPASSING
Proper and sufficient power supply bypassing is crucial to
proper operation of the PA52. Bypass the +Vb and -Vb supply
pins with a minimum .1µF ceramic capacitors directly at the
supply pins. On the +Vs and -Vs pins use a combination of
ceramic and electrolytic capacitors. Use 1µF ceramic capaci-
tors and an electrolytic capacitor at least 10µF for each amp
of output current required.
