Product Folder Sample & Buy Support & Community Tools & Software Technical Documents LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 LM431 Adjustable Precision Zener Shunt Regulator 1 Features 3 Description * * The LM431 is a 3-terminal adjustable shunt regulator with ensured temperature stability over the entire temperature range of operation. The output voltage may be set at any level greater than 2.5 V (VREF) up to 36 V merely by selecting two external resistors that act as a voltage divided network. Due to the sharp turnon characteristics this device is an excellent replacement for many Zener diode applications. 1 * * * * * Average Temperature Coefficient 50 ppm/C Temperature Compensated for Operation Over the Full Temperature Range Programmable Output Voltage Fast Turnon Response Low-Output Noise Low-Dynamic Output Impedance Available in Space-Saving SOIC-8, SOT-23, and TO-92 Packages 2 Applications * * * * * Adjustable Voltage or Current Linear and Switching Power Supplies Voltage Monitoring Current Source and Sink Circuits Circuits Requiring Precision References Zener Diode Replacements LM431 Symbol The LM431 is available in space-saving SOIC-8, SOT-23, and TO-92 packages. Device Information(1) PART NUMBER LM431 PACKAGE BODY SIZE (NOM) SOIC (8) 4.90 mm x 3.91 mm SOT-23 (3) 2.92 mm x 1.30 mm TO-92 (3) 4.30 mm x 4.30 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Functional Block Diagram 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 7 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Parameter Measurement Information .................. 7 Detailed Description ............................................ 10 8.1 Overview ................................................................. 10 8.2 Functional Block Diagram ...................................... 10 8.3 Feature Description................................................. 10 8.4 Device Functional Modes........................................ 11 9 Application and Implementation ........................ 12 9.1 Application Information............................................ 12 9.2 Typical Applications ................................................ 13 10 Power Supply Recommendations ..................... 19 11 Layout................................................................... 19 11.1 Layout Guidelines ................................................. 19 11.2 Layout Example .................................................... 19 12 Device and Documentation Support ................. 20 12.1 12.2 12.3 12.4 Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 20 20 20 20 13 Mechanical, Packaging, and Orderable Information ........................................................... 20 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision G (March 2013) to Revision H * Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 Changes from Revision F (April 2013) to Revision G * 2 Page Page Changed layout of National Data Sheet to TI format ........................................................................................................... 18 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 LM431 www.ti.com SNVS020H - MAY 2000 - REVISED JANUARY 2016 5 Pin Configuration and Functions D Package 8-Pin SOIC Top View DBZ Package 3-Pin SOT-23 Top View Note: NC = Not internally connected. LP Package 3-Pin TO-92 Top View Pin Functions PIN I/O DESCRIPTION NAME SOIC SOT-23 TO-92 Anode 2, 3, 6, 7 3 3 O Anode pin, normally grounded 1 1 1 I/O Shunt current/output voltage 4, 5 -- -- -- No connect 8 2 2 I Cathode NC Reference Reference pin for adjustable output voltage Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 3 LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN Cathode voltage MAX UNIT 37 V Reference voltage -0.5 Continuous cathode current -10 Reference input current 10 mA 0.78 W TO-92 package Internal power dissipation (3) (4) Operating temperature (2) (3) (4) mA SOIC package 0.81 W SOT-23 package 0.28 W Industrial (LM431xI) -40 85 C 0 70 C -65 150 C Commercial (LM431xC) Storage temperature (1) V 150 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. TJ Max = 150C. Ratings apply to ambient temperature at 25C. Above this temperature, derate the TO-92 at 6.2 mW/C, the SOIC at 6.5 mW/C, the SOT-23 at 2.2 mW/C. 6.2 ESD Ratings V(ESD) (1) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) VALUE UNIT 2500 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX Cathode voltage VREF 37 UNIT V Cathode current 1 100 mA 6.4 Thermal Information LM431 THERMAL METRIC (1) D (SOIC) DBZ (SOT-23) LP (TO-92) 8 PINS 3 PINS 3 PINS UNIT RJA Junction-to-ambient thermal resistance 126.9 267.7 162.4 C/W RJC(top) Junction-to-case (top) thermal resistance 72.2 138.3 85.8 C/W RJB Junction-to-board thermal resistance 67.5 61 -- C/W JT Junction-to-top characterization parameter 21.1 21.5 29.4 C/W JB Junction-to-board characterization parameter 67 60.1 141.5 C/W RJC(bot) Junction-to-case (bottom) thermal resistance -- -- -- C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 LM431 www.ti.com SNVS020H - MAY 2000 - REVISED JANUARY 2016 6.5 Electrical Characteristics TA = 25C unless otherwise specified PARAMETER VREF TEST CONDITIONS Reference voltage MIN TYP MAX VZ = VREF, II = 10 mA LM431A (Figure 6 ) 2.44 2.495 2.55 VZ = VREF, II = 10 mA LM431B (Figure 6 ) 2.47 2.495 2.52 VZ = VREF, II = 10 mA LM431C (Figure 6 ) 2.485 2.5 2.51 8 17 VZ from VREF to 10 V -1.4 -2.7 VZ from 10 V to 36 V -1 -2 UNIT V VDEV Deviation of reference input voltage overtemperature (1) VZ = VREF, II = 10 mA, TA = full range (Figure 6 ) VREF/ VZ Ratio of the change in reference voltage to the change in cathode voltage IZ = 10 mA (Figure 7 ) IREF Reference input current R1 = 10 k, R2 = , II = 10 mA (Figure 7 ) 2 4 A IREF Deviation of reference input current overtemperature R1 = 10 k, R2 = , II = 10 mA, TA = full range (Figure 7 ) 0.4 1.2 A IZ(MIN) Minimum cathode current for regulation VZ = VREF(Figure 6 ) 0.4 1 mA IZ(OFF) OFF-state current VZ = 36 V, VREF = 0 V (Figure 8) 0.3 1 A (1) mV mV/V Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature range. The average temperature coefficient of the reference input voltage, VREF, is defined as: Where: T2 - T1 = full temperature change (0-70C). VREF can be positive or negative depending on whether the slope is positive or negative. Example: VDEV = 8 mV, VREF = 2495 mV, T2 - T1 = 70C, slope is positive. Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 5 LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 www.ti.com Electrical Characteristics (continued) TA = 25C unless otherwise specified PARAMETER rZ (2) Dynamic output impedance TEST CONDITIONS (2) MIN TYP MAX VZ = VREF, LM431A, Frequency = 0 Hz (Figure 6 ) 0.75 VZ = VREF, LM431B, LM431C Frequency = 0 Hz (Figure 6 ) 0.5 UNIT The dynamic output impedance, rZ, is defined as: When the device is programmed with two external resistors, R1 and R2, (see Figure 7), the dynamic output impedance of the overall circuit, rZ, is defined as: 6 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 LM431 www.ti.com SNVS020H - MAY 2000 - REVISED JANUARY 2016 6.6 Typical Characteristics Figure 1. Dynamic Impedance vs Frequency Note: The areas under the curves represent conditions that may cause the device to oscillate. For curves B, C, and D, R2 and V+ were adjusted to establish the initial VZ and IZ conditions with CL = 0. V+ and CL were then adjusted to determine the ranges of stability. Figure 2. Stability Boundary Conditions 7 Parameter Measurement Information Figure 3. Test Circuit for Dynamic Impedance vs Frequency Curve Figure 4. Test Circuit for Curve A Above Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 7 LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 www.ti.com Parameter Measurement Information (continued) Figure 5. Test Circuit for Curves B, C and D Above Figure 6. Test Circuit for VZ = VREF Note: VZ = VREF (1 + R1/R2) + IREF x R1 Figure 7. Test Circuit for VZ > VREF 8 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 LM431 www.ti.com SNVS020H - MAY 2000 - REVISED JANUARY 2016 Parameter Measurement Information (continued) Figure 8. Test Circuit for OFF-State Current Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 9 LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 www.ti.com 8 Detailed Description 8.1 Overview The LM431 is an adjustable precision shunt voltage regulator with ensured temperature stability over the entire temperature range. The part has three different packages available to meet small footprint requirements, and is available in three different tolerance grades. 8.2 Functional Block Diagram Figure 9. LM431 Symbol Figure 10. LM431 Block Diagram 8.3 Feature Description The LM431 is a precision Zener diode. The part requires a small quiescent current for regulation, and regulates the output voltage by shunting more or less current to ground, depending on input voltage and load. The only external component requirement is a resistor between the cathode and the input voltage to set the input current. An external capacitor can be used on the input or output, but is not required. 10 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 LM431 www.ti.com SNVS020H - MAY 2000 - REVISED JANUARY 2016 Feature Description (continued) Figure 11. Equivalent Circuit 8.4 Device Functional Modes The LM431 is most commonly operated in closed-loop mode, where the reference node is tied to the output voltage via a resistor divider. The output voltage remains in regulation as long as Iz is between 1 mA and 100 mA. The part can also be used in open-loop mode to act as a comparator, driving the feedback node from another voltage source. Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 11 LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers must validate and test their design implementation to confirm system functionality. 9.1 Application Information The LM431 is an adjustable precision shunt voltage regulator with ensured temperature stability over the entire temperature range. For space critical applications, the LM431 is available in space saving SOIC-8, SOT-23 and TO-92 packages. The minimum operating current is 1 mA while the maximum operating current is 100 mA. The typical thermal hysteresis specification is defined as the change in 25C voltage measured after thermal cycling. The device is thermal cycled to temperature 0C and then measured at 25C. Next the device is thermal cycled to temperature 70C and again measured at 25C. The resulting VOUT delta shift between the 25C measurements is thermal hysteresis. Thermal hysteresis is common in precision references and is induced by thermal-mechanical package stress. Changes in environmental storage temperature, operating temperature and board mounting temperature are all factors that can contribute to thermal hysteresis. In a conventional shunt regulator application (Figure 12), an external series resistor (RS) is connected between the supply voltage and the LM431 cathode pin. RS determines the current that flows through the load (ILOAD) and the LM431 (IZ). Since load current and supply voltage may vary, RS must be small enough to supply at least the minimum acceptable IZ to the LM431 even when the supply voltage is at its minimum and the load current is at its maximum value. When the supply voltage is at its maximum and ILOAD is at its minimum, RS must be large enough so that the current flowing through the LM431 is less than 100 mA. RS must be selected based on the supply voltage, (V+), the desired load and operating current, (ILOAD and IZ), and the output voltage, see Equation 1. V - VO RS = + ILOAD + IZ (1) The LM431 output voltage can be adjusted to any value in the range of 2.5 V through 37 V. It is a function of the internal reference voltage (VREF) and the ratio of the external feedback resistors as shown in Figure 12. The output voltage is found using Equation 2. VO = VREF * (1 + R1/R2) where * VO is the output voltage (also, cathode voltage, VZ). The actual value of the internal VREF is a function of VZ. (2) The corrected VREF is determined by Equation 3: VREF = VZ * (VREF/VZ) + VY where * * 12 VY = 2.5 V and VZ = (VZ- VY) VREF/VZ is found in the Electrical Characteristics and is typically -1.4 mV/V for VZ raging from VREF to 10 V and -1 mV/V for VZ raging from 10 V to 36 V. (3) Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 LM431 www.ti.com SNVS020H - MAY 2000 - REVISED JANUARY 2016 9.2 Typical Applications 9.2.1 Shunt Regulator Figure 12. Shunt Regulator 9.2.1.1 Design Requirements Design a shunt regulator with the following requirements: * V+ > VO * VO = 5 V Select RS (a resistor between V+ and VO) such that: 1 mA < IZ < 100 mA 9.2.1.2 Detailed Design Procedure The resistor RS must be selected such that current IZ remains in the operational region of the part for the entire V+ range and load current range. The two extremes to consider are V+ at its minimum, and the load at its maximum, where RS must be small enough for IZ to remain above 1 mA. The other extreme is V+ at its maximum, and the load at its minimum, where RS must be large enough to maintain IZ < 100 mA. If unsure, try using 1 mA IR 10 mA as a starting point; just remember the value of IZ varies with input voltage and load. Use Equation 4 and Equation 5 to set RS between RS_MIN and RS_MAX. V+ _ MAX - VO RS _ MIN = ILOAD _ MIN + IZ _ MAX RS _ MAX = (4) V+ _ MIN - VO ILOAD _ MAX + IZ _ MIN (5) Set feedback resistors R1 and R2 for a resistor divider based on Equation 2 and reproduced in Equation 6 VO = VREF * (1 + R1/R2) (6) So, for a 5-V output voltage, VO, and VREF of 2.5 V, simple calculation yields R1/R2 = 1. Based on this, select R1 = 1 k and R2 = 1 k. Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 13 LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 www.ti.com Typical Applications (continued) 9.2.1.3 Application Curves Figure 14. Thermal Information Figure 13. Input Current vs VZ Figure 15. Input Current vs VZ 9.2.2 Other Applications Figure 16. Single Supply Comparator With Temperature Compensated Threshold 14 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 LM431 www.ti.com SNVS020H - MAY 2000 - REVISED JANUARY 2016 Typical Applications (continued) Figure 17. Series Regulator Figure 18. Output Control of a Three Terminal Fixed Regulator Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 15 LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 www.ti.com Typical Applications (continued) Figure 19. Higher Current Shunt Regulator Figure 20. Crow Bar 16 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 LM431 www.ti.com SNVS020H - MAY 2000 - REVISED JANUARY 2016 Typical Applications (continued) Figure 21. Over Voltage and Under Voltage Protection Circuit Figure 22. Voltage Monitor Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 17 LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 www.ti.com Typical Applications (continued) Figure 23. Delay Timer Figure 24. Current Limiter or Current Source Figure 25. Constant Current Sink 18 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 LM431 www.ti.com SNVS020H - MAY 2000 - REVISED JANUARY 2016 10 Power Supply Recommendations While a bypass capacitor is not required on the input voltage line, TI recommends reducing noise on the input which could affect the output. TI recommends a 0.1-F ceramic capacitor or larger. 11 Layout 11.1 Layout Guidelines Place external components as close to the device as possible. Place RS close to the cathode, as well as the input bypass capacitor, if used. Keep feedback resistor close the device whenever possible. 11.2 Layout Example RS physically close to device cathode CIN physically close to device COUT physically close to device Figure 26. LM431 Layout Recommendation Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 19 LM431 SNVS020H - MAY 2000 - REVISED JANUARY 2016 www.ti.com 12 Device and Documentation Support 12.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2ETM Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.2 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.4 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 20 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM431 PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM431ACM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 LM431 ACM LM431ACM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 N1F LM431ACM3X NRND SOT-23 DBZ 3 3000 TBD Call TI Call TI 0 to 70 N1F LM431ACM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 N1F LM431ACMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 LM431 ACM LM431ACZ/LFT3 ACTIVE TO-92 LP 3 2000 Green (RoHS & no Sb/Br) SN N / A for Pkg Type LM431 ACZ LM431ACZ/LFT4 ACTIVE TO-92 LP 3 2000 Green (RoHS & no Sb/Br) SN N / A for Pkg Type LM431 ACZ LM431ACZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS & no Sb/Br) SN N / A for Pkg Type 0 to 70 LM431 ACZ LM431AIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM431 AIM LM431AIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM431 AIM LM431AIM3 NRND SOT-23 DBZ 3 1000 TBD Call TI Call TI -40 to 85 N1E LM431AIM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 N1E LM431AIM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 N1E LM431AIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM431 AIM LM431AIZ/LFT1 ACTIVE TO-92 LP 3 2000 Green (RoHS & no Sb/Br) SN N / A for Pkg Type LM431AIZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS & no Sb/Br) SN N / A for Pkg Type -40 to 85 LM431BCM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 431 BCM LM431BCM3 NRND SOT-23 DBZ 3 1000 TBD Call TI Call TI 0 to 70 N1D Addendum-Page 1 LM431 AIZ LM431 AIZ Samples PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM431BCM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 N1D LM431BCM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 N1D LM431BCMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 431 BCM LM431BCZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS & no Sb/Br) SN N / A for Pkg Type 0 to 70 LM431 BCZ LM431BIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 431 BIM LM431BIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 431 BIM LM431BIM3 NRND SOT-23 DBZ 3 1000 TBD Call TI Call TI -40 to 85 N1C LM431BIM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 N1C LM431BIM3X NRND SOT-23 DBZ 3 3000 TBD Call TI Call TI -40 to 85 N1C LM431BIM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 N1C LM431BIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 431 BIM LM431CCM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 431 CCM LM431CCM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 N1B LM431CCM3X NRND SOT-23 DBZ 3 3000 TBD Call TI Call TI 0 to 70 N1B LM431CCM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 N1B LM431CCZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS & no Sb/Br) SN N / A for Pkg Type 0 to 70 LM431 CCZ LM431CIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 431 CIM LM431CIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 431 CIM LM431CIM3 NRND SOT-23 DBZ 3 1000 TBD Call TI Call TI -40 to 85 N1A LM431CIM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 N1A Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM431CIM3X NRND SOT-23 DBZ 3 3000 TBD Call TI Call TI -40 to 85 N1A LM431CIM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 N1A LM431CIZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS & no Sb/Br) SN N / A for Pkg Type -40 to 85 LM431 CIZ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. 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Addendum-Page 3 Samples PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LM431ACM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.3 2.9 1.22 4.0 8.0 Q3 LM431ACM3X SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431ACM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431ACMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM431AIM3 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431AIM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431AIM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM431BCM3 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431BCM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431BCM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431BCMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM431BIM3 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431BIM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431BIM3X SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431BIM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431BIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM431CCM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM431CCM3X SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431CCM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431CIM3 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431CIM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431CIM3X SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 LM431CIM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM431ACM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0 LM431ACM3X SOT-23 DBZ 3 3000 210.0 185.0 35.0 LM431ACM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0 LM431ACMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM431AIM3 SOT-23 DBZ 3 1000 210.0 185.0 35.0 LM431AIM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0 LM431AIM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0 LM431AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM431BCM3 SOT-23 DBZ 3 1000 210.0 185.0 35.0 LM431BCM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0 LM431BCM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM431BCMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM431BIM3 SOT-23 DBZ 3 1000 210.0 185.0 35.0 LM431BIM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0 LM431BIM3X SOT-23 DBZ 3 3000 210.0 185.0 35.0 LM431BIM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0 LM431BIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM431CCM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0 LM431CCM3X SOT-23 DBZ 3 3000 210.0 185.0 35.0 LM431CCM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0 LM431CIM3 SOT-23 DBZ 3 1000 210.0 185.0 35.0 LM431CIM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0 LM431CIM3X SOT-23 DBZ 3 3000 210.0 185.0 35.0 LM431CIM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0 Pack Materials-Page 3 4203227/C PACKAGE OUTLINE DBZ0003A SOT-23 - 1.12 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 2.64 2.10 1.4 1.2 PIN 1 INDEX AREA 1.12 MAX B A 0.1 C 1 0.95 3.04 2.80 1.9 3X 3 0.5 0.3 0.2 2 (0.95) C A B 0.25 GAGE PLANE 0 -8 TYP 0.10 TYP 0.01 0.20 TYP 0.08 0.6 TYP 0.2 SEATING PLANE 4214838/C 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration TO-236, except minimum foot length. www.ti.com EXAMPLE BOARD LAYOUT DBZ0003A SOT-23 - 1.12 mm max height SMALL OUTLINE TRANSISTOR PKG 3X (1.3) 1 3X (0.6) SYMM 3 2X (0.95) 2 (R0.05) TYP (2.1) LAND PATTERN EXAMPLE SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK 0.07 MIN ALL AROUND 0.07 MAX ALL AROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214838/C 04/2017 NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBZ0003A SOT-23 - 1.12 mm max height SMALL OUTLINE TRANSISTOR PKG 3X (1.3) 1 3X (0.6) SYMM 3 2X(0.95) 2 (R0.05) TYP (2.1) SOLDER PASTE EXAMPLE BASED ON 0.125 THICK STENCIL SCALE:15X 4214838/C 04/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] A .004 [0.1] C PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .150 [3.81] .189-.197 [4.81-5.00] NOTE 3 4X (0 -15 ) 4 5 B 8X .012-.020 [0.31-0.51] .010 [0.25] C A B .150-.157 [3.81-3.98] NOTE 4 .069 MAX [1.75] .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 [0.11-0.25] 0 -8 .016-.050 [0.41-1.27] DETAIL A (.041) [1.04] TYPICAL 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X METAL SOLDER MASK OPENING EXPOSED METAL .0028 MAX [0.07] ALL AROUND SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL .0028 MIN [0.07] ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com PACKAGE OUTLINE LP0003A TO-92 - 5.34 mm max height SCALE 1.200 SCALE 1.200 TO-92 5.21 4.44 EJECTOR PIN OPTIONAL 5.34 4.32 (1.5) TYP SEATING PLANE (2.54) NOTE 3 2X 4 MAX (0.51) TYP 6X 0.076 MAX SEATING PLANE 2X 2.6 0.2 3X 12.7 MIN 3X 3X 0.55 0.38 0.43 0.35 2X 1.27 0.13 FORMED LEAD OPTION STRAIGHT LEAD OPTION OTHER DIMENSIONS IDENTICAL TO STRAIGHT LEAD OPTION 3X 2.67 2.03 4.19 3.17 3 2 1 3.43 MIN 4215214/B 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Lead dimensions are not controlled within this area. 4. Reference JEDEC TO-226, variation AA. 5. Shipping method: a. Straight lead option available in bulk pack only. b. Formed lead option available in tape and reel or ammo pack. c. Specific products can be offered in limited combinations of shipping medium and lead options. d. Consult product folder for more information on available options. www.ti.com EXAMPLE BOARD LAYOUT LP0003A TO-92 - 5.34 mm max height TO-92 0.05 MAX ALL AROUND TYP FULL R TYP METAL TYP (1.07) 3X ( 0.85) HOLE 2X METAL (1.5) 2X (1.5) 2 1 (R0.05) TYP 3 2X (1.07) (1.27) SOLDER MASK OPENING 2X SOLDER MASK OPENING (2.54) LAND PATTERN EXAMPLE STRAIGHT LEAD OPTION NON-SOLDER MASK DEFINED SCALE:15X 0.05 MAX ALL AROUND TYP ( 1.4) 2X ( 1.4) METAL 3X ( 0.9) HOLE METAL (R0.05) TYP 2 1 (2.6) SOLDER MASK OPENING 3 2X SOLDER MASK OPENING (5.2) LAND PATTERN EXAMPLE FORMED LEAD OPTION NON-SOLDER MASK DEFINED SCALE:15X 4215214/B 04/2017 www.ti.com TAPE SPECIFICATIONS LP0003A TO-92 - 5.34 mm max height TO-92 13.7 11.7 32 23 (2.5) TYP 0.5 MIN 16.5 15.5 11.0 8.5 9.75 8.50 19.0 17.5 6.75 5.95 2.9 TYP 2.4 3.7-4.3 TYP 13.0 12.4 FOR FORMED LEAD OPTION PACKAGE 4215214/B 04/2017 www.ti.com IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES "AS IS" AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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