1
MRF1517T1MOTOROLA RF DEVICE DATA
The RF MOSFET Line
RF Power Field Effect Transistor
N–Channel Enhancement–Mode Lateral MOSFETs
The MRF1517T1 is designed for broadband commercial and industrial
applications at frequencies to 520 MHz. The high gain and broadband
performance of this device makes it ideal for large–signal, common source
amplifier applications in 7.5 volt portable FM equipment.
•Specified Performance @ 520 MHz, 7.5 Volts
Output Power — 8 Watts
Power Gain — 11 dB
Efficiency — 55%
•Characterized with Series Equivalent Large–Signal
Impedance Parameters
•Excellent Thermal Stability
•Capable of Handling 20:1 VSWR, @ 9.5 Vdc,
520 MHz, 2 dB Overdrive
•Broadband UHF/VHF Demonstration Amplifier
Information Available Upon Request
•RF Power Plastic Surface Mount Package
•Available in Tape and Reel.
T1 Suffix = 1,000 Units per 12 mm, 7 Inch Reel.
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain–Source Voltage (1) VDSS 25 Vdc
Gate–Source Voltage VGS ±20 Vdc
Drain Current — Continuous ID4 Adc
Total Device Dissipation @ TC = 25°C (2)
Derate above 25°CPD62.5
0.50 Watts
W/°C
Storage Temperature Range Tstg –65 to +150 °C
Operating Junction Temperature TJ150 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance, Junction to Case RθJC 2°C/W
(1) Not designed for 12.5 volt applications.
(2) Calculated based on the formula PD =
NOTE – CAUTION – MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
Order this document
by MRF1517/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MRF1517T1
520 MHz, 8 W, 7.5 V
LATERAL N–CHANNEL
BROADBAND
RF POWER MOSFET
CASE 466–02, STYLE 1
(PLD–1.5)
PLASTIC
Motorola, Inc. 2000
G
D
S
TJ–TC
RθJC
REV 1
MRF1517T1
2MOTOROLA RF DEVICE DATA
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
(VDS = 35 Vdc, VGS = 0) IDSS — — 1 µAdc
Gate–Source Leakage Current
(VGS = 10 Vdc, VDS = 0) IGSS — — 1 µAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = 7.5 Vdc, ID = 120 µAdc) VGS(th) 1.0 1.7 2.1 Vdc
Drain–Source On–V oltage
(VGS = 10 Vdc, ID = 1 Adc) VDS(on) — 0.5 — Vdc
Forward T ransconductance
(VDS = 10 Vdc, ID = 2 Adc) gfs 0.9 — — S
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz) Ciss — 66 — pF
Output Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz) Coss — 38 — pF
Reverse T ransfer Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz) Crss — 6 — pF
FUNCTIONAL TESTS (In Motorola Test Fixture)
Common–Source Amplifier Power Gain
(VDD = 7.5 Vdc, Pout = 8 W atts, I DQ = 150 mA, f = 520 MHz) Gps 10 11 — dB
Drain Efficiency
(VDD = 7.5 Vdc, Pout = 8 W atts, I DQ = 150 mA, f = 520 MHz) η50 55 — %
3
MRF1517T1MOTOROLA RF DEVICE DATA
Figure 1. 480 – 520 MHz Broadband Test Circuit
VDD
C7 R3
C8
C6
R2
RF
INPUT
RF
OUTPUT
Z2 Z3
Z6
C1 C3
C14
DUT
Z7 Z9 Z10
Z4 Z5
L1
Z8 N2
C18
B2
N1
+
C13
C4
C12
B1, B2 Short Ferrite Bead, Fair Rite Products
(2743021446)
C1 300 pF, 100 mil Chip Capacitor
C2, C3, C4, C10,
C12, C13 0 to 20 pF, Trimmer Capacitor
C5, C11 43 pF, 100 mil Chip Capacitor
C6, C18 120 pF, 100 mil Chip Capacitor
C7, C15 10 µF, 50 V Electrolytic Capacitor
C8, C16 0.1 µF, 100 mil Chip Capacitor
C9, C17 1,000 pF, 100 mil Chip Capacitor
C14 330 pF, 100 mil Chip Capacitor
L1 55.5 nH, 5 T urn, Coilcraft
N1, N2 Type N Flange Mount
R1 15 Ω, 0805 Chip Resistor
R2 1.0 kΩ, 1/8 W Resistor
R3 33 kΩ, 1/2 W Resistor
Z1 0.315″ x 0.080″ Microstrip
Z2 1.415″ x 0.080″ Microstrip
Z3 0.322″ x 0.080″ Microstrip
Z4 0.022″ x 0.080″ Microstrip
Z5, Z6 0.260″ x 0.223″ Microstrip
Z7 0.050″ x 0.080″ Microstrip
Z8 0.625″ x 0.080″ Microstrip
Z9 0.800″ x 0.080″ Microstrip
Z10 0.589″ x 0.080″ Microstrip
Board Glass Teflon, 31 mils, 2 oz. Copper
Z1
C2
VGG
C15
+
C9 B1
R1
C16C17
C5
C11
C10
TYPICAL CHARACTERISTICS, 480 – 520 MHz
Pout, OUTPUT POWER (WATTS)
IRL, INPUT RETURN LOSS (dB)
–5
–15
–25
–10
2
0
101
Figure 2. Output Power versus Input Power
Pin, INPUT POWER (W ATTS)
2
Figure 3. Input Return Loss versus
Output Power
Pout, OUTPUT POWER (WATTS)
0
6
0.80.2
4
0.6 1.00.4
03
10
8
520 MHz
500 MHz
480 MHz
546879
–20
520 MHz
500 MHz
480 MHz
VDD = 7.5 Vdc VDD = 7.5 Vdc
MRF1517T1
4MOTOROLA RF DEVICE DATA
TYPICAL CHARACTERISTICS, 480 – 520 MHz
Pin = 27 dBm
VDD = 7.5 Vdc
2Pout, OUTPUT POWER (WATTS)
50
10
80
14
Eff, DRAIN EFFICIENCY (%)
30
60
40
35
Eff, DRAIN EFFICIENCY (%)
Figure 4. Gain versus Output Power
Pout, OUTPUT POWER (WATTS)
8
6
14
Figure 5. Drain Efficiency versus Output Power
2
GAIN
(d
B)
Figure 6. Output Power versus Biasing Current
12
IDQ, BIASING CURRENT (mA)
0
Figure 7. Drain Efficiency versus Biasing Current
80
IDQ, BIASING CURRENT (mA)
Figure 8. Output Power versus Supply Voltage
5VDD, SUPPLY VOLTAGE (VOLTS)
0
Figure 9. Drain Efficiency versus Supply Voltage
VDD, SUPPLY VOLTAGE (VOLTS)
30 9
85
0
40
60
60
30 4000
4
12
600 1000
80
2
4
6
10
18
200
50
12
Pout
,
OUTPUT
PO
WE
R
(W
ATTS)
200 1000400 600
Pout
,
OUTPUT
PO
WE
R
(W
ATTS)
69107678 10
31
2
6
Eff, DRAIN EFFICIENCY (%)
50
70
500 MHz
520 MHz
480 MHz
56479108
16
68791011
70
20
500 MHz
520 MHz
480 MHz
800
8
500 MHz
520 MHz 480 MHz
800
70
500 MHz
520 MHz
480 MHz
10
8500 MHz
520 MHz
480 MHz
500 MHz
520 MHz
480 MHz
10
40
VDD = 7.5 Vdc VDD = 7.5 Vdc
Pin = 27 dBm
VDD = 7.5 Vdc
Pin = 27 dBm
IDQ = 150 mA Pin = 27 dBm
IDQ = 150 mA
5
MRF1517T1MOTOROLA RF DEVICE DATA
Figure 10. 400 – 440 MHz Broadband Test Circuit
VDD
C6 R3C7
C5
R2
RF
INPUT
RF
OUTPUT
Z2 Z3
Z5
C1 C3
C13
DUT
Z6 Z8 Z9
Z4
L1
Z7 N2
C17
B2
N1
+
C12
C4
C11
B1, B2 Short Ferrite Bead, Fair Rite Products
(2743021446)
C1, C13 300 pF, 100 mil Chip Capacitor
C2, C3, C4, C10,
C11, C12 0 to 20 pF, Trimmer Capacitor
C5, C17 130 pF, 100 mil Chip Capacitor
C6, C14 10 µF, 50 V Electrolytic Capacitor
C7, C15 0.1 µF, 100 mil Chip Capacitor
C8, C16 1,000 pF, 100 mil Chip Capacitor
C9 33 pF, 100 mil Chip Capacitor
L1 55.5 nH, 5 T urn, Coilcraft
N1, N2 Type N Flange Mount
R1 12 Ω, 0805 Chip Resistor
R2 1.0 kΩ, 1/8 W Resistor
R3 33 kΩ, 1/2 W Resistor
Z1 0.617″ x 0.080″ Microstrip
Z2 0.723″ x 0.080″ Microstrip
Z3 0.513″ x 0.080″ Microstrip
Z4, Z5 0.260″ x 0.223″ Microstrip
Z6 0.048″ x 0.080″ Microstrip
Z7 0.577″ x 0.080″ Microstrip
Z8 1.135″ x 0.080″ Microstrip
Z9 0.076″ x 0.080″ Microstrip
Board Glass Teflon, 31 mils, 2 oz. Copper
Z1
C2
VGG
C14
+
C8 B1
R1
C15C16
C9
C10
TYPICAL CHARACTERISTICS, 400 – 440 MHz
Pout, OUTPUT POWER (WATTS)
IRL, INPUT RETURN LOSS (dB)
–5
–15
–25
–10
21
0
45
Figure 11. Output Power versus Input Power
Pin, INPUT POWER (W ATTS)
2
Figure 12. Input Return Loss versus Output Power
Pout, OUTPUT POWER (WATTS)
0
6
0.40.1
4
440 MHz
0.3 0.50.2
0
10
400 MHz
3
9
7
689710
–20
400 MHz
420 MHz
440 MHz
1
3
5
8420 MHz
VDD = 7.5 Vdc VDD = 7.5 Vdc
MRF1517T1
6MOTOROLA RF DEVICE DATA
TYPICAL CHARACTERISTICS, 400 – 440 MHz
2Pout, OUTPUT POWER (WATTS)
50
20
70
14
Eff, DRAIN EFFICIENCY (%)
30
60
40
35
Eff, DRAIN EFFICIENCY (%)
Figure 13. Gain versus Output Power
Pout, OUTPUT POWER (WATTS)
7
5
13
Figure 14. Drain Efficiency versus Output Power
2
GAIN (dB)
1
Figure 15. Output Power versus Biasing Current
12
IDQ, BIASING CURRENT (mA)
0
Figure 16. Drain Efficiency versus Biasing Current
80
IDQ, BIASING CURRENT (mA)
Figure 17. Output Power versus Supply Voltage
5VDD, SUPPLY VOLTAGE (VOLTS)
0
Figure 18. Drain Efficiency versus Supply Voltage
VDD, SUPPLY VOLTAGE (VOLTS) 9
85
0
40
60
60
30 4000
6
12
600 1000
80
4
9
17
200
50
11
Pout, OUTPUT POWER (WATTS)
200 1000400 600
Pout, OUTPUT POWER (WATTS)
69107678 10
35
2
4
8
Eff, DRAIN EFFICIENCY (%)
50
70
30
4679810
15
68791011
0
10
800
6
10
8
800
70
10
400 MHz 440 MHz
420 MHz
400 MHz
440 MHz
420 MHz
400 MHz
440 MHz420 MHz
400 MHz
440 MHz
420 MHz
400 MHz
440 MHz
420 MHz
400 MHz
440 MHz
420 MHz
240
Pin = 25.5 dBm
VDD = 7.5 Vdc
VDD = 7.5 Vdc VDD = 7.5 Vdc
Pin = 25.5 dBm
IDQ = 150 mA
Pin = 25.5 dBm
VDD = 7.5 Vdc
Pin = 25.5 dBm
IDQ = 150 mA
7
MRF1517T1MOTOROLA RF DEVICE DATA
Figure 19. 440 – 480 MHz Broadband Test Circuit
VDD
C6 R3
C7
C5
R2
RF
INPUT
RF
OUTPUT
Z2 Z3
Z5
C1 C3
C13
DUT
Z6 Z8 Z9
Z4
L1
Z7 N2
C17
B2
N1
+
C12
C4
C11
B1, B2 Short Ferrite Bead, Fair Rite Products
(2743021446)
C1 240 pF, 100 mil Chip Capacitor
C2, C3, C4, C10,
C11, C12 0 to 20 pF, Trimmer Capacitor
C5, C17 130 pF, 100 mil Chip Capacitor
C6, C14 10 mF, 50 V Electrolytic Capacitor
C7, C15 0.1 mF, 100 mil Chip Capacitor
C8, C16 1,000 pF, 100 mil Chip Capacitor
C9 39 pF, 100 mil Chip Capacitor
C13 330 pF, 100 mil Chip Capacitor
L1 55.5 nH, 5 T urn, Coilcraft
N1, N2 Type N Flange Mount
R1 15 Ω, 0805 Chip Resistor
R2 1.0 kΩ, 1/8 W Resistor
R3 33 kΩ, 1/2 W Resistor
Z1 0.471″ x 0.080″ Microstrip
Z2 1.082″ x 0.080″ Microstrip
Z3 0.372″ x 0.080″ Microstrip
Z4, Z5 0.260″ x 0.223″ Microstrip
Z6 0.050″ x 0.080″ Microstrip
Z7 0.551″ x 0.080″ Microstrip
Z8 0.825″ x 0.080″ Microstrip
Z9 0.489″ x 0.080″ Microstrip
Board Glass Teflon, 31 mils, 2 oz. Copper
Z1
C2
VGG
C14
+
C8 B1
R1
C15C16
C9
C10
TYPICAL CHARACTERISTICS, 440 – 480 MHz
Pout, OUTPUT POWER (WATTS)
IRL, INPUT RETURN LOSS (dB)
–5
–15
–20
–10
21
0
5
Figure 20. Output Power versus Input Power
Pin, INPUT POWER (W ATTS)
2
Figure 21. Input Return Loss versus Output Power
0.4
Pout, OUTPUT POWER (WATTS)
0.0
7
0.6
4480 MHz
440 MHz
0.80.2
0
10
460 MHz
3
–25
9
46 978 10
480 MHz
440 MHz
460 MHz
1
6
3
8
5
VDD = 7.5 Vdc VDD = 7.5 Vdc
MRF1517T1
8MOTOROLA RF DEVICE DATA
TYPICAL CHARACTERISTICS, 440 – 480 MHz
2Pout, OUTPUT POWER (WATTS)
50
0
70
14
Eff, DRAIN EFFICIENCY (%)
30
60
40
35
Eff, DRAIN EFFICIENCY (%)
Figure 22. Gain versus Output Power
Pout, OUTPUT POWER (WATTS)
7
5
13
Figure 23. Drain Efficiency versus Output Power
2
GAIN (dB)
1
Figure 24. Output Power versus Biasing Current
12
IDQ, BIASING CURRENT (mA)
0
Figure 25. Drain Efficiency versus Biasing Current
80
IDQ, BIASING CURRENT (mA)
Figure 26. Output Power versus Supply Voltage
5VDD, SUPPLY VOLTAGE (VOLTS)
0
Figure 27. Drain Efficiency versus Supply Voltage
VDD, SUPPLY VOLTAGE (VOLTS) 9
85
0
40
60
30 4000
8
12
600 1000
80
2
4
6
9
17
200
50
4
11
Pout, OUTPUT POWER (WATTS)
200 1000400 600
Pout, OUTPUT POWER (WATTS)
69107678 10
35
70
60
2
Eff, DRAIN EFFICIENCY (%)
50
70
30
20
10
687910
15
68791011
800
8
10
800
6
10
480 MHz
440 MHz
460 MHz 480 MHz
440 MHz
460 MHz
480 MHz
440 MHz
460 MHz
480 MHz
440 MHz
460 MHz
480 MHz
440 MHz
460 MHz
480 MHz
440 MHz
460 MHz
40
4
Pin = 27.5 dBm
VDD = 7.5 Vdc VDD = 7.5 Vdc
Pin = 27.5 dBm
Pin = 27.5 dBm Pin = 27.5 dBm
9
MRF1517T1MOTOROLA RF DEVICE DATA
Zin = Complex conjugate of source
impedance.
ZOL* = Complex conjugate of the load
impedance at given output
power, voltage, frequency,
and ηD > 50 %.
Note: ZOL* was chosen based on tradeoffs between gain, drain efficiency , and device stability.
Figure 28. Series Equivalent Input and Output Impedance
Zin = Complex conjugate of source
impedance.
ZOL* = Complex conjugate of the load
impedance at given output
power, voltage, frequency,
and ηD > 50 %.
f
MHz Zin
ΩZOL*
Ω
440 1.62 +j3.41 3.25 +j0.98
Zin = Complex conjugate of source
impedance.
ZOL* = Complex conjugate of the load
impedance at given output
power, voltage, frequency,
and ηD > 50 %.
VDD = 7.5 V, IDQ = 150 mA, Pout = 8 W
460 1.85 +j3.35 3.05 +j0.93
480 1.91 +j3.31 2.54 +j0.84
f
MHz Zin
ΩZOL*
Ω
480 1.06 +j1.82 3.51 +j0.99
VDD = 7.5 V, IDQ = 150 mA, Pout = 8 W
500 0.97 +j2.01 2.82 +j0.75
520 0.975 +j2.37 1.87 +j1.03
f
MHz Zin
ΩZOL*
Ω
400 1.96 +j3.32 2.52 +j0.39
420 2.31 +j3.56 2.61 +j0.64
440 1.60 +j3.45 2.37 +j1.04
520
Zo = 10 Ω
Zin
f = 480 MHz
400
Zo = 10 Ω
Zin
f = 440 MHz
ZOL*
480
Zo = 10 Ω
Zin
f = 440 MHz
ZOL*
ZOL*
f = 440 MHz
400
VDD = 7.5 V, IDQ = 150 mA, Pout = 8 W
440
f = 480 MHz
f = 480 MHz
520
Zin ZOL*
Input
Matching
Network
Device
Under Test Output
Matching
Network
MRF1517T1
10 MOTOROLA RF DEVICE DATA
Table 1. Common Source Scattering Parameters (VDD = 7.5 Vdc)
IDQ = 150 mA
f
MH
S11 S21 S12 S22
MHz |S11|φ|S21|φ|S12|φ|S22|φ
50 0.84 –152 17.66 97 0.016 0 0.77 –167
100 0.84 –164 8.86 85 0.016 5 0.78 –172
200 0.86 –170 4.17 72 0.015 –5 0.79 –173
300 0.88 –171 2.54 62 0.014 –8 0.80 –172
400 0.90 –172 1.72 55 0.013 –25 0.83 –172
500 0.92 –172 1.28 50 0.013 –10 0.84 –172
600 0.94 –173 0.98 46 0.014 –22 0.86 –171
700 0.95 –173 0.76 41 0.010 –30 0.86 –172
800 0.96 –174 0.61 38 0.011 –14 0.86 –171
900 0.96 –175 0.50 33 0.011 –31 0.85 –172
1000 0.97 –175 0.40 31 0.006 55 0.88 –171
IDQ = 800 mA
f
MH
S11 S21 S12 S22
MHz |S11|φ|S21|φ|S12|φ|S22|φ
50 0.90 –165 20.42 94 0.018 1 0.76 –164
100 0.89 –172 10.20 87 0.015 –7 0.77 –170
200 0.90 –175 4.96 79 0.015 –12 0.77 –172
300 0.90 –176 3.17 73 0.017 –2 0.80 –171
400 0.91 –176 2.26 67 0.013 1 0.82 –172
500 0.92 –176 1.75 63 0.011 –6 0.83 –171
600 0.93 –176 1.39 59 0.012 –31 0.85 –171
700 0.94 –176 1.14 55 0.015 –34 0.88 –171
800 0.94 –176 0.93 51 0.008 –22 0.87 –171
900 0.95 –177 0.78 45 0.007 2 0.87 –172
1000 0.96 –177 0.65 43 0.008 –40 0.90 –170
IDQ = 1.5 A
f
MH
S11 S21 S12 S22
MHz |S11|φ|S21|φ|S12|φ|S22|φ
50 0.92 –165 19.90 95 0.017 3 0.76 –164
100 0.90 –172 9.93 88 0.018 2 0.77 –170
200 0.91 –176 4.84 80 0.016 –4 0.77 –172
300 0.91 –176 3.10 74 0.014 –11 0.80 –172
400 0.92 –176 2.22 68 0.014 –14 0.81 –172
500 0.93 –176 1.73 64 0.016 –8 0.83 –171
600 0.94 –176 1.39 61 0.013 –24 0.85 –171
700 0.94 –176 1.12 56 0.013 –24 0.87 –171
800 0.95 –176 0.93 52 0.009 –12 0.87 –171
900 0.96 –177 0.78 46 0.008 10 0.87 –173
1000 0.97 –177 0.64 44 0.012 4 0.89 –169
11
MRF1517T1MOTOROLA RF DEVICE DATA
APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS
This device is a common–source, RF power, N–Channel
enhancement mode, Lateral Metal–Oxide Semiconductor
Field–Effect T ransistor (MOSFET). Motorola Application Note
AN21 1A, “FETs in Theory and Practice”, is suggested reading
for those not familiar with the construction and characteristics
of FETs.
This surface mount packaged device was designed primari-
ly for VHF and UHF portable power amplifier applications.
Manufacturability is improved by utilizing the tape and reel
capability for fully automated pick and placement of parts.
However, care should be taken in the design process to insure
proper heat sinking of the device.
The major advantages of Lateral RF power MOSFETs
include high gain, simple bias systems, relative immunity from
thermal runaway, and the ability to withstand severely
mismatched loads without suffering damage.
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between all three terminals. The metal oxide gate structure
determines the capacitors from gate–to–drain (Cgd), and
gate–to–source (Cgs). The PN junction formed during fabrica-
tion of the RF MOSFET results in a junction capacitance from
drain–to–source (Cds). These capacitances are characterized
as input (Ciss), output (Coss) and reverse transfer (Crss)
capacitances on data sheets. The relationships between the
inter–terminal capacitances and those given on data sheets
are shown below. The Ciss can be specified in two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and
zero volts at the gate.
In the latter case, the numbers are lower . However, neither
method represents the actual operating conditions in RF
applications.
Drain
Cds
Source
Gate
Cgd
Cgs
Ciss = Cgd + Cgs
Coss = Cgd + Cds
Crss = Cgd
DRAIN CHARACTERISTICS
One critical figure of merit for a FET is its static resistance
in the full–on condition. This on–resistance, RDS(on), occurs in
the linear region of the output characteristic and is specified
at a specific gate–source voltage and drain current. The
drain–source voltage under these conditions is termed
VDS(on). For MOSFETs, VDS(on) has a positive temperature
coefficient at high temperatures because it contributes to the
power dissipation within the device.
BVDSS values for this device are higher than normally
required for typical applications. Measurement of BVDSS is not
recommended and may result in possible damage to the
device.
GATE CHARACTERISTICS
The gate of the RF MOSFET is a polysilicon material, and
is electrically isolated from the source by a layer of oxide. The
DC input resistance is very high – on the order of 109 Ω —
resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage to
the gate greater than the gate–to–source threshold voltage,
VGS(th).
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated VGS can result in permanent
damage to the oxide layer in the gate region.
Gate Termination — The gates of these devices are
essentially capacitors. Circuits that leave the gate open–cir-
cuited or floating should be avoided. These conditions can
result in turn–on of the devices due to voltage build–up on the
input capacitor due to leakage currents or pickup.
Gate Protection — These devices do not have an internal
monolithic zener diode from gate–to–source. If gate protec-
tion is required, an external zener diode is recommended.
Using a resistor to keep the gate–to–source impedance low
also helps dampen transients and serves another important
function. V oltage transients on the drain can be coupled to the
gate through the parasitic gate–drain capacitance. If the
gate–to–source impedance and the rate of voltage change on
the drain are both high, then the signal coupled to the gate may
be large enough to exceed the gate–threshold voltage and
turn the device on.
DC BIAS
Since this device is an enhancement mode FET, drain
current flows only when the gate is at a higher potential than
the source. RF power FET s operate optimally with a quiescent
drain current (IDQ), whose value is application dependent.
This device was characterized at IDQ = 150 mA, which is the
suggested value of bias current for typical applications. For
special applications such as linear amplification, IDQ may have
to be selected to optimize the critical parameters.
The gate is a dc open circuit and draws no current.
Therefore, the gate bias circuit may generally be just a simple
resistive divider network. Some special applications may
require a more elaborate bias system.
GAIN CONTROL
Power output of this device may be controlled to some
degree with a low power dc control signal applied to the gate,
thus facilitating applications such as manual gain control,
ALC/AGC and modulation systems. This characteristic is very
dependent on frequency and load line.
MRF1517T1
12 MOTOROLA RF DEVICE DATA
MOUNTING
The specified maximum thermal resistance of 2°C/W
assumes a majority of the 0.065″ x 0.180″ source contact on
the back side of the package is in good contact with an
appropriate heat sink. As with all RF power devices, the goal
of the thermal design should be to minimize the temperature
at the back side of the package. Refer to Motorola
Application Note AN4005/D, “Thermal Management and
Mounting Method for the PLD–1.5 RF Power Surface Mount
Package,” and Engineering Bulletin EB209/D, “Mounting
Method for RF Power Leadless Surface Mount T ransistor” for
additional information.
AMPLIFIER DESIGN
Impedance matching networks similar to those used with
bipolar transistors are suitable for this device. For examples
see Motorola Application Note AN721, “Impedance Matching
Networks Applied to RF Power Transistors.” Large–signal
impedances are provided, and will yield a good first pass
approximation.
Since RF power MOSFETs are triode devices, they are not
unilateral. This coupled with the very high gain of this device
yields a device capable of self oscillation. Stability may be
achieved by techniques such as drain loading, input shunt
resistive loading, or output to input feedback. The RF test
fixture implements a parallel resistor and capacitor in series
with the gate, and has a load line selected for a higher
efficiency, lower gain, and more stable operating region.
T wo–port stability analysis with this device’s S–parameters
provides a useful tool for selection of loading or feedback
circuitry to assure stable operation. See Motorola Application
Note AN215A, “RF Small–Signal Design Using Two–Port
Parameters” for a discussion of two port network theory and
stability.
13
MRF1517T1MOTOROLA RF DEVICE DATA
NOTES
MRF1517T1
14 MOTOROLA RF DEVICE DATA
NOTES
15
MRF1517T1MOTOROLA RF DEVICE DATA
NOTES
MRF1517T1
16 MOTOROLA RF DEVICE DATA
PACKAGE DIMENSIONS
CASE 466–02
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH
3. RESIN BLEED/FLASH ALLOWABLE IN ZONE V, W,
AND X.
_
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.255 0.265 6.48 6.73
B0.225 0.235 5.72 5.97
C0.065 0.072 1.65 1.83
D0.130 0.150 3.30 3.81
E0.021 0.026 0.53 0.66
F0.026 0.044 0.66 1.12
G0.050 0.070 1.27 1.78
H0.045 0.063 1.14 1.60
K0.273 0.285 6.93 7.24
L0.245 0.255 6.22 6.48
N0.230 0.240 5.84 6.10
P0.000 0.008 0.00 0.20
Q0.055 0.063 1.40 1.60
R0.200 0.210 5.08 5.33
S0.006 0.012 0.15 0.31
U0.006 0.012 0.15 0.31
ZONE V 0.000 0.021 0.00 0.53
ZONE W 0.000 0.010 0.00 0.25
ZONE X 0.000 0.010 0.00 0.25
STYLE 1:
PIN 1. DRAIN
2. GATE
3. SOURCE
4. SOURCE
2
34
1
AF
R
L
NK
D
B
Q
E
PC
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
G
H
ZONE X
ZONE W
0.89 (0.035) X 45 5
"
_
_
10 DRAFT
ZONE V
S
U
ÉÉÉ
ÉÉÉ
RESIN BLEED/FLASH ALLOWABLE
J0.160 0.180 4.06 4.57
J
0.115
2.92
0.020
0.51
0.115
2.92
mm
inches
0.095
2.41
0.146
3.71
SOLDER FOOTPRINT
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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MRF1517/D
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