LT6650
1
6650fa
APPLICATIO S
U
FEATURES
TYPICAL APPLICATIO
U
DESCRIPTIO
U
The LT
®
6650 is a micropower, low voltage 400mV refer-
ence. Operating with supplies from 1.4V up to 18V, the
device draws only 5.6µA typical, making it ideal for low
voltage systems as well as handheld instruments and
industrial control systems. With only two resistors the
internal buffer amplifier can scale the 400mV reference to
any desired value up to the supply voltage.
The reference is postpackage-trimmed to increase the
output accuracy. The output can sink and source 200µA
over temperature. Quiescent power dissipation is 28µW.
Stability is ensured with any output capacitor of 1µF or
higher.
The LT6650 is the lowest voltage series reference available
in the 5-lead SOT-23 package.
■
Battery-Operated Systems
■
Handheld Instruments
■
Industrial Control Systems
■
Data Acquisition Systems
■
Negative Voltage References
■
Low Quiescent Current 5.6
µ
A (typical)
■
Wide Supply Range: 1.4V to 18V
■
400mV Reference
±
1% Maximum Accuracy Over
Temperature at 5V
■
Rail-to-Rail Buffer Amplifier
■
0.5% 400mV Maximum Initial Accuracy at 5V
■
Shunt Configurable
■
Sinks and Sources Current
■
Wide Operational Range –40°C to 125°C
■
Externally Adjustable Output Voltage
■
Low Profile 1mm 5-lead SOT-23
(ThinSOT™) Package
Micropower, 400mV
Reference with Rail-to-Rail
Buffer Amplifier in SOT-23
OUT
V
OUT
0.4V
V
IN
= 1.4V TO 18V
I
Q
≈ 6µA
5
1
FB
IN
4
GND
1µF
2
LT6650
–
+
1µF
V
R
= 400mV
REFERENCE
6650 TA01a
TEMPERATURE (°C)
REFERENCE VOLTAGE (mV)
402
401
400
398
399
–30 10 50 90
6650 TA01b
130–50 –10 30 70 110
TYPICAL LT6650 PART
VIN = 5V
SINK 200µA
SOURCE –200µA
NO LOAD
LT6650 Temperature DriftBattery-Powered 0.4V Reference
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
LT6650
2
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Total Supply Voltage (V
IN
to GND)........................... 20V
FB Voltage (Note 2) ....................... 20V to (GND – 0.3V)
Output Voltage (OUT) .................... 20V to (GND – 0.3V)
Output Short-Circuit Duration .......................... Indefinite
FB Input Current ................................................... 10mA
Operating Temperature Range ............... –40°C to 125°C
Specified Temperature Range
LT6650CS5 ............................................. 0°C to 70°C
LT6650IS5........................................... –40°C to 85°C
LT6650HS5 (Note 3) ......................... –40°C to 125°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range (Note 4) .... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART NUMBER
T
JMAX
= 150°C, θ
JA
= 230°C/W
The temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
(Note 1)
TOP VIEW
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
1
2
3
FB
GND
DNC*
5
4
OUT
IN
*Do Not Connect
S5 PART MARKING
LBDV
LBDV
LBDV
LT6650CS5
LT6650IS5
LT6650HS5
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
VIN = 5V, CIN = 1µF, FB = OUT, no DC load, CL = 1µF,
unless
otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OUT
Output Voltage (Notes 4, 5) LT6650 398 400 402 mV
–0.5 0.5 %
LT6650CS5 ●397 400 403 mV
●–0.75 0.75 %
LT6650IS5 ●396 400 404 mV
●–1 1 %
LT6650HS5 ●394 400 406 mV
●–1.5 1.5 %
V
IN
Operating Input Voltage 1.4 18 V
∆V
OUT
/∆V
IN
Line Regulation 1.4V ≤ V
IN
≤ 18V
16 mV
150 900 ppm/V
LT6650CS5, LT6650IS5 ●7.5 mV
●1130 ppm/V
LT6650HS5 ●8.5 mV
●1280 ppm/V
∆V
OUT
/∆I
OUT
Load Regulation (Note 6) Sourcing from 0µA to –200µA –0.04 –0.2 mV
500 2500 ppm/mA
●–0.4 mV
●5000 ppm/mA
Sinking from 0µA to 200µA 0.24 1 mV
3000 12500 ppm/mA
●2mV
●20000 ppm/mA
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
LT6650
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T
C
Output Voltage Temperature ●30 ppm/°C
Coefficient (Note 10)
∆V
DO
Dropout Voltage (Note 7) Referred to V
IN
= 1.8V, V
OUT
= 1.4V
(R
F
= 100k, R
G
= 39.2k)
∆V
OUT
= –0.1%, I
OUT
= 0µA 75 100 mV
●150 mV
∆V
OUT
= –0.1%, I
OUT
= –200µA Sourcing 165 250 mV
●350 mV
∆V
OUT
= –0.1%, I
OUT
= 200µA Sinking (Note 11) –300 –150 mV
●0mV
I
SC
Short-Circuit Output Current V
OUT
Shorted to GND 5 mA
V
OUT
Shorted to V
IN
9mA
I
IN
Supply Current 5.6 11 µA
●14 µA
V
IN
= 18V 5.9 12 µA
●15 µA
I
FB
FB Pin Input Current V
FB
= V
OUT
= 400mV
1.2 10 nA
LT6650CS5, LT6650IS5 ●15 nA
LT6650HS5 ●30 nA
T
ON
Turn-On Time C
LOAD
= 1µF 0.5 ms
e
n
Output Noise (Note 8) 0.1Hz ≤ ƒ
≤ 10Hz 20 µV
P-P
10Hz ≤ ƒ
≤ 1KHz, I
OUT
= –200µA Sourcing 23 µV
RMS
V
HYS
Hysteresis (Note 9) ∆T = 0°C to 70°C●0.1 mV
●250 ppm
∆T = –40°C to 85°C●0.24 mV
●600 ppm
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The FB pin is protected by an ESD diode to the ground. If the FB
input voltage exceeds –0.3V below ground, the FB input current should be
limited to less than 10mA. If the FB input voltage is greater than 5V, the FB
input current is expected to meet specified performance from Typical
Performance Characteristics but is not tested or QA sampled at this
voltage.
Note 3: If the part is operating at temperatures above 85°C, it is
recommended to enhance the stability margin by using an output
capacitor greater than 10µF or a series RC combination having a 100µs
equivalent time constant. See Application section for details.
Note 4: If the part is stored outside of the specified temperature range, the
output voltage may shift due to hysteresis.
Note 5: ESD (Electrostatic Discharge) sensitive devices. Extensive use of
ESD protection devices are used internal to the LT6650; however, high
electrostatic discharge can damage or degrade the device. Use proper ESD
handling precautions.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
VIN = 5V, CIN = 1µF, FB = OUT, no DC load, CL = 1µF,
unless
otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Note 6: Load regulation is measured on a pulse basis from no load to the
specified load current. Output changes due to die temperature change
must be taken into account separately.
Note 7: Dropout Voltage is (V
IN
– V
OUT
) when V
OUT
falls to 0.1% below its
nominal value at V
IN
= 1.8V.
Note 8: Peak-to-Peak noise is measured with a single pole highpass filter
at 0.1Hz and a 2-pole lowpass filter at 10Hz. The unit is enclosed in a still
air environment to eliminate thermocouple effects on the leads. The test
time is 10 seconds.
Note 9: Hysteresis in the output voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Output voltage is always measured at 25°C, but the IC is
cycled to 85°C or –40°C before a successive measurement. Hysteresis is
roughly proportional to the square of the temperature change.
Note 10: Temperature coefficient is measured by dividing the change in
output voltage by the specified temperature range.
Note 11: This feature guarantees the shunt mode operation of the device.
LT6650
4
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INPUT VOLTAGE (V)
0
SUPPLY CURRENT (µA)
6
8
10
16
6650 G03
4
2
04812 20
14
2610 18
125°C
–55°C
25°C
TEMPERATURE (°C)
–60
OUTPUT VOLTAGE (mV)
404
403
402
400
401
399
398
397
396 100
6650 G01
–20–40 0 40 80 120
20 60
TYPICAL PART
VIN = 1.4V
VIN = 5V
VIN = 18V
TEMPERATURE (°C)
–60
OUTPUT VOLTAGE (mV)
403
402
400
401
399
398 100
6650 G02
–20–40 0 40 80 120
20 60
THREE PARTS
VIN = 5V
INPUT VOLTAGE (V)
0
SUPPLY CURRENT (µA)
6
8
10
1.6
6650 G04
4
2
00.4 0.8 1.2 2.0
1.4
0.2 0.6 1.0 1.8
125°C
–55°C
25°C
INPUT VOLTAGE (V)
2
398
OUTPUT VOLTAGE (mV)
399
400
401
402
61014 18
6550 G05
403
404
4812 16
TA = 125°C
TA = –55°C
TA = 25°C
INPUT VOLTAGE (V)
0.8
398
OUTPUT VOLTAGE (mV)
399
400
401
402
1.2 1.6 2.01.8
6650 G06
403
404
1.0 1.4
T
A
= 125°C
T
A
= –55°C
T
A
= 25°C
OUTPUT CURRENT (µA)
10
OUTPUT VOLTAGE CHANGE (µV)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
100 1000
6650 G07
TYPICAL PART
V
IN
= 5V
125°C
–55°C
25°C
OUTPUT CURRENT (µA)
10
OUTPUT VOLTAGE CHANGE (µV)
1000
900
800
700
600
500
400
300
200
100
0
100 1000
6650 G08
TYPICAL PART
V
IN
= 5V
125°C
–55°C
25°C
OUTPUT CURRENT (µA)
10
INPUT-OUTPUT VOLTAGE (mV)
500
400
300
200
100
0
100 1000
6650 G09
V
OUT
= 1.425V - TYP (RF = 100k, RG = 39.2k)
0.1% V
OUT
125°C
–55°C
25°C
Output Voltage Temperature
Drift
Output Voltage Temperature
Drift
Supply Current vs Input Voltage Line Regulation Line Regulation
Load Regulation (Sourcing) Load Regulation (Sinking)
Minimum Input-Output Voltage
Differential (Sourcing)
TYPICAL PERFOR A CE CHARACTERISTICS
UW
(See Applications, Figure 1)
Supply Current vs Input Voltage
LT6650
5
6650fa
Minimum Input-Output Voltage
Differential (Sinking)
Output Short-Circuit Current vs
Input Voltage
Output Short-Circuit Current vs
Input Voltage
FB Pin Current vs FB Pin Voltage FB Pin Current vs FB Pin Voltage Gain and Phase vs Frequency
Output Noise 0.1Hz to 10Hz Output Voltage Noise Spectrum Integrated Noise 10Hz to 1kHz
OUTPUT CURRENT(µA)
10 100 1000
INPUT-OUTPUT VOLTAGE (mV)
0
–400
–300
–200
–100
–500
6650 G10
V
OUT
= 1.425V - TYP (RF = 100k, RG = 39.2k)
0.1% V
OUT
125°C
–55°C
25°C
INPUT VOLTAGE (V)
0
OUTPUT CURRENT (mA)
6
8
14
12
10
16
6650 G11
4
24812 20
14
2610 18
OUTPUT SHORTED TO GND
125°C
–55°C
25°C
INPUT VOLTAGE (V)
0
OUTPUT CURRENT (mA)
6
8
14
12
10
16
6650 G12
4
24812 20
14
2610 18
OUTPUT SHORTED TO V
IN
125°C
25°C
–55°C
FB PIN VOLTAGE (V)
–0.6
–10
FB PIN CURRENT (nA)
0
2
4
6
–0.2 0.2 0.6 1.0
6650 G13
8
–2
–4
–6
–8
10
–0.4 0 0.4 0.8
125°C
VFB ≠ VOUT
CURRENT IS POSITIVE WHEN
IT ENTERS THE DEVICE
–55°C
25°C
FB PIN VOLTAGE (V)
13 795151311 17 19
FB PIN CURRENT (nA)
10
1
0.1
0.01
6650 G14
125°C
V
FB
≠ V
OUT
CURRENT IS POSITIVE WHEN
IT ENTERS THE DEVICE
–55°C
25°C
FREQUENCY (kHz)
GAIN (dB)
120
100
80
60
40
20
00
–20
–40
PHASE (DEG)
120
100
80
60
40
20
–20
–40
0.01 1 10 100
6650 G15
0.1
TA = 25°C
UNITY GAIN
RL = 2k
CL = 1µF
GAIN PHASE
TIME (s)
0
OUTPUT NOISE (5µV/DIV)
8
6650 G16
24610
7
1359
V
IN
= 5V
FREQUENCY (Hz)
10
NOISE LEVEL (µV/√Hz)
20
100 1k 10k
6650 G17
V
IN
= 5V
C
L
= 1µF
I
OUT
= –40µA
I
OUT
= 0µA
0
5
10
15
I
OUT
= –200µA
FREQUENCY (Hz)
10
1
INTEGRATED NOISE (µVRMS)
10
100
100 1k
6650 G18
VIN = 5V
CL = 1µF
IOUT = –200µA
TYPICAL PERFOR A CE CHARACTERISTICS
UW
(See Applications, Figure 1)
LT6650
6
6650fa
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Output Impedance vs Frequency Output Impedance vs Frequency Output Impedance vs Frequency
Power Supply Rejection Ratio vs
Frequency
Power Supply Rejection Ratio vs
Frequency
Power Supply Rejection Ratio vs
Frequency
Power Supply Rejection Ratio vs
Frequency
Power Supply Rejection Ratio vs
Frequency
Power Supply Rejection Ratio vs
Frequency
FREQUENCY (Hz)
10
OUTPUT IMPEDANCE (Ω)
100
10 1k 10k 100k
6650 G19
1
100
1000
C
L
= 1µF
C
L
= 10µF
C
L
= 47µF
I
OUT
= 0µA
R
Z
= 0Ω
FREQUENCY (Hz)
10
OUTPUT IMPEDANCE (Ω)
100
10 1k 10k 100k
6650 G20
1
100
1000
C
L
= 1µF
C
L
= 10µF
C
L
= 47µF
I
OUT
= –40µA
R
Z
= 0Ω
FREQUENCY (Hz)
10
OUTPUT IMPEDANCE (Ω)
100
10 1k 10k 100k
6650 G21
1
100
1000
C
L
= 1µF
C
L
= 10µF
C
L
= 47µF
I
OUT
= 0µA
C
L
• R
Z
= 100µs
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
20
10
0
–10
–20
–30
–40
–50
–60
–70
–80
10 1k 10k 100k
6650 G22
100
CL = 1µF
CL = 10µF
CL = 47µF
IOUT = 0µA
RZ = 0Ω
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
20
10
0
–10
–20
–30
–40
–50
–60
–70
–80
10 1k 10k 100k
6650 G23
100
C
L
= 1µF
C
L
= 10µF
C
L
= 47µF
I
OUT
= –40µA
R
Z
= 0Ω
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
20
10
0
–10
–20
–30
–40
–50
–60
–70
–80
10 1k 10k 100k
6650 G24
100
C
L
= 1µF
C
L
= 10µF
C
L
= 47µF
I
OUT
= 0µA
C
L
• R
Z
= 100µs
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
20
10
0
–10
–20
–30
–40
–50
–60
–70
–80
10 1k 10k 100k
6650 G25
100
CL = 1µF
CL = 10µF
CL = 47µF
IOUT = 0µA
RZ = 0Ω
CIN = 1µF
RIN = 1k
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
20
10
0
–10
–20
–30
–40
–50
–60
–70
–80
10 1k 10k 100k
6650 G26
100
C
L
= 1µF
C
L
= 10µF
C
L
= 47µF
I
OUT
= –40µA
R
Z
= 0Ω
C
IN
= 1µF
R
IN
= 1k
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
20
10
0
–10
–20
–30
–40
–50
–60
–70
–80
10 1k 10k 100k
6650 G27
100
C
L
= 1µF
C
L
= 10µF
C
L
= 47µF
I
OUT
= 0µA
C
L
• R
Z
= 100µs
C
IN
= 1µF
R
IN
= 1k
(See Applications, Figure 1)
LT6650
7
6650fa
APPLICATIO S I FOR ATIO
WUUU
PI FU CTIO S
UUU
BLOCK DIAGRA
W
FB (Pin 1): Resistor Divider Feedback Pin. Connect a
resistor divider from OUT to GND and the center tap to FB.
This pin sets the output potential.
GND (Pin 2): Ground Connection.
DNC (Pin 3): Do not connect. Connected internally for post
package trim. This pin must be left unconnected.
IN (Pin 4): Positive Supply. Bypassing with a 1µF capacitor
is recommended if the output loading changes.
OUT (Pin 5): Reference Output. The output sources and
sinks current. It is stable with any load capacitor with a
total capacitance of 1µF or more. Higher load capacitance
improves load transient response.
OUT
DNC
FB
IN
GND
LT6650
–
+
V
R
= 400mV
REFERENCE
6650 BD
4
2
3
5
1
Long Battery Life
The LT6650 is a micropower, adjustable reference which
operates from supply voltages ranging from 1.4V to 18V.
The series regulated output may be configured with exter-
nal resistors to any voltage from 400mV to nearly the
supply potential. Under no-load conditions, the LT6650
dissipates only 8µW when operating on a 1.4V supply.
Other operating configurations allow the LT6650 to be
used as a micropower positive or negative adjustable
shunt reference from 1.4V to 18V.
Bypass and Load Capacitor
The LT6650 voltage reference requires a 1µF or greater
output capacitance for proper operation. This capacitance
may be provided by either a single capacitor connected
between OUT and GND or formed by the aggregate of
several capacitors that may be serving other decoupling
functions. Output impedance can be reduced by DC load-
ing of the output by 40µA to 200µA, and/or adding an R
Z
to the output capacitor for a 100µs time constant as shown
in Figure 1 and the Typical Performance Characteristics
graphs.
The LT6650 Voltage reference should have an input by-
pass capacitor of 0.1µF or larger. When the circuit is
Figure 1. LT6650 Input-Output Configuration
V
OUT
V
IN
OUT
IN
R
IN
FB
GND
LT6650
6650 F01
2
4 5
1
C
L
R
Z
C
IN
LT6650
8
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operated from a small battery or other relatively high
impedance source, a minimum 1µF capacitor is recom-
mended. PSRR can be significantly enhanced by adding a
low-pass RC filter on the input, with a time-constant of
1ms or higher, as shown in Figure 1. The Typical Perfor-
mance Characteristics graphs show performance as a
function of several combinations of input and output
capacitance.
An input RC of 100ms or more is recommended (such as
5k and 22µF) when output transients must be minimized
in the face of high supply noise, such as in automotive
applications. Figure 2 shows an input filter structure that
effectively eliminates supply transients from affecting the
output. With this extra input decoupling and the LT6650
operating normally from a 12V bus, 50V transients induce
less than <0.5% V
OUT
perturbations.
Figure 3 shows the turn-on response time for the circuit in
Figure 1. The input voltage steps from 0V to 3V, and the
output is configured to produce 400mV. Input bypass and
output load capacitance are 1µF, R
IN
= 0Ω, R
Z
= 0Ω, and
the output settles in approximately 0.5ms. Figure 4 shows
APPLICATIO S I FOR ATIO
WUUU
Figure 2. High Noise-Immunity Input Network
Figure 3. LT6650 Turn-On Characteristic
Figure 4. Output Response to ±0.5V Input Step
Figure 5. Output Response to Bidirectional Load Step
(100µA to –100µA)
Figure 6. Output Response to Current-Sourcing Load Step
(–100µA to –200µA)
V
IN
4.7k
NOISY
POWER BUS
6650 F02
22µF
1N751
5V
33k
1µF
the same circuit responding to input transients of 0.5V,
settling in about 0.3ms. Figures 5 through 7 show the
same circuit responding to various load steps: changes
between ±100µA in Figure 5; sourcing current step be-
tween –100µA and –200µA in Figure 6; and sinking current
6650 F05
V
OUT
10mV/DIV
I
OUT
SINKING
SOURCING
100µA
SINKING
100µA
SOURCING
6650 F06
V
OUT
10mV/DIV
AC
I
OUT
–100µA
–200µA
V
OUT
0.2ms/DIV 6650 F03
V
IN
3V
0V
0.4V
0V
2ms/DIV 6650 F04
V
IN
V
OUT
3V
2.5V
0.4V
0V
LT6650
9
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Figure 9. Typical Configuration of LT6650 as Adjustable Positive
Shunt Reference
Figure 10. Typical Configuration of LT6650 as Adjustable
Negative Shunt Reference
APPLICATIO S I FOR ATIO
WUUU
step between 100µA and 200µA in Figure 7. Load step settling
occurs in about 0.5ms or less (to ±0.2%).
Output Adjustment
If the LT6650 is to be used as a 400mV reference, then the
output and feedback pins may be tied together without any
scale-setting components as shown in the front-page
application circuit. Setting the output to any higher voltage
is a simple matter of selecting two feedback resistors to
configure the non-inverting gain of the internal operational
amplifier, as shown in Figure 8. A feedback resistor R
F
is
connected between the OUT pin and the FB pin, and a gain
resistor R
G
is connected from the FB pin to GND. The
resistor values are related to the output voltage by the
following relationship:
R
F
= R
G
• (V
OUT
– 0.4)/(0.4 – I
FB
• R
G
)
The I
FB
term represents the FB pin bias current, and can
generally be neglected when R
G
is 100k or less. For
R
G
≤20k, even worst-case I
FB
can be neglected (error
contribution <0.15%). Since the V
OUT
error distribution
increases at twice the resistor tolerance, high accuracy
resistors or resistor networks are recommended. The
output voltage may be set to any level from 400mV up to
350mV below the supply voltage with source or sink
capability.
Noise Reduction Capacitor
In applications involving the use of resistive feedback for
reference scaling, the intrinsic reference noise is amplified
along with the DC level. To minimize noise amplification,
the use of a 1nF feedback capacitor is recommended, as
shown in Figure 8 and other circuits with scaling resistors.
Shunt Reference Operation
The circuits shown in Figure 9 and Figure 10 form adjust-
able shunt references. Along with the external bias resistor
R
B
, the LT6650 provides positive or negative reference
operation for outputs between 1.4V and 18V (positive or
negative). Just like a Zener diode, a supply V
S
is required,
somewhat higher in magnitude than the desired reference
V
OUT
6650 F09
10µF
OUTIN
FB
GND
LT6650
2
45
1
V
S
R
F
R
B
R
G
1nF
V
OUT
= 0.4V • (1 + R
F
/R
G
)
V
OUT
6650 F10
10µF
OUTIN
FB
GND
LT6650
2
45
1
R
F
–V
S
R
B
R
G
1nF
V
OUT
= –0.4V • (1 + R
F
/R
G
)
Figure 8. Typical Configuration for Output Voltages
Greater than 0.4V
V
OUT
6650 F08
1µF1µF
1nF
OUTIN
FB
GND
LT6650
2
45
1
V
S
1k
R
F
R
G
V
OUT
= 0.4V • (1 + R
F
/R
G
)
Figure 7. Output Response to Current-Sinking Load Step
(100µA to 200µA)
6650 F07
V
OUT
10mV/DIV
AC
I
OUT
200µA
100µA
LT6650
10
6650fa
APPLICATIO S I FOR ATIO
WUUU
Figure 11. Worst-Case 0°C to 70°C Hysteresis Figure 12. Worst-Case –40°C to 85°C Hysteresis
V
OUT
. R
B
must be within the following range for proper
operation (the optimal value depends greatly on the direc-
tion and magnitude of the load current):
R
B
> |V
S
– V
OUT
|/(200µA + 0.4/R
G
)
R
B
< |V
S
– V
OUT
|/(15µA + 0.4/R
G
)
Hysteresis
Due to various mechanical stress mechanisms inherent to
integrated-circuit packaging, internal offsets may not pre-
cisely recover from variations that occur over tempera-
ture, and this effect is referred to as hysteresis. Proprietary
manufacturing steps minimize this hysteresis, though
some small residual error can occur. Hysteresis measure-
ments for the LT6650 can be seen in Figures 11 and 12.
Figure 11 presents the worst-case data taken on parts
subjected to thermal cycling between 0°C to 70°C, while
Figure 12 shows data for –40°C to 85°C cycling. Units
were cycled several times over these temperature ranges
and the largest changes are shown. As would be expected,
the parts cycled over the higher temperature extremes
exhibit a broader hysteresis distribution. The worst hys-
teresis measurements indicate voltage shifts of less than
1000ppm (0.1%) from their initial value.
Limits of Operation
The LT6650 is a robust bipolar technology part. ESD
clamp diodes are integrated into the design and are
depicted in the Simplified Schematic for reference. Diodes
are included between the GND pin and the IN, OUT, and FB
pins to prevent reverse voltage stress on the device.
Unusual modes of operation that forward-bias any these
diodes should limit current to 10mA to avoid permanent
damage to the device. The LT6650 is fabricated using a
relatively high-voltage process, allowing any pin to inde-
pendently operate at up to 20V with respect to GND. The
part does not include any over voltage protection mecha-
nisms; therefore caution should be exercised to avoid
inadvertent application of higher voltages in circuits in-
volving high potentials.
DISTRIBUTION (ppm)
–400
NUMBER OF UNITS
2
3
6
5
4
400
6650 F11
1
0–200 0200 600
LIGHT COLUMNS 0°C TO 25°C
DARK COLUMNS 70°C TO 25°C
DISTRIBUTION (ppm)
–1000
NUMBER OF UNITS
2
3
6
5
4
500
6650 F12
7
1
0–500 1000
250
–750 –250 0750
LIGHT COLUMNS –40°C TO 25°C
DARK COLUMNS 85°C TO 25°C
LT6650
11
6650fa
PACKAGE DESCRIPTIO
U
SCHE ATIC
WW
SI PLIFIED
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S5 TSOT-23 0302 REV B
PIN ONE
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635 Rev B)
IN
FB
GND
OUT
6650 SS
4
5
2
1
IN
ININ
LT6650
12
6650fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2003
LT/LT 1005 • PRINTED IN USA
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U
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ANODE
CATHODE
ANODE
CATHODE
6650 TA02
10µF1.4V ≤ V
Z
≤ 18V
30µA ≤ I
Z
≤ 220µA
V
Z
= 0.4V • (1 + R
F
/R
G
)
=
OUTIN
FB
GND
LT6650
2
45
1
R
F
R
G
1nF
Adjustable Micropower “Zener” 2-Terminal Reference
