CD40192BC - National Semiconductor

TL/F/5988

CD40192BM/CD40192BC Synchronous 4-Bit Up/Down Decade Counter

CD40193BM/CD40193BC Synchronous 4-Bit Up/Down Binary Counter

February 1988

CD40192BM/CD40192BC Synchronous

4-Bit Up/Down Decade Counter

CD40193BM/CD40193BC Synchronous

4-Bit Up/Down Binary Counter

General Description

These up/down counters are monolithic complementary

MOS (CMOS) integrated circuits. The CD40192BM and

CD40192BC are BCD counters, while the CD40193BM and

CD40193BC are binary counters.

Counting up and counting down is performed by two count

inputs, one being held high while the other is clocked. The

outputs change on the positive-going transition of this clock.

These counters feature preset inputs that are enabled when

load is a logical ‘‘0’’ and a clear which forces all outputs to

‘‘0’’ when it is at logical ‘‘1’’. The counters also have carry

and borrow outputs so that they can be cascaded using no

external circuitry.

All inputs are protected against damage due to static dis-

charge by clamps to VDD and VSS.

Features

YWide supply voltage range 3V to 15V

YHigh noise immunity 0.45 VDD (typ.)

YLow power TTL compatibility Fan out of 2

driving 74L

or 1 driving 74LS

YCarry and borrow outputs for easy expansion to N-bit

by cascading

YAsynchronous clear

YEquivalent to MM54C192/MM74C192

and MM54C193/MM74C193

Connection Diagram

Dual-In-Line Package

TL/F/5988–1

Top View

Order Number CD40192B or CD40193

Cascading Packages

TL/F/5988–2

C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Notes1&2)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales

Office/Distributors for availability and specifications.

DC Supply Voltage (VDD)b0.5 to a18 VDC

Input Voltage (VIN)b0.5 to VDD a0.5 VDC

Storage Temperature Range (TS)b65§Ctoa

150§C

Power Dissipation (PD)

Dual-In-Line 700 mW

Small Outline 500 mW

Lead Temperature (TL)

(Soldering, 10 seconds) 260§C

Recommended Operating

Conditions (Note 2)

DC Supply Voltage (VDD) 3 to 15 VDC

Input Voltage (VIN) 0 to VDD VDC

Operating Temperature Range (TA)

CD40192BM, CD40193BM b55§Ctoa

125§C

CD40192BC, CD40193BC b40§Ctoa

85§C

DC Electrical Characteristics CD40192BM/CD40193BM (Note 2)

Symbol Parameter Conditions b55§Ca25§Ca125§CUnits

Min Max Min Typ Max Min Max

IDD Quiescent Device VDD e5V, VIN eVDD or VSS 5 5 150 mA

Current VDD e10V, VIN eVDD or VSS 10 10 300 mA

VDD e15V, VIN eVDD or VSS 20 20 600 mA

VOL Low Level VDD e5V 0.05 0.05 0.05 V

Output Voltage VDD e10V 0.05 0.05 0.05 V

VDD e15V 0.05 0.05 0.05 V

VOH High Level VDD e5V 4.95 4.95 4.95 V

Output Voltage VDD e10V 9.95 9.95 9.95 V

VDD e15V 14.95 14.95 14.95 V

VIL Low Level VDD e5V, VOe0.5V or 4.5V 1.5 1.5 1.5 V

Input Voltage VDD e10V, VOe1V or 9V 3.0 3.0 3.0 V

VDD e15V, VOe1.5V or 13.5V 4.0 4.0 4.0 V

VIH High Level VDD e5V, VOe0.5V or 4.5V 3.5 3.5 3.5 V

Input Voltage VDD e10V, VOe1V or 9V 7.0 7.0 7.0 V

VDD e15V, VOe1.5V or 13.5V 11.0 11.0 11.0 V

IOL Low Level Output VDD e5V, VOe0.4V 0.64 0.51 0.88 0.36 mA

Current (Note 3) VDD e10V, VOe0.5V 1.6 1.3 2.25 0.9 mA

VDD e15V, VOe1.5V 4.2 3.4 8.8 2.4 mA

IOH High Level Output VDD e5V, VOe4.6V b0.64 b0.51 b0.88 b0.36 mA

Current (Note 3) VDD e10V, VOe9.5V b1.6 b1.3 b2.25 b0.9 mA

VDD e15V, VOe13.5V b4.2 b3.4 b8.8 b2.4 mA

IIN Input Current VDD e15V, VIN e0V b0.1 b10b5b0.1 b1.0 mA

VDD e15V, VIN e15V 0.1 10b50.1 1.0 mA

DC Electrical Characteristics CD40192BC/CD40193BC (Note 2)

Symbol Parameter Conditions b40§Ca25§Ca85§CUnits

Min Max Min Typ Max Min Max

IDD Quiescent Device VDD e5V, VIN eVDD or VSS 20 20 150 mA

Current VDD e10V, VIN eVDD or VSS 40 40 300 mA

VDD e15V, VIN eVDD or VSS 80 80 600 mA

VOL Low Level VDD e5V 0.05 0.05 0.05 V

Output Voltage VDD e10V 0.05 0.05 0.05 V

VDD e15V 0.05 0.05 0.05 V

VOH High Level VDD e5V 4.95 4.95 4.95 V

Output Voltage VDD e10V 9.95 9.95 9.95 V

VDD e15V 14.95 14.95 14.95 V

VIL Low Level VDD e5V, VOe0.5V or 4.5V 1.5 1.5 1.5 V

Input Voltage VDD e10V, VOe1V or 9V 3.0 3.0 3.0 V

VDD e15V, VOe1.5V or 13.5V 4.0 4.0 4.0 V

VIH High Level VDD e5V, VOe0.5V or 4.5V 3.5 3.5 3.5 V

Input Voltage VDD e10V, VOe1V or 9V 7.0 7.0 7.0 V

VDD e15V, VOe1.5V or 13.5V 11.0 11.0 11.0 V

IOL Low Level Output VDD e5V, VOe0.4V 0.52 0.44 0.88 0.36 mA

Current (Note 3) VDD e10V, VOe0.5V 1.3 1.1 2.25 0.9 mA

VDD e15V, VOe1.5V 3.6 3.0 8.8 2.4 mA

DC Electrical Characteristics CD40192BC/CD40193BC (Note 2) (Continued)

Symbol Parameter Conditions b40§Ca25§Ca85§CUnits

Min Max Min Typ Max Min Max

IOH High Level Output VDD e5V, VOe4.6V b0.52 b0.44 b0.88 b0.36 mA

Current (Note 3) VDD e10V, VOe9.5V b1.3 b1.1 b2.25 b0.9 mA

VDD e15V, VOe13.5V b3.6 b3.0 b8.8 b2.4 mA

IIN Input Current VDD e15V, VIN e0V b0.3 b10b5b0.3 b1.0 mA

VDD e15V, VIN e15V 0.3 10b50.3 1.0 mA

AC Electrical Characteristics*

TAe25§C, CLe50 pF, RLe200 kX, input tretfe20 ns, unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Units

tPHL or tPLH Propagation Delay Time VDD e5V 250 400 ns

from Count Up or VDD e10V 100 160 ns

Count Down to Q VDD e15V 80 130 ns

tPHL or tPLH Propagation Delay Time VDD e5V 120 200 ns

from Count Up to Carry VDD e10V 50 80 ns

VDD e15V 40 65 ns

tPHL or tPLH Propagation Delay Time VDD e5V 120 200 ns

from Count Down VDD e10V 50 80 ns

to Borrow VDD e15V 40 65 ns

tSU Time Prior to Load VDD e5V 100 160 ns

That Data Must VDD e10V 30 50 ns

Be Present VDD e15V 25 40 ns

tPHL Propagation Delay Time VDD e5V 130 220 ns

from Clear to Q VDD e10V 60 100 ns

VDD e15V 50 80 ns

tPLH or tPHL Propagation Delay Time VDD e5V 300 480 ns

from Load to Q VDD e10V 120 190 ns

VDD e15V 95 150 ns

tTLH or tTHL Output Transition Time VDD e5V 100 200 ns

VDD e10V 50 100 ns

VDD e15V 40 80 ns

fCL Maximum Count Frequency VDD e5V 2.5 4 MHz

VDD e10V 6 10 MHz

VDD e15V 7.5 12.5 MHz

trCL or tfCL Maximum Count Rise VDD e5V 15 ms

or Fall Time VDD e10V 5 ms

VDD e15V 1 ms

tWH,t

WL Minimum Count Pulse VDD e5V 120 200 ns

Width VDD e10V 35 80 ns

VDD e15V 28 65 ns

tWH Minimum Clear VDD e5V 300 480 ns

Pulse Width VDD e10V 120 190 ns

VDD e15V 95 150 ns

tWL Minimum Load VDD e5V 100 160 ns

Pulse Width VDD e10V 40 65 ns

VDD e15V 32 55 ns

CIN Average Input Capacitance Load and Data 5 7.5 pF

Inputs (A,B,C,D)

Count Up, Count 10 15 pF

Down and Clear

CPD Power Dissipation Capacity (Note 4) 100 pF

*AC Parameters are guaranteed by DC correlated testing.

Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices

should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device

operation.

Note 2: VSS e0V unless otherwise specified.

Note 3: IOH and IOL are tested one output at a time.

Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 54C/74C Family Characteristics application note,

AN-90.

Schematic Diagrams

CD40192BM/CD40192BC Synchronous 4-Bit Up/Down Decade Counter

TL/F/5988–3

CD40193BM/CD40193BC Synchronous 4-Bit Up/Down Binary Counter

TL/F/5988–4

Timing Diagrams

CD40192BM/CD40192BC

TL/F/5988–5

Sequence:

1. Clear outputs to zero.

2. Load (preset) to BCD seven.

3. Count up to eight, nine, carry, zero, one and two.

4. Count down to one, zero, borrow, nine, eight and seven.

CD40193BM/CD40193BC

TL/F/5988–6

Sequence:

1. Clear outputs to zero.

2. Load (preset) to binary thirteen.

3. Count up to fourteen, fifteen, carry, zero, one and two.

4. Count down to one, zero, borrow, fifteen, fourteen and thirteen.

CD40192BM/CD40192BC Synchronous 4-Bit Up/Down Decade Counter

CD40193BM/CD40193BC Synchronous 4-Bit Up/Down Binary Counter

Physical Dimensions inches (millimeters)

Ceramic Dual-In-Line Package (J)

Order Number CD40192BMJ, CD40192BCJ, CD40193BMJ or CD40193BCJ

NS Package Number J16A

Molded Dual-In-Line Package (N)

Order Number CD40192BMN, CD40192BCN, CD40193BMN or CD40193BCN

NS Package Number N16E

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failure to perform, when properly used in accordance support device or system, or to affect its safety or

with instructions for use provided in the labeling, can effectiveness.

be reasonably expected to result in a significant injury

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