1
LT1019
1019fd
Precision Reference
The LT
®
1019 is a third generation bandgap voltage refer-
ence utilizing thin film technology and a greatly improved
curvature correction technique. Wafer level trimming of
both reference and output voltage combines to produce
very low TC and tight initial output voltage tolerance.
The LT1019 can both sink and source up to 10mA and can
be used in either the series or shunt mode, allowing the
reference to operate with positive or negative output
voltages without external components. Minimum input/
output voltage is less than 1V in the series mode, providing
improved tolerance of low line conditions and excellent
line regulation.
The LT1019 is available in four voltages: 2.5V, 4.5V, 5V
and 10V. It is a direct replacement for most bandgap
references presently available including AD580, AD581,
REF-01, REF-02, MC1400, MC1404 and LM168.
■
Tight Initial Output Voltage: <0.05%
■
Ultralow Drift: 3ppm/°C Typical
■
Series or Shunt Operation
■
Curvature Corrected
■
Ultrahigh Line Rejection: ≈0.5ppm/V
■
Low Output Impedance: ≈0.02Ω
■
Plug-In Replacement for Present References
■
Available at 2.5V, 4.5V, 5V, and 10V
■
100% Noise Tested
■
Temperature Output
■
Industrial Temperature Range in SO-8
■
Available in 8-Lead N8 and S8 Packages
■
Negative Shunt References
■
A/D and D/A Converters
■
Precision Regulators
■
Constant Current Sources
■
V/F Converters
■
Bridge Excitation
Ultralinear Strain Gauge Output Voltage Drift
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATION
U
–
+
A1
†
LT1637
–
+
A2
LT1001
R3
2M
R2
20k
R4
20k GAIN = 100
R5
2M R6**
2M
IN
LT1019-5
GND
OUT
15V
5V
357Ω*
0.5W
ACTIVE
ELEMENT
350Ω
BRIDGE
–15V
–5V
357Ω*
0.5W
REDUCES REFERENCE AND AMPLIFIER
LOADING TO ≈0.
IF R6 = R3, BRIDGE IS NOT LOADED BY R2 AND R4.
A1 VOS AND DRIFT ARE NOT CRITICAL BECAUSE A2
ACTS AS A DIFFERENTIAL AMPLIFIER.
*
**
†
LT1019 • TA01
TEMPERATURE (˚C)
–50
OUTPUT VOLTAGE (NORMALIZED) (V)
1.001
1.002
1.003
25 75
1019 TA02
1.000
0.999
–25 0 50 100 125
0.998
0.997
5ppm/°C
0°C TO 70°C “BOX”
LT1019
CURVE
UNCOMPENSATED
“STANDARD” BANDGAP
DRIFT CURVE
10ppm/°C
FULL TEMP RANGE “BOX”
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
2
LT1019
1019fd
A
U
G
W
A
W
U
W
ARBSOLUTEXI T
IS
Input Voltage .......................................................... 40V
Output Voltage (Note 2)
LT1019-5, LT1019-10 ........................................ 16V
LT1019-2.5, LT1019-4.5 ...................................... 7V
Output Short-Circuit Duration (Note 2)
V
IN
< 20V .................................................... Indefinite
20V ≤ V
IN
≤ 35V ............................................. 10 sec
Specified Temperature Range
Commercial ............................................. 0°C to 70°C
Industrial ............................................ –40°C to 85°C
Military ............................................. –55°C to 125°C
Trim Pin Voltage ................................................... ±30V
Temp Pin Voltage ..................................................... 5V
Storage Temperature Range (Note 11) – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
WU
U
PACKAGE/ORDER I FOR ATIO
S8 PART
MARKING
ORDER PART
NUMBER
LT1019ACN8-2.5
LT1019ACN8-4.5
LT1019ACN8-5
LT1019ACN8-10
LT1019CN8-2.5
LT1019CN8-4.5
T
JMAX
= 100°C, θ
JA
= 130°C/W
LT1019CN8-5
LT1019CN8-10
LT1019IN8-2.5
LT1019IN8-4.5
LT1019IN8-5
LT1019IN8-10
T
JMAX
= 150°C, θ
JA
= 150°C/ W, θ
JC
= 45°C/W
TOP VIEW
DNC*
DNC*
DNC*
INPUT OUTPUT
TRIM
TEMP
GND (CASE)
8
7
6
5
3
2
1
4
H PACKAGE
8-LEAD TO-5 METAL CAN
*INTERNALLY CONNECTED. DO NOT
CONNECT EXTERNALLY
ORDER PART
NUMBER
019A25
1019A5
19AI25
019AI5
1925
1945
1905
1910
19I25
19I05
(Note 1)
ORDER PART
NUMBER
1
2
3
4
8
7
6
5
TOP VIEW
DNC*
INPUT
TEMP
GND
DNC*
DNC*
OUTPUT
TRIM
N8 PACKAGE
8-LEAD PDIP
*INTERNALLY CONNECTED. DO NOT
CONNECT EXTERNALLY.
T
JMAX
= 100°C, θ
JA
= 130°C/W
TOP VIEW
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
8
7
6
5
DNC*
INPUT
TEMP
GND
DNC*
DNC*
OUTPUT
TRIM
*INTERNALLY CONNECTED. DO NOT
CONNECT EXTERNALLY.
LT1019ACH-2.5
LT1019ACH-4.5
LT1019ACH-5
LT1019ACH-10
LT1019AMH-2.5
LT1019AMH-4.5
LT1019AMH-5
LT1019AMH-10
LT1019CH-2.5
LT1019CH-4.5
LT1019CH-5
LT1019CH-10
LT1019MH-2.5
LT1019MH-4.5
LT1019MH-5
LT1019MH-10
LT1019ACS8-2.5
LT1019ACS8-5
LT1019AIS8-2.5
LT1019AIS8-5
LT1019CS8-2.5
LT1019CS8-4.5
LT1019CS8-5
LT1019CS8-10
LT1019IS8-2.5
LT1019IS8-5
OBSOLETE
CONSIDER THE N8 OR S8 FOR
ALTERNATE SOURCES.
3
LT1019
1019fd
AVAILABLE OPTIO S
U
OUTPUT TEMPERATURE PACKAGE TYPE
VOLTAGE TEMPERATURE ACCURACY COEFFICIENT TO-5 SO-8 PDIP-8
(V) (
°
C) (%) (ppm/
°
C) H8 S8 N8
2.5 0 to 70 0.05 5 LT1019ACH-2.5 LT1019ACS8-2.5 LT1019ACN8-2.5
0.2 20 LT1019CH-2.5 LT1019CS8-2.5 LT1019CN8-2.5
–40 to 85 0.05 10 LT1019AIS8-2.5
0.2 20 LT1019IS8-2.5 LT1019IN8-2.5
–55 to 125 0.05 10 LT1019AMH-2.5
0.2 25 LT1019MH-2.5
4.5 0 to 70 0.05 5 LT1019ACH-4.5 LT1019ACN8-4.5
0.2 20 LT1019CH-4.5 LT1019CS8-4.5 LT1019CN8-4.5
–40 to 85 0.2 20 LT1019IN8-4.5
–55 to 125 0.05 10 LT1019AMH-4.5
0.2 25 LT1019MH-4.5
5 0 to 70 0.05 5 LT1019ACH-5 LT1019ACS8-5 LT1019ACN8-5
0.2 20 LT1019CH-5 LT1019CS8-5 LT1019CN8-5
–40 to 85 0.05 10 LT1019AIS8-5
0.2 20 LT1019IS8-5 LT1019IN8-5
–55 to 125 0.05 10 LT1019AMH-5
0.2 25 LT1019MH-5
10 0 to 70 0.05 5 LT1019ACH-10 LT1019ACN8-10
0.2 20 LT1019CH-10 LT1019CS8-10 LT1019CN8-10
–40 to 85 0.2 20 LT1019IN8-10
–55 to 125 0.05 10 LT1019AMH-10
0.2 25 LT1019MH-10
ELECTRICAL C CHARA TERISTICS
LT1019A LT1019
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Output Voltage Tolerance 0.02 0.05 0.02 0.2 %
TC Output Voltage LT1019C (0°C to 70°C) ●3 5 5 20 ppm/°C
Temperature Coefficient LT1019I (–40°C to 85°C) ●3 10 5 20 ppm/°C
(Note 3) LT1019M (–55°C to 125°C) ●5 10 8 25 ppm/°C
∆V
OUT
Line Regulation (Note 4) (V
OUT
+ 1.5V) ≤ V
IN
≤ 40V 0.5 3 0.5 3 ppm/V
∆V
IN
●1.0 5 1.0 5 ppm/V
RR Ripple Rejection 50Hz ≤ f ≤ 400Hz 90 110 90 110 dB
●84 84 dB
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 15V, IOUT = 0 unless otherwise noted.
4
LT1019
1019fd
LTC1019A LTC1019
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
∆V
OUT
Load Regulation Series 0 ≤ I
OUT
≤ 10mA (Note 5) 0.02 0.05 0.02 0.05 mV/mA (Ω)
∆I
OUT
Mode (Notes 4, 5) ●0.08 0.08 mV/mA (Ω)
Load Regulation, 1mA ≤ I
SHUNT
≤ 10mA (Notes 5, 6)
Shunt Mode 2.5V, 4.5V, 5V ●0.1 0.4 0.1 0.4 mV/mA (Ω)
10V ●0.8 0.8 mV/mA (Ω)
Thermal Regulation (Note 7) ∆P = 200mW, t = 50ms 0.1 0.5 0.1 0.5 ppm/mW
I
Q
Quiescent Current 0.65 1.0 0.65 1.2 mA
Series Mode ●1.3 1.5 mA
Minimum Shunt Current (Note 8) ●0.5 0.8 0.5 0.8 mA
Minimum Input/Output I
OUT
≤ 1mA ●0.9 1.1 0.9 1.1 V
Voltage Differential I
OUT
= 10mA ●1.3 1.3 V
Trim Range LT1019-2.5 ±3.5 ±6±3.5 ±6%
LT1019-5 ±3.5 5, –13 ±3.5 5, –13 %
LT1019-10 ±3.5 5, –27 ±3.5 5, –27 %
I
SC
Short-Circuit Current 2V ≤ V
IN
≤ 35V 15 25 50 15 25 50 mA
Output Connected to GND ●10 10 mA
e
n
Output Voltage Noise 10Hz ≤ f ≤ 1kHz 2.5 4 2.5 4 ppm (RMS)
(Note 10) 0.1Hz ≤ f ≤ 10Hz 2.5 2.5 ppm (P-P)
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: These are high power conditions and are therefore guaranteed
only at temperatures equal to or below 70°C. Input is either floating, tied to
output or held higher than output.
Note 3: Output voltage drift is measured using the box method. Output
voltage is recorded at T
MIN
, 25°C and T
MAX
. The lowest of these three
readings is subtracted from the highest and the resultant difference is
divided by (T
MAX
– T
MIN
).
Note 4: Line regulation and load regulation are measured on a pulse basis
with low duty cycle. Effects due to die heating must be taken into account
separately. See thermal regulation and application section.
Note 5: Load regulation is measured at a point 1/8" below the base of the
package with Kelvin contacts.
Note 6: Shunt regulation is measured with the input floating. This
parameter is also guaranteed with the input connected (V
IN
– V
OUT
) > 1V,
0mA ≤ I
SINK
≤ 10mA. Shunt and sink current flow into the output.
Note 7: Thermal regulation is caused by die temperature gradients created
by load current or input voltage changes. This effect must be added to
normal line or load regulation.
Note 8: Minimum shunt current is measured with shunt voltage held
20mV below the value measured at 1mA shunt current.
Note 9: Minimum input/output voltage is measured by holding input
voltage 0.5V above the nominal output voltage, while measuring
V
IN
– V
OUT
.
Note 10: RMS noise is measured with a single pole highpass filter at 10Hz
and a 2-pole lowpass filter at 1kHz. The resulting output is full-wave
rectified and then integrated for a fixed period, making the final reading an
average as opposed to RMS. A correction factor of 1.1 is used to convert
from average to RMS, and a second correction of 0.88 is used to correct
the nonideal bandpass of the filters.
Note 11: If the part is stored outside of the specified temperature range,
the output may shift due to hysteresis.
ELECTRICAL C CHARA TERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 15V, IOUT = 0 unless otherwise noted.
5
LT1019
1019fd
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
Quiescent Current (LT1019-10)
Quiescent Current (LT1019-2.5)
INPUT VOLTAGE (V)
0
CURRENT (mA)
0.8
1.0
1.2
40
LT1019 • TPC01
0.6
0.4
010 20 30
0.2
1.6
1.4
35
515 25 45
125°C
25°C
–55°C
INPUT VOLTAGE (V)
0
CURRENT (mA)
0.8
1.0
1.2
40
LT1019 • TPC03
0.6
0.4
010 20 30
0.2
1.6
1.4
35
515 25 45
125°C
25°C
–55°C
Minimum Input/Output Voltage
Differential Load Regulation Ripple Rejection
INPUT/OUTPUT VOLTAGE (V)
0
0
OUTPUT CURRENT (mA)
2.5
7.5
10
0.4 0.8 1.0 1.8
LT1019 • TPC04
5.0
0.2 0.6 1.2 1.4 1.6
T
J
= 25°C
T
J
= –55°CT
J
= 125°C
OUTPUT CURENT (mA)
–10
OUTPUT CHANGE (mV)
1.0
2.0
6
LT1019 • TPC05
0
–1.0
–2.0 –6 –2 210
0.5
1.5
–0.5
–1.5
4
–8 –4 08
SINKING SOURCING
T
J
= 25°C
LT1019-10
LT1019-4.5/LT1019-5
LT1019-2.5
FREQUENCY (Hz)
60
INPUT VOLTAGE/OUTPUT VOLTAGE (dB)
70
90
110
120
10 1k 10k 1M
LT1019 • TPC06
50
100 100k
100
80
40
LT1019-10
LT1019-4.5
LT1019-5
LT1019-2.5
T
J
= 25°C
Shunt Mode Characteristics
(LT1019-10)
Shunt Mode Characteristics
(LT1019-5)
Shunt Mode Characteristics
(LT1019-2.5)
OUTPUT-TO-GROUND VOLTAGE (V)
0
0
CURRENT (mA)
0.1
0.3
0.4
0.5
1.0
0.7
1.0 2.0 2.5
LT1019 • TPC07
0.2
0.8
0.9
0.6
0.5 1.5 3.0 3.5 4.0
INPUT OPEN
T
J
= 125°C
T
J
= 25°C
T
J
= –55°C
OUTPUT-TO-GROUND VOLTAGE (V)
0
0
CURRENT (mA)
0.1
0.3
0.4
0.5
1.0
0.7
245
LT1019 • TPC08
0.2
0.8
0.9
0.6
13 678
INPUT OPEN
TJ = –55°C
TJ = 125°C
TJ = 25°C
INPUT VOLTAGE (V)
0
CURRENT (mA)
0.8
1.0
1.2
40
LT1019 • TPC02
0.6
0.4
010 20 30
0.2
1.6
1.4
35
515 25 45
125°C
25°C
–55°C
Quiescent Current
(LT1019-4.5/LT1019-5)
OUTPUT-TO-GROUND VOLTAGE (V)
0
0
CURRENT (mA)
0.1
0.3
0.4
0.5
1.0
0.7
4810
LT1019 • TPC09
0.2
0.8
0.9
0.6
26 12 14 16
INPUT OPEN
T
J
= –55°C
T
J
= 125°C
T
J
= 25°C
6
LT1019
1019fd
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
JUNCTION TEMPERATURE (°C)
–50
0.40
VOLTAGE (V)
0.45
0.55
0.60
0.65
0.90
0.75
050 75
LT1019 • TPC10
0.50
0.80
0.85
0.70
–25 25 100 125
Temp Pin Voltage
INPUT VOLTAGE (V)
0
–30
OUTPUT VOLTAGE CHANGE (µV)
–20
0
20
40
140
80
10 20 25
LT1019 • TPC11
–10
100
120
60
515 30 35 40
LT1019-2.5
LT1019-5
I
OUT
T
J
= 25°C
LT1019-10
Line Regulation
LT1019-2.5* Stability with
Output Capacitance
*LT1019-4.5/LT1019-5/LT1019-10 ARE STABLE
WITH ALL LOAD CAPACITANCE.
OUTPUT CURRENT (mA)
0.01
OUTPUT CAPACITOR (µF)
0.1
20 0 10
1019 G12
0.001
10 20
0.0001
1
10
15 5 5 15
SINK CURRENT SOURCE CURRENT
REGION OF POSSIBLE
INSTABILITY
–
+
V
IN
1.188V V
OUT
GND
R2
LT1019-4.5, LT1019-5,
LT1019-10 = 5k
LT1019-2.5 = 10k
R3
80k
TRIM
LT1019-2.5 = 11k
LT1019-4.5 = 13.9k
LT1019-5 = 16k
LT1019-10 = 37.1k
R1
LT1019 • BD
BLOCK DIAGRA
W
APPLICATIO S I FOR ATIO
UU W U
Line and Load Regulation
Line regulation on the LT1019 is nearly perfect. A 10V
change in input voltage causes a typical output shift of less
than 5ppm. Load regulation (sourcing current) is nearly as
good. A 5mA change in load current shifts output voltage
by only 100µV. These are
electrical
effects, measured with
low duty cycle pulses to eliminate heating effects. In real
world applications, the
thermal
effects of load and line
changes must be considered.
Two separate thermal effects are evident in monolithic
circuits. One is a gradient effect, where power dissipation
on the die creates temperature gradients. These gradients
can cause output voltage shifts
even if the overall tempera-
ture coefficient of the reference is zero
. The LT1019, unlike
previous references, specifies thermal regulation caused
by die temperature gradients.The specification is
0.5ppm/mW. To calculate the effect on output voltage,
simply multiply the
change
in device power dissipation by
7
LT1019
1019fd
the thermal regulation specification. Example: a 10V
device with a nominal input voltage of 15V and load
current of 5mA. Find the effect of an input voltage change
of 1V and a load current change of 2mA.
∆P (line change) = (∆V
IN
)(I
LOAD
) = (1V)(5mA) = 5mW
∆V
OUT
= (0.5ppm/mW)(5mW) = 2.5ppm
∆P (load change) = (∆I
LOAD
)(V
IN
– V
OUT
)
= (2mA)(5V) = 10mW
∆V
OUT
= (0.5ppm/mW)(10mW) = 5ppm
Even though these effects are small, they should be taken
into account in critical applications, especially where input
voltage or load current is high.
The second thermal effect is overall die temperature
change. The magnitude of this change is the product of
change in power dissipation times the thermal resistance
(θ
JA
) of the IC package ≅ (100°C/W to 150°C/W). The
effect on the reference output is calculated by multiplying
die temperature change by the temperature drift specifica-
tion of the reference. Example: same conditions as above
with θ
JA
= 150°C/W and an LT1019 with 20ppm/°C drift
specification.
∆P (line change) = 5mW
∆V
OUT
= (5mW)(150°C/W)(20ppm/°C)
= 15ppm
∆P (load change) = 10mW
∆V
OUT
= (10mW)(150°C/W)(20ppm/°C)
= 30ppm
These calculations show that thermally induced output
voltage variations can easily exceed the electrical effects.
In critical applications where shifts in power dissipation
are expected, a small clip-on heat sink can significantly
improve these effects by reducing overall die temperature
change. Alternately, an LT1019A can be used with four
times lower TC. If warm-up drift is of concern, these
measures will also help. With warm-up drift,
total
device
power dissipation must be considered. In the example
given, warm-up drift (worst case) is equal to:
Warm-up drift = [(V
IN
)(I
Q
) + (V
IN
– V
OUT
)(I
LOAD
)]
[(θ
JA
)(TC)]
with I
Q
(quiescent current) = 0.6mA,
Warm-up drift = [(15V)(0.6mA) + (5V)(5mA)]
[(150°C/W)(25ppm/°C)]
= 127.5ppm
Note that 74% of the warm-up drift is due to load current
times input/output differential. This emphasizes the
importance of keeping both these numbers low in critical
applications.
Note that line regulation is now affected by reference
output impedance. R1 should have a wattage rating high
enough to withstand full input voltage if output shorts
must be tolerated. Even with load currents below 10mA,
R1 can be used to reduce power dissipation in the LT1019
for lower warm-up drift, etc.
Output Trimming
Output voltage trimming on the LT1019 is nominally
accomplished with a potentiometer connected from out-
put to ground with the wiper tied to the trim pin. The
LT1019 was made compatible with existing references, so
the trim range is large: +6%, – 6% for the LT1019-2.5,
+5%, – 13% for the LT1019-5, and +5%, –27% for the
LT1019-10. This large trim range makes precision trim-
ming rather difficult. One solution is to insert resistors in
series with both ends of the potentiometer. This has the
disadvantage of potentially poor tracking between the
fixed resistors and the potentiometer. A second method of
reducing trim range is to insert a resistor in series with the
wiper of the potentiometer. This works well only for very
small trim range because of the mismatch in TCs between
the series resistor and the internal thin film resistors.
These film resistors can have a TC as high as 500ppm/°C.
That same TC is then transferred to the change in output
voltage: a 1% shift in output voltage causes a
(500ppm)(1%) = 5ppm/°C change in output voltage drift.
APPLICATIO S I FOR ATIO
UU W U
8
LT1019
1019fd
The worst-case error in initial output voltage for the
LT1019 is 0.2%, so a series resistor is satisfactory if the
output is simply trimmed to nominal value. The maximum
TC shift expected would be 1ppm/°C.
Using the Temp Pin
The LT1019 has a TEMP pin like several other bandgap
references. The voltage on this pin is directly propor-
tional to absolute temperature (PTAT) with a slope of
approximately 2.1mV/°C. Room temperature voltage is
therefore approximately (295°K)(2.1mV/°C) = 620mV.
This voltage varies with process parameters and should
not be used to measure absolute temperature, but
rather relative temperature changes. Previous bandgap
references have been very sensitive to any loading on
the TEMP pin because it is an integral part of the
reference “core” itself. The LT1019 “taps” the core at a
special point which has much less effect on the refer-
ence. The relationship between TEMP pin loading and
a change in reference output voltage is less than
0.05%/µA, about ten times improvement over previous
references.
Output Bypassing
The LT1019 is designed to be stable with a wide range of
load currents and output capacitors. The 4.5V, 5V, and
10V devices do not oscillate under any combination of
capacitance and load. The 2.5V device can oscillate when
sinking currents between 1mA and 6mA for load capaci-
tance between 400pF and 2µF (see Figure 1).
If output bypassing is desired to reduce high frequency
output impedance, keep in mind that loop phase margin is
significantly reduced for output capacitors between 500pF
and 1µF if the capacitor has low ESR (Effective Series
Resistance). This can make the output “ring” with tran-
Figure 1. Output Bypassing
sient loads. The best transient load response is obtained
by deliberately adding a resistor to increase ESR as shown
in Figure 1.
Use configuration (a) if DC voltage error cannot be com-
promised as load current changes. Use (b) if absolute
minimum peak perturbation at the load is needed. For best
transient response, the output can be loaded with ≥1mA
DC current.
APPLICATIO S I FOR ATIO
UU W U
TYPICAL APPLICATIO S
U
Wide Range Trim ≥ ±5% Narrow Trim Range (±0.2%)
VIN
2Ω TO 5Ω
LT1019
1019 F01
2µF
TANTALUM
VIN
LT1019
2µF TO 10µF
TANTALUM
2Ω TO 5Ω
(a) (b)
+
+
VOUT
R1
25k
OUT
IN
LT1019
TRIM
GND
VIN
1019 TA03
V
OUT
R1
100k
OUT
IN
LT1019
TRIM
GND
V
IN
1019 TA05
R2*
1.5M
*INCREASE TO 4.7M FOR LT1019A (±0.05%)
9
LT1019
1019fd
TYPICAL APPLICATIO S
U
Trimming LT1019-5 Output to 5.120V Trimming LT1019-10 Output to 10.240V
V
OUT
5k*
±1% TRIM
OUT
IN
LT1019-5
TRIM
GND
V
IN
1019 TA04
4.02k
1%
41.2k
1%
*LOW TC CERMET
V
OUT
5k*
±1% TRIM
OUT
IN
LT1019-10
TRIM
GND
V
IN
1019 TA06
4.02k
1%
90.9k
1%
*LOW TC CERMET
Output Current Boost with Current Limit
V
OUT
±11V COMPLIANCE
IN
OUT
LT1019-2.5
TRIM
GND
–
+
15V
11.5k
1%
5k*
8.25k
1%
2.49M
1%
I
OUT
= 1µA
Z
OUT
≥ 1011Ω
LT1012
*LOW TC CERMET, TRIM RANGE = ±1.5% 1019 TA07
LT1019
OUT
GND
IN
D1*
R1*
V+
R2*
–VREF AT 50mA–VIN
1019 TA10
*R1 = V+ – 5V
2mA , R2 = V– – VREF
1mA , D1 = VREF + 5V
Q1
2N2905
Negative Series Reference
Precision 1µA Current Source
R1
220Ω
IN
LT1019
OUT
GND
1019 TA08
2µF SOLID TANTALUM
ILOAD ≤ 100mA
8.2Ω
GLOWS IN
CURRENT LIMIT
(DO NOT OMIT)
LED
V+ ≥ (VOUT + 2.8V)
2N2905
10
LT1019
1019fd
SCHE ATIC DIAGRA
WW
TRIM R29
80k
R14
72k
R4
Q1
SHORT
FOR
2.5
Q4
R5
R7
1.6k
R8
2.5k
R9
3k
R36
82k
R25
1k
R37
2k
5k
R39
R11B
1k
R38
3.75k
R11A
1.9k
R26
3k
R28
9k
1k
R13
24.5k
R27
9k
R15
3k
R34
4k
R35
27k
R16
3k
R17
500Ω
R24
850Ω
Q32
Q29
Q33
R20
750Ω
R33
1k
R32
500Ω
R23
100Ω
R21
20Ω
V
IN
V
OUT
R31
22k
R19
15Ω
Q24
C3
Q22
Q11 Q12
GND
Q3
Q5 Q6A Q6B Q18
C4
Q19
Q35
Q14
Q16
Q15
Q21
Q23
Q34
Q25
Q30
Q31
Q27
Q20
R6
780Ω
Q2
Q36
Q38
Q37 Q10
R42
4k
R12
7.2k
R18
2k
Q7 Q13
Q26
Q28
Q8 Q9
R1
R2
R3
Q17
11
LT1019
1019fd
I
nformation furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTIO
U
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
H Package
8-Lead TO-5 Metal Can (0.200 PCD)
(LTC DWG # 05-08-1320)
N8 1098
0.100
(2.54)
BSC
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
0.020
(0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.125
(3.175)
MIN
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.035
–0.015
+0.889
–0.381
8.255
()
12 34
87 65
0.255 ± 0.015*
(6.477 ± 0.381)
0.400*
(10.160)
MAX
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.050
(1.270)
MAX
0.016 – 0.021**
(0.406 – 0.533)
0.010 – 0.045*
(0.254 – 1.143)
SEATING
PLANE
0.040
(1.016)
MAX 0.165 – 0.185
(4.191 – 4.699)
GAUGE
PLANE
REFERENCE
PLANE
0.500 – 0.750
(12.700 – 19.050)
0.305 – 0.335
(7.747 – 8.509)
0.335 – 0.370
(8.509 – 9.398)
DIA
0.200
(5.080)
TYP
0.027 – 0.045
(0.686 – 1.143)
0.028 – 0.034
(0.711 – 0.864)
0.110 – 0.160
(2.794 – 4.064)
INSULATING
STANDOFF
45°TYP
H8(TO-5) 0.200 PCD 1197
LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE
AND 0.045" BELOW THE REFERENCE PLANE
FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS 0.016 – 0.024
(0.406 – 0.610)
*
**
PIN 1
OBSOLETE
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0303
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
12
LT1019
1019fd
© LINEAR TECHNOLOGY CORPORATION 1993
5k*
OUT
LT1019-10
TRIM
GND
1019 TA09
5.76k
1%
59k
1%
1.2k
–15V
LTC1595
REF
I
OUT
FB
30pF
–
+
V
OUT
LT1007
*LOW TC CERMET, TRIM RANGE = ±1.5%
TYPICAL APPLICATION
U
Negative 10V Reference for CMOS DAC
LT/TP 0205 1K REV D • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1027 Precision 5V Reference Lowest TC, High Accuracy, Low Noise, Zener Based
LT1236 Precision Reference 5V and 10V Zener Based, 5ppm/°C, SO-8 Package
LT1460 Micropower Precision Series Reference Bandgap, 130µA Supply Current, 10ppm/°C, Available in SOT-23 Package
LT1634 Micropower Precision Shunt Reference Bandgap 0.05%, 10ppm/°C, 10µA Supply Current
LTC1798 Micropower Low Dropout Reference 0.15% Max, 6.5µA Supply Current
LT1461 Micropower Low Dropout Reference 3ppm/°C, 0.04%, 50µA Supply Current
