1. General description
The 74LVC1G08 provides one 2-input AND function.
Inputs ca n be driven from e ither 3.3 V or 5 V device s. This f eature allows the use of these
devices as translators in mixed 3.3 V and 5 V applications.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall
time.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the outpu t, pr eve nting the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
±24 mA output drive (VCC =3.0V)
CMOS low power consumption
Latch-up performance 250 m A
Direct interface with TTL levels
Inputs accept voltages up to 5 V
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115 -A ex ce ed s 200 V
Multiple package options
Specified from 40 °C to +85 °C and 40 °C to +125 °C
74LVC1G08
Single 2-input AND gate
Rev. 8 — 19 October 2010 Product Specification
74LVC1G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product Specification Rev. 8 — 19 October 2010 2 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lo wer left corner of the device, below the marking code.
5. Functional diagram
Tabl e 1. Ordering information
Type number Package
Temperature
range Name Description Version
74LVC1G08GW 40 °Cto+125°C TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm SOT353-1
74LVC1G08GV 40 °Cto+125°C SC-74A plastic surface-mounted package; 5 leads S OT753
74LVC1G08GM 40 °Cto+125°C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1 ×1.45 ×0.5 mm SOT886
74LVC1G08GF 40 °C to +125 °C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1 ×1×0.5 mm SOT891
74LVC1G08GN 40 °C to +125 °C XSON6 extremely thin small outline package; no leads;
6 terminals; body 0.9 ×1.0 ×0.35 mm SOT1115
74LVC1G08GS 40 °C to +125 °C XSON6 extremely thin small outline package; no leads;
6 terminals; body 1.0 ×1.0 ×0.35 mm SOT1202
Table 2. Marking
Type number Marking code[1]
74LVC1G08GW VE
74LVC1G08GV V08
74LVC1G08GM VE
74LVC1G08GF VE
74LVC1G08GN VE
74LVC1G08GS VE
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram
mna113
B
AY
2
14
mna114
2
4
&
1
mna22
1
A
B
Y
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Product Specification Rev. 8 — 19 October 2010 3 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
6. Pinning information
6.1 Pinning
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level
Fig 4. Pin configuration
SOT353-1 and SOT753 Fig 5. Pin co nfiguration SOT886 Fig 6. Pin configuration SOT891,
SOT1115 and SOT1202
74LVC1G08
BV
CC
A
GND Y
001aab638
1
2
3
5
4
74LVC1G08
A
001aab639
B
GND
n.c.
VCC
Y
Transparent top view
2
3
1
5
4
674LVC1G08
A
001aae978
B
GND
n.c.
VCC
Y
Transparent top view
2
3
1
5
4
6
Table 3. Pin description
Symbol Pin Description
SOT353-1, SOT753 SOT886, SOT891, SOT1115 and SOT1202
B 1 1 data input
A 2 2 data input
GND 3 3 ground (0 V)
Y 4 4 data output
n.c. - 5 not connected
VCC 5 6 supply voltage
Table 4. Function table[1]
Input Output
ABY
LLL
LHL
HLL
HHH
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Product Specification Rev. 8 — 19 October 2010 4 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 package: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0 V 50 - mA
VIinput voltage [1] 0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 V - ±50 mA
VOoutput voltage Active mode [1][2] 0.5 VCC + 0.5 V
Power-down mode [1][2] 0.5 +6.5 V
IOoutput current VO = 0 V to VCC -±50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Ptot total power dissipation Tamb = 40 °C to +125 °C[3] - 250 mW
Tstg storage temperature 65 +150 °C
Table 6. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 1.65 - 5.5 V
VIinput voltage 0 - 5.5 V
VOoutput voltage Active mode 0 - VCC V
VCC = 0 V; Power-down mode 0 - 5.5 V
Tamb ambient temp erature 40 - +125 °C
Δt/ΔV input transition rise and fall rate VCC = 1.65 V to 2.7 V - - 20 ns/V
VCC = 2.7 V to 5.5 V - - 10 ns/V
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Product Specification Rev. 8 — 19 October 2010 5 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
10. Static characteristics
[1] All typical values are measured at VCC = 3.3 V and Tamb =25°C.
Table 7. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 °C to +85 °C40 °C to +125 °CUnit
Min Typ[1] Max Min Max
VIH HIGH-level
input voltage VCC = 1.65 V to 1.95 V 0.65VCC - - 0.65VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VCC = 4.5 V to 5.5 V 0.7VCC - - 0.7VCC -V
VIL LOW-level
input voltage VCC = 1.65 V to 1.95 V - - 0.35VCC -0.35V
CC V
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3VCC -0.3V
CC V
VOH HIGH-level
output voltage VI=V
IH or VIL
IO=100 μA;
VCC = 1.65 V to 5.5 V VCC 0.1 - - VCC 0.1 - V
IO=4mA; V
CC = 1.65 V 1.2 - - 0.95 - V
IO=8mA; V
CC = 2.3 V 1.9 - - 1.7 - V
IO=12 mA; VCC = 2.7 V 2.2 - - 1.9 - V
IO=24 mA; VCC = 3.0 V 2.3 - - 2.0 - V
IO=32 mA; VCC = 4.5 V 3.8 - - 3.4 - V
VOL LOW-level
output voltage VI=V
IH or VIL
IO=100μA;
VCC = 1.65 V to 5.5 V - - 0.10 - 0.10 V
IO=4mA; V
CC = 1.65 V - - 0.45 - 0 .70 V
IO=8mA; V
CC = 2.3 V - - 0.30 - 0 .4 5 V
IO=12mA; V
CC = 2.7 V - - 0.40 - 0.60 V
IO=24mA; V
CC = 3.0 V - - 0.55 - 0.80 V
IO=32mA; V
CC = 4.5 V - - 0.55 - 0.80 V
IIinput leakage
current VI = 5.5 V or GND;
VCC =0Vto5.5V -±0.1 ±5-±100 μA
IOFF power-off
leakage
current
VCC = 0 V; VIor VO=5.5V - ±0.1 ±10 - ±200 μA
ICC supply current VI = 5.5 V or GND; IO = 0 A;
VCC = 1.65 V to 5.5 V -0.110 - 200μA
ΔICC additional
supply current per pin; VCC = 2.3 V to 5.5 V;
VI=V
CC 0.6 V; IO=0 A - 5 500 - 5000 μA
CIinput
capacitance VCC = 3.3 V; VI = GND to VCC -5- - -pF
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Product Specification Rev. 8 — 19 October 2010 6 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
11. Dynamic characteristics
[1] Typical values are measured at Tamb =25°C and VCC = 1.8 V, 2 . 5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLZ and tPZL.
[3] CPD is used to determine the dynamic power dissipation (PDin μW).
PD=C
PD ×VCC2×fi×N+(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL×VCC2×fo) = sum of outputs.
12. AC waveforms
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 8.
Symbol Parameter Conditions 40 °C to +85 °C40 °C to +125 °CUnit
Min Typ[1] Max Min Max
tpd propagation delay A, B to Y; see Figure 7 [2]
VCC = 1.65 V to 1.95 V 1.0 3.4 8.0 1.0 10.5 ns
VCC = 2.3 V to 2.7 V 0.5 2.2 5.5 0.5 7.0 ns
VCC = 2.7 V 0.5 2.5 5.5 0.5 7.0 ns
VCC = 3.0 V to 3.6 V 0.5 2.1 4.5 0.5 6.0 ns
VCC = 4.5 V to 5.5 V 0.5 1.7 4.0 0.5 5.5 ns
CPD power dissipation
capacitance VI = GND to VCC; VCC = 3.3 V [3] -16- - -pF
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7. The input A, B to output Y propagation delays
mna61
4
tPHL tPLH
VM
VM
A, B input
Y output
GND
VI
VOH
VOL
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Product Specification Rev. 8 — 19 October 2010 7 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
Table 9. Measurement points
Supply voltage Input Output
VCC VMVM
1.65 V to 1.95 V 0.5VCC 0.5VCC
2.3 V to 2.7 V 0.5VCC 0.5VCC
2.7V 1.5V 1.5V
3.0V to 3.6V 1.5V 1.5V
4.5 V to 5.5 V 0.5VCC 0.5VCC
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 8. Test circuit for measuring switching times
V
EXT
V
CC
V
I
V
O
mna61
6
DUT
CL
RT
RL
RL
G
Table 10. Test data
Supply voltage Input Load VEXT
VCC VItr=t
fCLRLtPLH, tPHL
1.65 V to 1.95 V VCC 2.0ns 30pF 1kΩopen
2.3 V to 2.7 V VCC 2.0ns 30pF 500Ωopen
2.7V 2.7V 2.5ns 50pF 500Ωopen
3.0V to 3.6V 2.7V 2.5ns 50pF 500Ωopen
4.5 V to 5.5 V VCC 2.5ns 50pF 500Ωopen
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Product Specification Rev. 8 — 19 October 2010 8 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
13. Package outline
Fig 9. Package outline SOT353-1 (TSSOP5)
UNIT A1
A
max. A2A3bpLHELpwyv
ceD(1) E(1) Z(1) θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.1
0
1.0
0.8
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15 0.65
e1
1.3 2.25
2.0
0.60
0.15
7°
0°
0.1 0.10.30.425
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
0.46
0.21
SOT353-1 MO-203 SC-88A 00-09-01
03-02-19
wM
bp
D
Z
e
e1
0.15
13
54
θ
A
A2
A1
Lp
(A3)
detail X
L
HE
E
c
vMA
X
A
y
1.5 3 mm0
scale
T
SSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-
1
1.1
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Product Specification Rev. 8 — 19 October 2010 9 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
Fig 10. Package outline SOT753 (SC-74A)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT753 SC-74A
wBM
bp
D
e
A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
45
Plastic surface-mounted package; 5 leads SOT75
3
UNIT A1bpcDEHELpQywv
mm 0.100
0.013
0.40
0.25
3.1
2.7
0.26
0.10
1.7
1.3
e
0.95 3.0
2.5 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.6
0.2
0.33
0.23
A
1.1
0.9
02-04-16
06-03-16
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Product Specification Rev. 8 — 19 October 2010 10 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
Fig 11. Package outline SOT886 (XSON6)
terminal 1
index area
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT886 MO-252
SOT88
6
04-07-15
04-07-22
DIMENSIONS (mm are the original dimensions)
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
D
E
e1
e
A1
b
L
L1
e1
0 1 2 mm
scale
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm 0.25
0.17
1.5
1.4
0.35
0.27
A1
max b E
1.05
0.95
Dee
1L
0.40
0.32
L1
0.50.6
A(1)
max
0.5 0.04
1
6
2
5
3
4
6×
(2)
4×
(2)
A
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Product Specification Rev. 8 — 19 October 2010 11 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
Fig 12. Package outline SOT891 (XSON6)
terminal 1
index area
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT891
SOT89
1
05-04-06
07-05-15
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
D
E
e1
e
A1
b
L
L1
e1
0 1 2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm 0.20
0.12
1.05
0.95
0.35
0.27
A1
max b E
1.05
0.95
Dee
1L
0.40
0.32
L1
0.350.55
A
max
0.5 0.04
1
6
2
5
3
4
A
6×
(1)
4×
(1)
Note
1. Can be visible in some manufacturing processes.
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Product Specification Rev. 8 — 19 October 2010 12 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
Fig 13. Package outline SOT1115 (XSON6)
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1115
sot1115_po
10-04-02
10-04-07
Unit
mm
max
nom
min
0.35 0.04 0.95
0.90
0.85
1.05
1.00
0.95
0.55 0.3
0.40
0.35
0.32
A(1)
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
X
SON6: extremely thin small outline package; no leads;
6
terminals; body 0.9 x 1.0 x 0.35 mm SOT111
5
A1b
0.20
0.15
0.12
DEee
1L
0.35
0.30
0.27
L1
0 0.5 1 mm
scale
terminal 1
index area
D
E
(4×)(2)
e1e1
e
L
L1
b
321
6 5 4
(6×)(2)
A1A
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Product Specification Rev. 8 — 19 October 2010 13 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
Fig 14. Package outline SOT1202 (XSON6)
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1202
sot1202_po
10-04-02
10-04-06
Unit
mm
max
nom
min
0.35 0.04 1.05
1.00
0.95
1.05
1.00
0.95
0.55 0.35
0.40
0.35
0.32
A(1)
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
X
SON6: extremely thin small outline package; no leads;
6
terminals; body 1.0 x 1.0 x 0.35 mm SOT120
2
A1b
0.20
0.15
0.12
DEee
1L
0.35
0.30
0.27
L1
0 0.5 1 mm
scale
terminal 1
index area
D
E
(4×)(2)
e1e1
e
L
b
123
L1
6 5 4
(6×)(2)
A
A1
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Product Specification Rev. 8 — 19 October 2010 14 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
14. Abbreviations
15. Revision history
Table 11. Abbreviations
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC1 G08 v.8 20101019 Product data sheet - 74LVC1G08 v.7
Modifications: Added type number 74LVC1G08GN (SOT1115 / XSON6 package).
Added type number 74LVC1G08GS (SOT1202 / XSON6 package).
74LVC1 G08 v.7 20070717 Product data sheet - 74LVC1G08 v.6
74LVC1 G08 v.6 20060619 Product data sheet - 74LVC1G08 v.5
74LVC1G08 v.5 20040915 Product specification - 74LVC1G08 v.4
74LVC1G08 v.4 20021002 Product specification - 74LVC1G08 v.3
74LVC1G08 v.3 20020517 Product specification - 74LVC1G08 v.2
74LVC1G08 v.2 20010406 Product specification - 74LVC1G08 v.1
74LVC1G08 v.1 20001121 Product specification - -
74LVC1G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product Specification Rev. 8 — 19 October 2010 15 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
16. Legal information
16.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semicond uctors sales
office. In case of any inconsistency or conf lict with the short data sheet, the
full data sheet shall pre va il.
Product specificat ionThe information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
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Limited warr a nty and liability — Information in this document is believed to
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representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
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changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
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damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party custo m er(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter m s and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
74LVC1G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product Specification Rev. 8 — 19 October 2010 16 of 17
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
16.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74LVC1G08
Single 2-input AND gate
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 October 2010
Document identifier: 74LVC1G08
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
18. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Functional description . . . . . . . . . . . . . . . . . . . 3
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
9 Recommended operating conditions. . . . . . . . 4
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
12 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 6
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
17 Contact information. . . . . . . . . . . . . . . . . . . . . 16
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Single 2-input AND gate
Products / Packages
Type number Orderable part number Ordering code (12NC) Product status Package Packing Marking ECCN
74LVC1G08GF 74LVC1G08GF,132 9352 824 07132 Volume production
SOT891
(XSON6)
Tape reel smd Standard Marking
74LVC1G08GM 74LVC1G08GM,115 9352 771 88115 Volume production
SOT886
(XSON6)
Tape reel smd Standard Marking
74LVC1G08GM 74LVC1G08GM,132 9352 771 88132 Volume production
SOT886
(XSON6)
Tape reel smd Standard Marking
74LVC1G08GN 74LVC1G08GN,132 9352 917 74132 Volume production
SOT1115
(XSON6)
Standard Marking
74LVC1G08GS 74LVC1G08GS,132 9352 928 97132 Volume production
SOT1202
(XSON6)
Standard Marking
74LVC1G08GV 74LVC1G08GV,125 9352 720 11125 Volume production
SOT753
(TSOP5)
Tape reel smd, Reverse Standard Marking
74LVC1G08GW 74LVC1G08GW,125 9352 683 80125 Volume production
SOT353-1
(TSSOP5)
Reel Pack, Reverse, Reverse Standard Marking
The variants in the table below are discontinued. See the table Discontinuation information at the bottom of this page for more information.
Type number Orderable part number Ordering code (12NC) Product status Package Packing Marking ECCN
74LVC1G08GM 74LVC1G08GM,125 9352 771 88125
Withdrawn
Replacement product
SOT886
(XSON6)
Reel Pack, Reverse, Reverse Standard Marking
74LVC1G08GW 74LVC1G08GW,165 9352 683 80165
Discontinued
Replacement product
SOT353-1
(TSSOP5)
Reel Pack, SMD, Large, Reverse, Reverse Standard Marking
Discontinuation information
Type number Ordering code (12NC) Last-time buy date Last-time delivery date Replacement product DN Notice Status Comments
74LVC1G08GM 935277188125 DN
74LVC1G08GW 935268380165 DN
English
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