SRDA3.3-4 through SRDA12-4 RailClamp Low Capacitance TVS Diode Array PROTECTION PRODUCTS - RailClamp Description Features RailClamps are surge rated diode arrays designed to protect high speed data interfaces. The SR series has been specifically designed to protect sensitive components which are connected to data and transmission lines from overvoltage caused by electrostatic discharge (ESD), electrical fast transients (EFT), and lightning. The unique design of the SRDA series devices incorporates surge rated, low capacitance steering diodes and a TVS diode in a single package. During transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground. The internal TVS diode prevents over-voltage on the power line, protecting any downstream components. The low capacitance array configuration allows the user to protect four high-speed data or transmission lines. The low inductance construction minimizes voltage overshoot during high current surges. Transient protection for high-speed data lines to Mechanical Characteristics JEDEC SO-8 package UL 497B listed Molding compound flammability rating: UL 94V-0 Marking : Part number, date code, logo Packaging : Tube or Tape and Reel per EIA 481 Applications Circuit Diagram USB Power and Data Line Protection T1/E1 secondary IC Side Protection T3/E3 secondary IC Side Protection HDSL, SDSL secondary IC Side Protection Video Line Protection Microcontroller Input Protection Base stations I2C Bus Protection Schematic and PIN Configuration REF1 I/O 1 IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) IEC 61000-4-5 (Lightning) 24A (8/20s) Array of surge rated diodes with internal TVS diode Protects four I/O lines and power supply line Low capacitance (<15pF) for high-speed interfaces Low operating and clamping voltages Solid-state technology I/O 2 I/O 3 I/O 4 I/O 1 1 8 REF 2 REF 1 2 7 I/O 4 REF 1 3 6 I/O 3 I/O 2 4 5 REF 2 REF2 S0-8 (Top View) Revision 8/15/06 1 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Absolute Maximum Rating Rating Symbol Value Units Peak Pulse Power (tp = 8/20s) Pp k 500 Watts Peak Forward Voltage (IF = 1A, tp=8/20s) VFP 1.5 V Lead Soldering Temperature TL 260 (10 sec.) C Operating Temperature TJ -55 to +125 C TSTG -55 to +150 C Storage Temperature Electrical Characteristics SR DA3.3-41 Parameter Reverse Stand-Off Voltage Symbol Conditions Minimum Typical VRWM Maximum Units 3.3 V Punch-Through Voltage V PT IPT = 2A 3.5 V Snap-Back Voltage VSB ISB = 50mA 2.8 V Reverse Leakage Current IR VRWM = 3.3V, T=25C 1 A Clamping Voltage VC IPP = 1A, tp = 8/20s 5.3 V Clamping Voltage VC IPP = 10A, tp = 8/20s 10 V Clamping Voltage VC IPP = 25A, tp = 8/20s 15 V Peak Pulse Current IP P tp = 8/20s 25 A Junction Capacitance Cj Between I/O pins and Ground VR = 0V, f = 1MHz 8 15 pF Between I/O pins VR = 0V, f = 1MHz 4 pF Note: (1) The SRDA3.3-4 is constructed using Semtech's proprietary EPD process technology. See applications section for more information. 2006 Semtech Corp. 2 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Electrical Characteristics (continued) SR DA05-4 Parameter Symbol Conditions Minimum Typical Maximum Units 5 V Reverse Stand-Off Voltage VRWM Reverse Breakdown Voltage V BR It = 1mA Reverse Leakage Current IR VRWM = 5V, T=25C 10 A Clamp ing Voltage VC IPP = 1A, tp = 8/20s 9.8 V Clamp ing Voltage VC IPP = 10A, tp = 8/20s 12 V Clamp ing Voltage VC IPP = 25A, tp = 8/20s 20 V Peak Pulse Current IP P tp = 8/20s 25 A Junction Cap acitance Cj Between I/O p ins and Ground VR = 0V, f = 1MHz 8 15 pF Between I/O p ins VR = 0V, f = 1MHz 4 6 V pF SR DA12-4 Parameter Symbol Conditions Minimum Typical Maximum Units 12 V Reverse Stand-Off Voltage VRWM Reverse Breakdown Voltage V BR It = 1mA Reverse Leakage Current IR VRWM = 12V, T=25C 1 A Clamp ing Voltage VC IPP = 1A, tp = 8/20s 17 V Clamp ing Voltage VC IPP = 10A, tp = 8/20s 20 V Clamp ing Voltage VC IPP = 20A, tp = 8/20s 25 V Peak Pulse Current IP P tp = 8/20s 20 A Junction Cap acitance Cj Between I/O p ins and Ground VR = 0V, f = 1MHz 8 15 pF Between I/O p ins VR = 0V, f = 1MHz 4 2006 Semtech Corp. 3 13.3 V pF www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time Power Derating Curve 10 110 % of Rated Power or PI P Peak Pulse Power - Ppk (kW) 100 1 0.1 90 80 70 60 50 40 30 20 10 0 0.01 0.1 1 10 100 0 1000 25 50 Pulse Waveform 20 Clamping Voltage - VC (V) 90 Percent of IPP 80 e -t 60 50 td = I PP /2 30 20 150 SRDA12-4 18 16 SRDA05-4 14 12 10 SRDA3.3-4 8 6 Waveform Parameters: tr = 8s td = 20s 4 2 10 0 0 0 5 10 15 20 25 30 0 5 T im e (s) 10 15 20 25 30 Peak Pulse Current - IPP (A) Variation of Capacitance vs. Reverse Voltage Forward Voltage vs. Forward Current 0 10 9 Forward Voltage - VF (V) -2 % Change in Capacitance 125 22 W aveform Parameters: tr = 8s td = 20s 100 40 100 Clamping Voltage vs. Peak Pulse Current 110 70 75 Ambient Temperature - TA (oC) Pulse Duration - tp (s) -4 -6 -8 -10 -12 8 7 6 5 4 3 Waveform Parameters: tr = 8s td = 20s 2 1 -14 0 1 2 3 4 5 0 6 0 Reverse Voltage - VR (V) 2006 Semtech Corp. 5 10 15 20 25 30 35 40 45 50 Forward Current - IF (A) 4 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Applications Information Device Connection Options for Protection of Four High-Speed Lines Data Line and Power Supply Protection Using Vcc as reference The SRDA TVS is designed to protect four data lines from transient overvoltages by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage (plus diode VF) the steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Data lines are connected at pins 1, 4, 6 and 7. The negative reference is connected at pins 5 and 8. These pins should be connected directly to a ground plane on the board for best results. The path length is kept as short as possible to minimize parasitic inductance. The positive reference is connected at pins 2 and 3. The options for connecting the positive reference are as follows: Data Line Protection with Bias and Power Supply Isolation Resistor 1. To protect data lines and the power line, connect pins 2 & 3 directly to the positive supply rail (VCC). In this configuration the data lines are referenced to the supply voltage. The internal TVS diode prevents over-voltage on the supply rail. 2. The SRDA can be isolated from the power supply by adding a series resistor between pins 2 and 3 and VCC. A value of 10k is recommended. The internal TVS and steering diodes remain biased, providing the advantage of lower capacitance. 3. In applications where no positive supply reference is available, or complete supply isolation is desired, the internal TVS may be used as the reference. In this case, pins 2 and 3 are not connected. The steering diodes will begin to conduct when the voltage on the protected line exceeds the working voltage of the TVS (plus one diode drop). ESD Protection With RailClamps Data Line Protection Using Internal TVS Diode as Reference RailClamps are optimized for ESD protection using the rail-to-rail topology. Along with good board layout, these devices virtually eliminate the disadvantages of using discrete components to implement this topology. Consider the situation shown in Figure 1 where discrete diodes or diode arrays are configured for rail-torail protection on a high speed line. During positive duration ESD events, the top diode will be forward biased when the voltage on the protected line exceeds the reference voltage plus the V drop of the diode. F For negative events, the bottom diode will be biased when the voltage exceeds the V of the diode. At first F 2006 Semtech Corp. 5 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Applications Information (continued) approximation, the clamping voltage due to the characteristics of the protection diodes is given by: V =V +V C CC F (for positive duration pulses) PIN V = Descriptions -V (for negative duration pulses) C F However, for fast rise time transient events, the effects of parasitic inductance must also be considered as shown in Figure 2. Therefore, the actual clamping voltage seen by the protected circuit will be: V = V + V + L di C CC F V = -V - L di C F G P ESD ESD /dt /dt (for positive duration pulses) Figure 1 - "Rail-To-Rail" Protection Topology (First Approximation) (for negative duration pulses) ESD current reaches a peak amplitude of 30A in 1ns for a level 4 ESD contact discharge per IEC 61000-4-2. Therefore, the voltage overshoot due to 1nH of series inductance is: V = L di P ESD /dt = 1X10-9 (30 / 1X10-9) = 30V Example: Consider a V = 5V, a typical V of 30V (at 30A) for the CC F steering diode and a series trace inductance of 10nH. The clamping voltage seen by the protected IC for a positive 8kV (30A) ESD pulse will be: Figure 2 - The Effects of Parasitic Inductance When Using Discrete Components to Implement Rail-To-Rail Protection V = 5V + 30V + (10nH X 30V/nH) = 335V C This does not take into account that the ESD current is directed into the supply rail, potentially damaging any components that are attached to that rail. Also note the high V of the discrete diode. It is not uncommon F for the V of discrete diodes to exceed the damage F threshold of the protected IC. This is due to the relatively small junction area of typical discrete components. It is also possible that the power dissipation capability of the discrete diode will be exceeded, thus destroying the device. The RailClamp is designed to overcome the inherent disadvantages of using discrete signal diodes for ESD suppression. The RailClamp's integrated TVS diode helps to mitigate the effects of parasitic inductance in the power supply connection. During an ESD event, 2006 Semtech Corp. Figure 3 - Rail-To-Rail Protection Using RailClamp TVS Arrays 6 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Applications Information (continued) the current will be directed through the integrated TVS diode to ground. The total clamping voltage seen by the protected IC due to this path will be: technology, the SRDA3.3-4 can effectively operate at 3.3V while maintaining excellent electrical characteristics. V =V The IV characteristic curve of the EPD device is shown in Figure 4. The device represents a high impedance to the circuit up to the working voltage (VRWM). During a transient event, the device will begin to conduct as it is biased in the reverse direction. When the punchthrough voltage (VPT) is exceeded, the device enters a low impedance state, diverting the transient current away from the protected circuit. When the device is conducting current, it will exhibit a slight "snap-back" or negative resistance characteristic due to its structure. This must be considered when connecting the device to a power supply rail. To return to a non-conducting state, the current through the device must fall below the snap-back current (approximately < 50mA) to allow it to travel back through the negative resistance region. If this is a concern, a 10k current limiting resistor can be placed between the supply rail and the positive reference pins (2 and 3) to prevent device latch-up. C F(RailClamp) +V TVS This is given in the data sheet as the rated clamping voltage of the device. For an SRDA05-4 the typical clamping voltage is <16V at I =30A. The diodes PP internal to the RailClamp are low capacitance, fast switching devices that are rated to handle high transient currents and maintain excellent forward voltage characteristics. Using the RailClamp does not negate the need for good board layout. All other inductive paths must be considered. The connection between the positive supply and the SRDA and from the ground plane to the SRDA must be kept as short as possible. The path between the SRDA and the protected line must also be minimized. The protected lines should be routed directly to the SRDA. Placement of the SRDA on the PC board is also critical for effective ESD protection. The device should be placed as close as possible to the input connector. The reason for this is twofold. First, inductance resists change in current flow. If a significant inductance exists between the connector and the TVS, the ESD current will be directed elsewhere (lower resistance path) in the system. Second, the effects of radiated emissions and transient coupling can cause upset to other areas of the board even if there is no direct path to the connector. By placing the TVS close to the connector it will divert the ESD current immediately and absorb the ESD energy before it can be coupled into nearby traces. RailClamp is a registered trademark of Semtech corporation IPP ISB IPT VBRR IR VRWM VSB VPT VC IBRR (Reference Semtech application note SI99-01 for further information on board layout) SRDA3.3-4 EPD TVS Characteristics The internal TVS of the SRDA3.3-4 is constructed using Semtech's proprietary EPD technology. The structure of the EPD TVS is vastly different from the traditional pn-junction devices that are internal to the SRDA05-4 and SRDA12-4 devices. At voltages below 5V, high leakage current and junction capacitance render conventional avalanche technology impractical for most applications. However, by utilizing the EPD 2006 Semtech Corp. Figure 4 - EPD TVS IV Characteristic Curve 7 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of 100% tin solder with large grains. Since the solder volume on the leads is small compared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint. 2006 Semtech Corp. 8 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Typical Applications Universal Serial Bus ESD Protection T1/E1 Interface Protection 2006 Semtech Corp. 9 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Applications Information - Spice Model Pin 2 & 3 Pin 1, 4, 6, or 7 0.6 nH Pin 5 & 8 SRDA3.3-4 Spice Model SRDA3.3-4 Spice Parameters 2006 Semtech Corp. Parameter Unit D1 (LCRD) D2 (LCRD) D3 (T VS) IS Amp 2.092E-11 2.156E-12 6.09E-14 BV Volt 680 240 3.54 VJ Volt 0.62 0 .6 4 13.8 RS O hm 0.180 0.155 0.220 IBV Amp 1 E -3 1E-3 10E-3 CJO Farad 5.2E-12 6.2E-12 4 5 E -1 2 TT sec 2.541E-9 2.541E-9 2.541E-9 M -- 0 .0 5 8 0 .0 5 8 0.111 N -- 1.1 1.1 1.1 EG eV 1.11 1.11 1.11 10 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Applications Information - Spice Model Pin 3 Pin 1 0.6 nH Pin 8 SRDA05-4 & SRDA12-4 Spice Model SRDA05-4 & SRDA12-4 Spice Parameters Parameter Unit D1 (LCRD) D2 (LCRD) SRDA05-4 D3 (T VS) SRDA12-4 D3 (T VS) IS Amp 2.092E-11 2.156E-12 1.4E-14 1.43E-14 BV Volt 680 240 6.70 15 VJ Volt 0.62 0.64 .56 .78 RS O hm 0.180 0.155 0.56 0.40 IBV Amp 1.0 E-3 1.0 E-3 1.0 E-3 1.0 E-3 CJO Farad 5.2E-12 6.2E-12 307E-12 71E-12 TT sec 2.541E-9 2.541E-.9 2.541E-9 2.541E-9 M -- 0.058 0.058 0.247 0.246 N -- 1.1 1.1 1.1 1.1 EG eV 1.11 1.11 1.11 1.11 2006 Semtech Corp. 11 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Outline Drawing - SO-8 A h D e N h H 2X E/2 E1 E 1 0.25 L (L1) e/2 DETAIL B 01 A D aaa C SEATING PLANE A2 A C SEE DETAIL A .053 .069 .010 .004 .065 .049 .012 .020 .010 .007 .189 .193 .197 .150 .154 .157 .236 BSC .050 BSC .010 .020 .016 .028 .041 (.041) 8 8 0 .004 .010 .008 1.35 1.75 0.10 0.25 1.25 1.65 0.31 0.51 0.17 0.25 4.80 4.90 5.00 3.80 3.90 4.00 6.00 BSC 1.27 BSC 0.25 0.50 0.40 0.72 1.04 (1.04) 8 0 8 0.10 0.25 0.20 SIDE VIEW A1 bxN bbb DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX A A1 A2 b c D E1 E e h L L1 N 01 aaa bbb ccc c GAGE PLANE 2 ccc C 2X N/2 TIPS DIM C A-B D NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-012, VARIATION AA. Land Pattern - SO-8 X DIM (C) G C G P X Y Z Z Y DIMENSIONS INCHES MILLIMETERS (.205) .118 .050 .024 .087 .291 (5.20) 3.00 1.27 0.60 2.20 7.40 P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. REFERENCE IPC-SM-782A, RLP NO. 300A. 2006 Semtech Corp. 12 www.semtech.com SRDA3.3-4 through SRDA12-4 PROTECTION PRODUCTS Ordering Information Part Number Lead Finish Qty/Pkg Reel Size SRDA3.3-4.TB SnPb 500/Reel 7 Inch SRDA05-4.TB SnPb 500/Reel 7 Inch SRDA12-4.TB SnPb 500/Reel 7 Inch SRDA3.3-4.TBT Pb free 500/Reel 7 Inch SRDA05-4.TBT Pb free 500/Reel 7 Inch SRDA12-4.TBT Pb free 500/Reel 7 Inch SRDA3.3-4 SnPb 95/Tube N/A SRDA05-4 SnPb 95/Tube N/A SRDA12-4 SnPb 95/Tube N/A SRDA3.3-4.T Pb free 95/Tube N/A SRDA05-4.T Pb free 95/Tube N/A SRDA12-4.T Pb free 95/Tube N/A Note: Lead-free devices are RoHS/WEEE Compliant Contact Information for Semtech International AG Taiw an Branch Korea Branch Tel: 886-2-2748-3380 Fax: 886-2-2748-3390 Semtech Sw itz erland GmbH Japan Branch Tel: 81-3-6408-0950 Fax: 81-3-6408-0951 Tel: 82-2-527-4377 Fax: 82-2-527-4376 Semtech Limited (U.K.) Tel: 44-1794-527-600 Fax: 44-1794-527-601 Tel: 86-21-6391-0830 Fax: 86-21-6391-0831 Semtech France SARL Tel: 33-(0)169-28-22-00 Fax: 33-(0)169-28-12-98 Semtech International AG is a wholly-owned subsidiary of Semtech Corporation, which has its headquarters in the U.S.A. Semtech Germany GmbH Tel: 49-(0)8161-140-123 Fax: 49-(0)8161-140-124 2006 Semtech Corp. 13 Shanghai Office www.semtech.com