FEATURES
DGAIN BANDWIDTH: 50MHz
DZERO−CROSSOVER DISTORTIO N TOPOLOG Y:
− Excellent THD+N: 0.0004%
− CMRR: 100dB (min)
− Rail-to-Rail Input and Output
− Input 100mV Beyond Supply Rail
DLOW NOISE: 4.5nV//Hz at 100kHz
DSLEW RATE: 25V/µs
DFAST SETTLING: 0.3µs to 0.01%
DPRECISION:
− Low Offset: 100µV
− Low Input Bias Current: 0.2pA
D2.2V TO 5.5V OPERATION
APPLICATIONS
DSIGNAL CONDITIONING
DDATA ACQUISITION
DPROCESS CONTROL
DACTIVE FILTERS
DTEST EQUIPMENT
DAUDIO
DWIDEBAND AMPLIFIERS
DESCRIPTION
The OPAx365 zer∅-crossover series, rail-to-rail, high-
performance, CMOS operational amplifiers are opti-
mized for very low voltage, single-supply applications.
Rail-to-rail input/output, low-noise (4.5nV/√Hz) and
high-speed operation (50MHz Gain Bandwidth) make
these devices ideal for driving sampling analog-to-digi-
tal converters (ADCs). Applications incude audio, sig-
nal conditioning, and sensor amplification. The OPA365
family of op amps are also well-suited for cell phone
power amplifier control loops.
Special features include an excellent common-mode
rejection ratio (CMRR), no input stage crossover distor-
tion, high input impedance, and rail-to-rail input and out-
put swing. The input common-mode range includes
both the negative and positive supplies. The output volt-
age swing is within 10mV of the rails.
The OPA365 (single version) is available in the micro-
SIZE SOT23-5 and SO-8 packages. The OPA2365
(dual version) is offered in the SO-8 package. All ver-
sions are specified for operation from −40°C to +125°C.
Single and dual versions have identical specifications
for maximum design flexibility.
Fast Settling Peak Detector
VIN
VOUT
C2
2.2pF
R2
2kΩ
SD1
BAT17
C1
10nF
R1
7.5Ω
V−
V+
U1 U2
V−
V+
OPA365 OPA365
OPA365
OPA2365
SBOS365D − JUNE 2006 − REVISED JUNE 2009
50MHz, Low-Distortion, High CMRR,
RRI/O, Single-Supply
OPERATIONAL AMPLIFIER
! !
www.ti.com
Copyright 2006−2009, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
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2
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage +5.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Input Terminals, Voltage(2) (V−) −0.5V to (V+) + 0.5V. . . .
Signal Input Terminals, Current(2) ±10mA. . . . . . . . . . . . . . . . . . . .
Output Short-Circuit(3) Continuous. . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature −40°C to +150°C. . . . . . . . . . . . . . . . . . . . .
Storage Temperature −65°C to +150°C. . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Rating
Human Body Model 4000V. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charged Device Model 1000V. . . . . . . . . . . . . . . . . . . . . . . . . . .
Machine Model 400V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure t o absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, an d
functional operation of the device at these or any other conditions
beyond those specified is not supported.
(2) Input terminals are diode-clamped to the power-supply rails.
Input signals that can swing more than 0.5V beyond the supply
rails should be current limited to 10mA or less.
(3) Short-circuit to ground, one amplifier per package.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING
SOT23-5
DBV
OAVQ
OPA365
SOT23-5
DBV
OAVQ
OPA365
SO-8
D
O365A
OPA365
SO-8
D
O365A
OPA2365
SO-8
D
O2365A
OPA2365
SO-8
D
O2365A
OPA2365
SO-8
D
O2365A
OPA2365
SO-8
D
O2365A
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
PIN CONFIGURATIONS
(1) NC denotes no internal connection.
1
2
3
5
4
V+
−IN
VOUT
V−
+IN
OPA365
SOT23−5
1
2
3
4
8
7
6
5
NC(1)
V+
VOUT
NC(1)
NC(1)
−IN
+IN
V−
OPA365
SO−8
Top View
1
2
3
4
8
7
6
5
V+
VOUTB
−IN B
+IN B
VOUTA
−IN A
+IN A
V−
OPA2365
SO−8
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ELECTRICAL CHARACTERISTICS: VS = +2.2V to +5.5V
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OPAx365
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLT AGE
Input Offset Voltage VOS 100 200 µV
Drift dVOS/dT 1 µV/°C
vs Power Supply PSRR VS = +2.2V to +5.5V 10 100 µV/V
Channel Separation, dc 0.2 µV/V
INPUT BIAS CURRENT
Input Bias Current IB±0.2 ±10 pA
over Temperature See Typical Characteristics
Input Offset Current IOS ±0.2 ±10 pA
NOISE
Input Voltage Noise, f = 0.1Hz to 10Hz en5µVPP
Input Voltage Noise Density , f = 100kHz en4.5 nV/√Hz
Input Current Noise Density, f = 10kHz in4 fA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM (V−) − 0.1 (V+) + 0.1 V
Common-Mode Rejection Ratio CMRR (V−) − 0.1V 3 VCM 3 (V+) + 0.1V 100 120 dB
INPUT CAPACITANCE
Differential 6 pF
Common-Mode 2 pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain AOL RL = 10kΩ, 100mV < VO < (V+) − 100mV 100 120 dB
RL = 600Ω, 200mV < VO < (V+) − 200mV 100 120 dB
RL = 600Ω, 200mV < VO < (V+) − 200mV 94 dB
FREQUENCY RESPONSE VS = 5V
Gain-Bandwidth Product GBW 50 MHz
Slew Rate SR G = +1 25 V/µs
Settling Time, 0.1% tS4V Step, G = +1 200 ns
0.01% 4V Step, G = +1 300 ns
Overload Recovery Time VIN x Gain > VS< 0.1 µs
Total Harmonic Distortion + Noise(1) THD+N RL = 600Ω, VO = 4VPP, G = +1, f = 1kHz 0.0004 %
OUTPUT
Voltage Output Swing from Rail
over Temperature RL = 10kΩ, VS = 5.5V 10 20 mV
Short-Circuit Current ISC ±65 mA
Capacitive Load Drive CLSee T ypical Characteristics
Open-Loop Output Impedance f = 1MHz, IO = 0 30 Ω
POWER SUPPLY
Specified Voltage Range VS2.2 5.5 V
Quiescent Current Per Amplifier IQIO = 0 4.6 5 mA
over Temperature 5 mA
TEMPERATURE RANGE
Specified Range −40 +125 °C
Thermal Resistance qJA °C/W
SOT23-5 200 °C/W
SO-8 150 °C/W
(1) 3rd-order filter; bandwidth 80kHz at −3dB.
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TYPICAL CHARACTERISTICS
At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted.
OPEN−LOOP GAIN/PHASE vs FREQUENCY
Voltage Gain (dB)
140
120
100
80
60
40
20
0
−20
Phase (_)
0
−45
−90
−135
−180
1M 10M100k10k1k10010
Frequency (Hz)
100M
Phase
Gain
POWER SUPPLY AND COMMON−MODE
REJECTION RATIO vs FREQUENCY
PSRR, CMRR (dB)
140
120
100
80
60
40
20
01M 10M100k10k1k10010
Frequency (Hz)
100M
CMRR
PSRR
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
VS=5.5V
Offset Voltage (µV)
Population
−200
−180
−160
−140
−120
−100
−80
−60
−40
−20
0
20
40
60
80
100
120
140
160
180
200
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Offset Voltage Drift (µV/_C)
Population
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
INPUT BIAS CURRENT vs TEMPERATURE
Input Bias (pA)
1000
900
800
700
600
500
400
300
200
100
0−25
−50
Temperature (_C)
0 25 50 75 100 125
500
400
300
200
100
0
−25
IB(pA)
−0.5 05.5
VCM (V)
INPUT BIAS CURRENT vs COMMON−MODE VOLTAGE
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VCM Specified Range
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted.
OPA365 OUTPUT VOLTAGE
vs OUTPUT CURRENT
Output Voltage (V)
3
2
1
0
−1
−2
−3100
Output Current (mA)
100
20 30 40 50 60 70 80 90
+125_C+25_C
−40_C−40_C
+125_C
+25_C
VS=±1.1V
VS=±2.75V
OPA2365 OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
Output Voltage (V)
3
2
1
0
−1
−2
−3100
Output Current (mA)
100
20 30 40 50 60 70 80 90
+125_C+25_C−40_C
−40_C
+125_C
+25_C
VS=±1.1V
VS=±2.75V
SHORT−CIRCUIT CURRENT vs TEMPERATURE
Short−Circuit Current (mA)
70
60
50
40
30
20
10
0
−10
−20
−30
−40
−50
−60
−70
−80 −25
−50
Temperature (_C)
125
0255075100
Dual
VS=±2.75V
Single
QUIESCENT CURRENT vs SUPPLY VOLTAGE
Quiescent Current (mA)
4.75
4.50
4.25
4.00
3.75 2.52.2
Supply Voltage (V)
5.5
3.0 3.5 4.0 4.5 5.0
QUIESCENT CURRENT vs TEMPERATURE
Quiescent Current (mA)
4.80
4.74
4.68
4.62
4.56
4.50 −25
−50
Temperature (_C)
1250255075100
0.1Hz to 10Hz
INPUT VOLTAGE NOISE
2µV/div
1s/div
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted.
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
THD+N (%)
0.01
0.001
0.0001 10k1k10010
Frequency (Hz)
20k
G=10,R
L= 600ΩVO=1V
RMS
VO=1V
RMS
VO=1.448V
RMS
G=+1,R
L=600
Ω
INPUTVOLTAGE NOISE SPECTRAL DENSITY
Voltage Noise (nV/√Hz)
1k
100
10
110k1k10010
Frequency (Hz)
100k
OVERSHOOT vs CAPACITIVE LOAD
Overshoot (%)
60
50
40
30
20
10
00
Capacitive Load (pF)
1k100
G=+1
G=−1
G=+10
G=−10
SMALL−SIGNAL STEP RESPONSE
Output Voltage (50mV/div)
Time (50ns/div)
G=1
RL=10k
Ω
VS=±2.5
LARGE−SIGNAL STEP RESPONSE
Output Voltage (1V/div)
Time (250ns/div)
G=1
RL=10k
Ω
VS=±2.5
SMALL−SIGNAL STEP RESPONSE
Output Voltage (50mV/div)
Time (50ns/div)
G=1
RL=600
Ω
VS=±2.5
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted.
LARGE−SIGNAL STEP RESPONSE
Output Voltage (1V/div)
Time (250ns/div)
G=1
RL=600
Ω
VS=±2.5
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APPLICATIONS INFORMATION
OPERATING CHARACTERISTICS
The OPA365 amplifier parameters are fully specified
from +2.2V to +5.5V. Many of the specifications apply
from −4 0 °C to +125°C. Parameters that can exhibit sig-
nificant variance with regard to operating voltage or
temperature are presented in the Typical Characteris-
tics.
GENERAL LAYOUT GUIDELINES
The OPA365 is a wideband amplifier. To realize the full
operational performance of the device, good high-fre-
quency printed circuit board (PCB) layout practices are
required. Low-loss, 0.1µF bypass capacitors must be
connected between each supply pin and ground as
close to the device as possible. The bypass capacitor
traces should be designed for minimum inductance.
BASIC AMPLIFIER CONFIGURATIONS
As with other single-supply op amps, the OPA365 may
be operated with either a single supply or dual supplies.
A typical dual-supply connection is shown in Figure 1,
which is accompanied by a single-supply connection.
The OPA365 is configured as a basic inverting amplifier
with a gain of −10V/V. The dual-supply connection has
an output voltage centered on zero, while the single−
supply connection has an output centered on the com-
mon-mode voltage VCM. For the circuit shown, this volt-
age is 1.5V, but may be any value within the common-
mode input voltage range. The OPA365 VCM range
extends 100mV beyond the power-supply rails.
−1.5V
V−
C1
100nF
C1
100nF
C2
100nF
R2
10kΩ
R2
10kΩ
R1
1kΩ
R1
1kΩ
V+
+1.5V
VOUT
VIN
a) Dual Supply Connection
V−
V+
+3V
VOUT
VIN
VCM =1.5V
b) Single−Supply Connection
OPA365
OPA365
Figure 1. Basic Circuit Connections
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Figure 2 shows a single-supply, electret microphone
application w h e r e V CM is provided by a resistive divider.
The divider also provides the bias voltage for the elec-
tret element.
INPUT AND ESD PROTECTION
The OPA365 incorporates internal electrostatic dis-
charge (ESD) protection circuits on all pins. In the case
of input and output pins, this protection primarily con-
sists of current steering diodes connected between the
input and power-supply pins. These ESD protection
diodes also provide in-circuit, input overdrive protec-
tion, provided that the current is limited to 10mA as
stated in the Absolute Maximum Ratings. Figure 3
shows how a series input resistor may be added to the
driven input to limit the input current. The added resistor
contributes thermal noise at the amplifier input and its
value should be kept to the minimum in noise-sensitive
applications.
RAIL-TO-RAIL INPUT
The OPA365 product family features true rail-to-rail in-
put operation, with supply voltages as low as ±1.1V
(2.2V). A unique zer∅-crossover input topology elimi-
nates the input offset transition region typical of many
rail-to-rail, complementary stage operational amplifiers.
This topology also allows the OPA365 to provide superi-
or common-mode performance over the entire input
range, which extends 100mV beyond both power-sup-
ply rails, as shown in Figure 4. When driving ADCs, the
highly linear VCM range of the OPA365 assures that the
op amp/ADC system linearity performance is not com-
promised.
3.3V
49kΩ
VOUT
OPA365
Clean 3.3V Supply
1µF
4kΩ
6kΩ
Electret
Microphone 5kΩ
Figure 2. Microphone Preamplifier
5kΩ
OPA365
10mA max
V+
VIN
VOUT
IOVERLOAD
Figure 3. Input Current Protection
OFFSET VOLTAGE vs COMMON−MODE VOLTAGE
VOS (µV)
200
150
100
50
0
−50
−150
−100
−200 −2
−3
Common−Mode Voltage (V)
3
−10 1 2
VS=±2.75V
OPA365
Competitors
Figure 4. OPA365 has Linear Offset Over the
Entire Common-Mode Range
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A simplified schematic illustrating the rail-to-rail input
circuitry is shown in Figure 5.
CAPACITIVE LOADS
The OPA365 may be used in applications where driving
a capacitive load is required. As with all op amps, there
may be specific instances where the OPA365 can be-
come unstable, leading to oscillation. The particular op
amp circuit configuration, layout, gain and output load-
ing are some of the factors to consider when establish-
ing whether an amplifier will be stable in operation. An
op amp in the unity-gain (+1V/V) buffer configuration
and driving a capacitive load exhibits a greater tenden-
cy to be unstable than an amplifier operated at a higher
noise gain. The capacitive load, in conjunction with the
op amp output resistance, creates a pole within the
feedback loop that degrades the phase margin. The
degradation of the phase margin increases as the ca-
pacitive loading increases.
When operating in the unity-gain configuration, the
OPA365 remains stable with a pure capacitive load up
to approximately 1nF. The equivalent series resistance
(ESR) of some very large capacitors (CL > 1 µF) is suf fi-
cient to alter the phase characteristics in the feedback
loop such that the amplifier remains stable. Increasing
the amplifier closed-loop gain allows the amplifier to
drive increasingly larger capacitance. This increased
capability is evident when observing the overshoot re-
sponse of the amplifier at higher voltage gains. See the
typical characteristic graph, Small-Signal Overshoot
vs. Capacitive Load.
One technique for increasing the capacitive load drive
capability o f the amplifier operating in unity gain is to in -
sert a small resistor, typically 10Ω to 20Ω, in series with
the output; see Figure 6. This resistor significantly re-
duces the overshoot and ringing associated with large
capacitive loads. A possible problem with this technique
is that a voltage divider is created with the added series
resistor and any resistor connected in parallel with the
capacitive load. The voltage divider introduces a gain
error at the output that reduces the output swing. The
error contributed by the voltage divider may be insignifi-
cant. For instance, with a load resistance, RL = 10kΩ,
and R S = 20Ω, the gain error is only about 0.2%. Howev-
er, when RL is decreased to 600Ω, which the OPA365
is able to drive, the error increases to 7.5%.
Regulated
Charge Pump
VOUT =V
CC +1.8V
Patent Pending
Very Low Ripple
Topology
IBIAS
VCC +1.8V
IBIAS
IBIAS
IBIAS
VS
IBIAS
VOUT
VIN−VIN+
Figure 5. Simplified Schematic
10Ωto
20Ω
V+
VIN
VOUT
RS
RLCL
OPA365
Figure 6. Improving Capacitive Load Drive
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ACHIEVING AN OUTPUT LEVEL OF
ZERO VOLTS (0V)
Certain single-supply applications require the op amp
output to swing from 0V to a positive full-scale voltage
and have high accuracy. An example is an op amp
employed to drive a single-supply ADC having an input
range from 0V to +5V. Rail-to-rail output amplifiers with
very light output loading may achieve an output level
within millivolts of 0V (or +VS at the high end), but not
0V. Furthermore, the deviation from 0V only becomes
greater as the load current required increases. This in-
creased deviation is a result of limitations of the CMOS
output stage.
When a pull-down resistor is connected from the ampli-
fier output to a negative voltage source, the OPA365
can achieve an output level of 0V, and even a few milli-
volts below 0V. Below this limit, nonlinearity and limiting
conditions become evident. Figure 7 illustrates a circuit
using this technique.
A pull-down current of approximately 500µA is required
when OPA365 is connected as a unity-gain buffer.
A practical termination voltage (VNEG) is −5V, but
other convenient negative voltages also may be
used. The pull-down resistor RL is calculated from
RL = [(VO −VNEG)/(500µA)]. Using a minimum output
voltage (VO) of 0V, RL = [0V−(−5V)]/(500µA)] = 10kΩ.
Keep in mind that lower termination voltages result in
smaller pull-down resistors that load the output during
positive output voltage excursions.
Note that this technique does not work with all op amps
and should only be applied to op amps such as the
OPA365 that have been specifically designed to oper-
ate in this manner. Also, operating the OPA365 output
at 0V changes the output stage operating conditions,
resulting in somewhat lower open-loop gain and band-
width. Keep these precautions in mind when driving a
capacitive load because these conditions can affect cir-
cuit transient response and stability.
ACTIVE FILTERING
The OPA365 is well-suited for active filter applications
requiring a wide bandwidth, fast slew rate, low-noise,
single-supply operational amplifier. Figure 8 shows a
500kHz, 2nd-order, low-pass filter utilizing the multiple−
feedback (MFB) topology. The components have been
selected to provide a maximally-flat Butterworth
response. Beyond the cutoff frequency, roll-off is
−40dB/dec. The Butterworth response is ideal for ap-
plications requiring predictable gain characteristics
such as the anti-aliasing filter used ahead of an ADC.
VOUT
RP=10k
Ω
500µA
OPA365
VIN
V+ = +5V
Op Amps
Negative
Supply
Grounded
−V=−5V
(Additional
Negative Supply)
Figure 7. Swing-to-Ground
C1
1nF
C2
150pF
R3
549Ω
R1
549ΩR2
1.24kΩ
V+
VOUT
VIN
V−
OPA365
Figure 8. Second-Order Butterworth 500kHz
Low-Pass Filter
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One point to observe when considering the MFB filter
is that the output is inverted, relative to the input. If this
inversion is not required, or not desired, a noninverting
output can be achieved through one of these options:
1) adding an inverting amplifier; 2) adding an additional
2nd-order MFB stage; or 3) using a noninverting filter
topology such as the Sallen-Key (shown in Figure 9).
MFB and Sallen-Key, low-pass and high-pass filter syn-
thesis is quickly accomplished using TI’s FilterPro pro-
gram. This software is available as a free download at
www.ti.com.
DRIVING AN ANALOG-TO-DIGITAL CONVERTER
Very wide common-mode input range, rail-to-rail input
and output voltage capability and high speed make the
OPA365 an ideal driver for modern ADCs. Also, be-
cause it is free of the input offset transition characteris-
tics inherent to some rail-to-rail CMOS op amps, the
OPA365 provides low THD and excellent linearity
throughout the input voltage swing range.
Figure 10 shows the OPA365 driving an ADS8326,
16-bit, 250kSPS converter. The amplifier is connected
as a unity-gain, noninverting buffer and has an output
swing to 0 V, making it directly compatible with the ADC
minus full-scale input level. The 0V level is achieved by
powering the OPA365 V− pin with a small negative volt-
age established by the diode forward voltage drop.
A small, signal-switching diode or Schottky diode
provides a suitable negative supply voltage of −0.3 to
−0.7V. The supply rail-to-rail is equal to V+, plus the
small negative voltage.
VOUT
VIN =1VRMS OPA365
R3
150kΩ
R2
19.5kΩ
C3
220pF
R1
1.8kΩ
C1
3.3nF C2
47pF
Figure 9. Configured as a 3-Pole, 20kHz, Sallen-Key Filter
−5V
V−
Optional(2)
C1
100nF R1(1)
100Ω
R2
500Ω
C2
100nF
V+
+5V
SD1
BAS40
VIN
0to4.096V
ADS8326
16−Bit
250kSPS
C3(1)
1nF
C4
100nF
+5V REF IN
−IN
+IN
REF3240
4.096V
+5V
OPA365
NOTES: (1) Suggested value; may require adjustment based on specific application.
(2) Single−supply applications lose a small number of ADC codes near ground due
to op amp output swing limitation. If a negative power supply is available, this
simple circuit creates a −0.3V supply to allow output swing to true ground
potential.
Figure 10. Driving the ADS8326
"#$
%"#$
SBOS365D − JUNE 2006 − REVISED JUNE 2009
www.ti.com
13
One method for driving an ADC that negates the need
for an output swing down to 0V uses a slightly com-
pressed ADC full-scale input range (FSR). For exam-
ple, the 16-bit ADS8361 (shown in Figure 11) has a
maximum FSR of 0V to 5V, when powered by a +5V
supply and VREF of 2.5V. The idea is to match the ADC
input range with the op amp full linear output swing
range; for example, an output range of +0.1 to +4.9V.
The reference output from the ADS8361 ADC is divided
down from 2.5V to 2.4V using a resistive divider. The
ADC FSR then becomes 4.8VPP centered on a com-
mon-mode voltage of +2.5V. Current from the ADS8361
reference pin is limited to about ±10µA. Here, 5µA was
used to bias the divider. The resistors must be precise
to maintain the ADC gain accuracy. An additional bene-
fit of this method is the elimination of the negative sup-
ply voltage; it requires no additional power-supply cur-
rent.
An RC network, consisting of R1 and C1, is included be-
tween the op amp and the ADS8361. It not only pro-
vides a high-frequency filter function, but more impor-
tantly serves as a charge reservoir used for charging
the converter internal hold capacitance. This capability
assures that the op amp output linearity is maintained
as the ADC input characteristics change throughout the
conversion cycle. Depending on the particular applica-
tion and ADC, some optimization of the R1 and C1 val-
ues may be required for best transient performance.
V−
C1
100nF
R2
10kΩ
R1
10kΩ
NOTE: (1) Suggested value; may require adjustment
based on specific application.
R3(1)
100Ω
R4
20kΩ
R5
480kΩ
V+
+5V
VIN
0.1V to 4.9V
ADS8361
16−Bit
100kSPS
OPA365
C2(1)
1nF
C3
1µF
REF IN
+IN
−IN
+5V
REF OUT
+2.5V
+2.4V
Figure 11. Driving the ADS8361
"#$
%"#$
SBOS365D − JUNE 2006 − REVISED JUNE 2009
www.ti.com
14
Figure 12 illustrates the OPA2365 dual op amp provid-
ing signal conditioning within an ADS1258 bridge sen-
sor circuit. It follows the ADS1258 16:1 multiplexer and
is connected as a dif ferential in/differential out amplifier.
The voltage gain for this stage is approximately 10V/V.
Driving the ADS1258 internal ADC in dif ferential mode,
rather than in a single-ended, exploits the full linearity
performance capability of the converter. For best com-
mon-mode rejection the two R2 resistors should be
closely matched.
Note that in Figure 12, the amplifiers, bridges,
ADS1258 and internal reference are powered by the
same single +5V supply. This ratiometric connection
helps cancel excitation voltage drift effects and noise.
For best performance, the +5V supply should be as free
as possible of noise and transients.
When the ADS1258 data rate is set to maximum and
the chop feature enabled, this circuit yields 12 bits of
noise-free resolution with a 50mV full-scale input.
The chop feature is used to reduce the ADS1258 of fset
and offset drift to very low levels. A 2.2nF capacitor is
required across the ADC inputs to bypass the sampling
currents. The 47Ω resistors provide isolation for the
OPA2365 outputs from the relatively large, 2.2nF ca-
pacitive load. For more information regarding the
ADS1258, see the product data sheet available for
down load at www.ti.com.
2kΩ
R3
47Ω
R2=10k
Ω
R2=10k
Ω
ADS1258
2.2nF
+5V
+5V
R3
47Ω
AIN0
AINCOM
MUXOUTN
MUXOUTP
ADCINP
ADCINN
2kΩAIN1
2kΩAIN14
2kΩAIN15
REFP
REFN
AVSS AVDD
R1=2.2k
Ω
10µF
+0.1µF
0.1µF
0.1µF
+
10µF
OPA2365
OPA2365
RFI
RFI
RFI
RFI
RFI
RFI
NOTE:G=1+2R
2/R1.MatchR
2resistors for optimum CMRR.
…
…
…
Figure 12. Conditioning Input Signals to the ADS1258 on a Single-Supply
SBOS365D − JUNE 2006 − REVISED JUNE 2009
www.ti.com
15
Revision History
DATE REV PAGE SECTION DESCRIPTION
Changed title.
6/09
D
1
Front Page
Changed feature bullets.
6/09
D
1
Front Page
Changed drawing.
Deleted table.
NOTE:Page numbers for previous revisions may differ from page numbers in the current version.
PACKAGE OPTION ADDENDUM
www.ti.com 3-Jun-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
OPA2365AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA2365AIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA2365AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA2365AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA365AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA365AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA365AIDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA365AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA365AIDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA365AIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA365AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA365AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
PACKAGE OPTION ADDENDUM
www.ti.com 3-Jun-2011
Addendum-Page 2
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF OPA365 :
•Automotive: OPA365-Q1
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA2365AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA365AIDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
OPA365AIDBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
OPA365AIDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
OPA365AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA2365AIDR SOIC D 8 2500 367.0 367.0 35.0
OPA365AIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
OPA365AIDBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
OPA365AIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
OPA365AIDR SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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