MM74HC14MX_NL - Fairchild Semiconductor

September 1983

Revised May 2005

MM74HC14 Hex Inverting Schmitt Trigger

MM74HC14

Hex Inverting Schmi tt Trigger

General Descript ion

The MM74HC14 utilizes advanced silicon-gate CMOS

technology to achieve the low power dissipation and high

noise immunity of standard CMOS, as well as the capability

to drive 10 LS-TTL loads.

The 74HC logic family is functionally and pinout compatible

with the standard 74LS logic family. All inputs are protected

from damage due to static discharge by internal diode

clamps to VCC and ground.

Features

■Typical propagation delay: 13 ns

■Wide power supply range: 2–6V

■Low quiescent current: 20

A maximum ( 74HC Serie s)

■Low input current: 1

A maximum

■Fanout of 10 LS-TTL loads

■Typical hysteresis voltage: 0.9V at VCC

4.5V

Ordering Code:

Devices also available in Tape and R eel. Specif y by append ing the suffix let t er “X” to th e ordering co de.

Pb-Free package per JEDEC J-STD-020B.

Connection Diagram

Pin Assignments for DIP, SOIC, SOP and TSSOP

Top View

Logic Diagram

Order Number Package P ac kag e Descript ion

Number

MM74HC14M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

MM74HC14MX_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

MM74HC14SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC14MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

MM74HC14N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

MM74HC14N_NL N14A Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

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MM74HC14

Absolute Maximum Ratings(Note 1)

(Note 2) Recommended Operating

Conditions

Note 1: Absolute Maximum Ratings a re those va lues beyon d which d am-

age to the device may occur.

Note 2: Unless ot herw ise sp ec ified all vo lt ages are referenced to gr ound.

Note 3: Power Dis sipation temp erature de rating — plastic “N” package:



12 mW/

C from 65

C to 85

DC Electrical Characteristics (Note 4)

Note 4: For a power supply of 5V

10% t he wor st case ou tput vo ltages (V OH, and VOL) occur for HC a t 4.5V. Thus t he 4.5V values s hould be used w hen

designing with this supply. Worst case VIH and VIL occur at VCC

5.5V a nd 4.5V res pectively. (The VIH value at 5.5V is 3. 85V. ) T he wors t c as e leaka ge cur-

rent (IIN, ICC, and IOZ) occur for CMOS at the hi gher voltage and so the 6.0V valu es s hould be u s ed.

Supply Voltage (VCC)



0.5 to



7.0V

DC Input Voltage (VIN)



1.5 to VCC



1.5V

DC Output Voltage (VOUT)



0.5 to VCC



0.5V

Clamp Diode Current (IIK, IOK)

20 mA

DC Output Current, per pin (IOUT)

25 mA

DC VCC or GND Current, per pin

(ICC)

50 mA

Storage Temperature Range (TSTG)



C to



150

Power Dissipation (PD)

(Note 3) 600 mW

S.O. Package only 500 mW

Lead Temperature (TL)

(Soldering 10 seconds) 260

Min Max Units

Supply Voltage (VCC)26V

DC Input or Output Voltage 0 VCC V

(VIN, VOUT)

Operating Temper ature Range (TA)





125

Symbol Parameter Conditions VCC TA



40 t o 85



55 to 125

CUnits

Typ Guaranteed Limits



Positive Going Minimum 2.0V 1.2 1.0 1.0 1.0 V

Threshold Voltage 4.5V 2.7 2.0 2.0 2.0 V

6.0V 3.2 3.0 3.0 3.0 V

Maximum 2.0V 1.2 1.5 1.5 1.5 V

4.5V 2.7 3.15 3.15 3.15 V

6.0V 3.2 4.2 4.2 4.2 V



Negative Going Minimum 2.0V 0.7 0.3 0.3 0.3 V

Threshold Voltage 4.5V 1.8 0.9 0.9 0.9 V

6.0V 2.2 1.2 1.2 1.2 V

Maximum 2.0V 0.7 1.0 1.0 1.0 V

4.5V 1.8 2.2 2.2 2.2 V

6.0V 2.2 3.0 3.0 3.0 V

VHHysteresis Voltage Minimum 2.0V 0.5 0.2 0.2 0.2 V

4.5V 0.9 0.4 0.4 0.4 V

6.0V 1.0 0.5 0.5 0.5 V

Maximum 2.0V 0.5 1.0 1.0 1.0 V

4.5V 0.9 1.4 1.4 1.4 V

6.0V 1.0 1.5 1.5 1.5 V

VOH Minimum HI GH Level VIN

VIL 2.0V 2.0 1.9 1.9 1.9 V

Output Voltage |IOUT|

A 4.5V 4.5 4.4 4.4 4.4 V

6.0V 6.0 5.9 5.9 5.9 V

VIN

VIL

|IOUT|

4.0 mA 4.5V 4.2 3.98 3.84 3.7 V

|IOUT|

5.2 mA 6.0V 5.7 5.48 5.34 5.2 V

VOL Maximum LOW Level VIN

VIH 2.0V 0 0.1 0.1 0.1 V

Output Voltage |IOUT|

A 4.5V 0 0.1 0.1 0.1 V

6.0V 0 0.1 0.1 0.1 V

VIN

VIH

|IOUT|

4.0 mA 4.5V 0.2 0.26 0.33 0.4 V

|IOUT|

5.2 mA 6.0V 0.2 0.26 0.33 0.4 V

IIN Maximum Input Current VIN

VCC or GND 6.0V

0.1

1.0

ICC Maximum Quiescent VIN

VCC or GND 6.0V 2.0 20 40

Supply Current IOUT

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MM74HC14

AC Electrical Characteristics

VCC

5V, TA

C, CL

15 pF, tr

6 ns

AC Electrical Characteristics

VCC

2.0V to 6.0V, CL

50 pF, tr

6 ns (unless otherwise specified)

Note 5: CPD determines the no load dynamic power consumption, PD

CPD VCC2 f



ICC VCC, and the no load dynam ic c urrent con sumpti on,

CPD VCC f



ICC.

Typical Performance Characteristics

Input Threshold, VT



, VT



vs Power Supply Voltage Propagation Delay vs

Power Supply

Symbol Parameter Conditions Typ Guaranteed Limit Units

tPHL, tPLH Maximum Propagation Delay 12 22 ns

Symbol Parameter Conditions VCC TA



40 to 85



55 to 125

CUnits

Typ Guaranteed Limits

tPHL, tPLH Maximum Propagation 2.0V 60 125 156 188 ns

Delay 4.5V 13 25 31 38 ns

6.0V 11 21 26 32 ns

tTLH, tTHL Maximum Output Rise 2.0V 30 75 95 110 ns

and Fall Time 4.5V 8 15 19 22 ns

6.0V 7 13 16 19 ns

CPD Power Dissipation (per gate) 27 pF

Capacitance (Note 5)

CIN Maximum Input Capacitance 5 10 10 10 pF

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MM74HC14

Typical Applications

Low Power Oscillator

Note: The equations assume t1



tpd0



tpd1

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MM74HC14

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Package Number M14A

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MM74HC14

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M14D

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MM74HC14

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lea d Th in S hri nk Sm all Ou tlin e Pack age (TSSOP ), JED EC MO-1 53, 4.4mm Wide

Package Number MTC14

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MM74HC14 Hex Inverting Schmitt Trigger

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Package Number N14A

Fairchild does no t assume any responsibility for use of any circui try described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

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2. A critical compon ent in any componen t of a life support

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device or system, or to affect its safety or effectiveness.