LT1997-3
1
19973f
For more information www.linear.com/LT1997-3
Typical applicaTion
FeaTures DescripTion
Precision, Wide Voltage
Range Gain Selectable
Amplifier
The LT
®
1997-3 combines a precision operational amplifier
with highly-matched resistors to form a one-chip solution
for accurately amplifying voltages. Gains from –13 to +14
with accuracy of 0.006% (60ppm) can be achieved using
no external components. The LT1997-3 is particularly well
suited for use as a difference amplifier, where the excellent
resistor matching results in a common mode rejection
ratio of greater than 91dB.
The amplifier features a 60μV maximum input offset voltage
and a –3dB bandwidth of 1.1MHz (Gain=1). The LT1997-3
operates from any supply voltage from 3.3V to 50V and
draws only 350μA supply current. The output typically
swings to within 100mV of either supply rail.
The resistors maintain their excellent matching over
temperature; the matching temperature coefficient is
guaranteed less than 1ppm/°C. The resistors are extremely
linear with voltage, resulting in a gain nonlinearity of less
than 2ppm.
The LT1997-3 is fully specified at 5V and ±15V supplies
and from –40°C to 125°C. The device is available in space
saving 16-lead MSOP and 4mm × 4mm DFN14 packages.
Gain = 1 Difference Amplifier Typical Distribution of CMRR (G = 1)
n Pin Configurable as a Difference Amplifier, Inverting
Amplifier or Noninverting Amplifier
n 91dB Minimum DC CMRR (Gain = 1)
n 65dB AC CMRR (at 100kHz, Gain = 1)
n 0.006% (60ppm) Maximum Gain Error (Gain = 1)
n 1ppm/°C Maximum Gain Error Drift
n 2ppm Maximum Gain Nonlinearity
n ±160V Common Mode Voltage Range
n Wide Supply Voltage Range: 3.3V to 50V
n Rail-to-Rail Output
n 350µA Supply Current
n 60µV Maximum Op Amp Offset Voltage
n 1.1MHz –3dB Bandwidth (Gain=1)
n Low-Power Shutdown: 20µA
n Space-Saving MSOP and DFN Packages
applicaTions
n High Side or Low Side Current Sensing
n Bidirectional Wide Common Mode Range Current
Sensing
n High Voltage to Low Voltage Level Translation
n Industrial Data-Acquisition Front-Ends
n Replacement for Isolation Circuits
n Differential to Single-Ended Conversion
L, LT, LTC, LTM, Linear Technology, Over-The-Top and the Linear logo are registered
trademarks of Analog Devices, Inc. All other trademarks are the property of their respective
owners.
VS = ±15V
VCM = –28V TO +26.5V
4625 UNITS
FROM 3 RUNS
CMRR (µV/V = ppm)
–30
–20
–10
0
10
20
30
0
200
400
600
800
1000
1200
NUMBER OF UNITS
19973 TA01b
19973 TA01a
OUT
REF1
45k
REF2
22.5k
22.5k
2.5k
7.5k 45k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
15VVSOURCE = –28V TO 26.5V
–15V
VOUT = ±1mV/mA
RC
1Ω
–
+
RSENSE
1Ω
LOAD
LT1997-3
LT1997-3
2
19973f
For more information www.linear.com/LT1997-3
pin conFiguraTion
absoluTe MaxiMuM raTings
Supply Voltages (V+ to V–) ........................................ 60V
+INA, –INA (Note 2) ......................................... V– ±160V
+INB, –INB, +INC, –INC
(Note 2) ..............................(V– + 80V) to (V– – 0.3V)
REF, REF1, REF2..................... (V– + 60V) to (V– – 0.3V)
SHDN ..................................... (V+ + 0.3V) to (V– – 0.3V)
Output Current (Continuous) (Note 6) ....................50mA
(Note 1)
1
3
4
5
6
7
+INA
+INB
NC
+INC
SHDN
REF
–INA
–INB
NC
–INC
V+
OUT
15
V–
14
12
11
10
9
8
TOP VIEW
DF PACKAGE
14(12)-LEAD (4mm × 4mm) PLASTIC DFN
TJMAX = 150°C, θJA = 45°C/W , θJC = 3°C/W
EXPOSED PAD (PIN 15) IS V–, MUST BE SOLDERED TO PCB
1
3
5
6
7
8
+INA
+INB
+INC
REF1
REF2
V–
16
14
12
11
10
9
–INA
–INB
–INC
V+
SHDN
OUT
TOP VIEW
MS PACKAGE
VARIATION: MS16 (12)
16-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 130°C/W
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED
TEMPERATURE RANGE
LT1997IDF-3#PBF LT1997IDF-3#TRPBF 19973 14-Lead (4mm × 4mm) Plastic DFN –40°C to 85°C
LT1997HDF-3#PBF LT1997HDF-3#TRPBF 19973 14-Lead (4mm × 4mm) Plastic DFN –40°C to 125°C
LT1997IMS-3#PBF LT1997IMS-3#TRPBF 19973 16-Lead Plastic MSOP –40°C to 85°C
LT1997HMS-3#PBF LT1997HMS-3#TRPBF 19973 16-Lead Plastic MSOP –40°C to 125°C
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
Parts ending with PBF are RoHS and WEEE compliant.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/.
http://www.linear.com/product/LT1997-3#orderinfo
Output Short-Circuit Duration
(Note 3) ..........................................Thermally Limited
Temperature Range (Notes 4, 5)
LT1997I-3 ................................................–40 to 85°C
LT1997H-3 .............................................–40 to 125°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range ......................–65 to 150°C
MSOP Lead Temperature (Soldering, 10 sec) ........300°C
LT1997-3
3
19973f
For more information www.linear.com/LT1997-3
elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
∆G Gain Error VOUT=±10V
G=1
l
±0.001
±0.006
±0.012
%
%
G=3
l
±0.001 ±0.015
±0.02 %
%
G=9
l
±0.002 ±0.03
±0.04 %
%
∆G/∆T Gain Drift vs Temperature (Note 6) VOUT=±10V l±0.2 ±1 ppm/°C
GNL Gain Nonlinearity VOUT=±10V
l
±1 ±2
±3 ppm
ppm
VOS Op Amp Offset Voltage (Note 9) V– < VCMOP < V+ – 1.75V
l
±20 ±60
±200 µV
µV
∆VOS/∆T Op Amp Offset Voltage Drift (Note 6) V– < VCMOP < V+ – 1.75V l±0.5 ±1.5 µV/°C
IBOp Amp Input Bias Current V– + 0.25V < VCMOP < V+ – 1.75V
l
–5
–15 ±2 5
15 nA
nA
IOS Op Amp Input Offset Current V– + 0.25V < VCMOP < V+ – 1.75V
l
–3
–10 ±0.5 3
10 nA
nA
RIN Input Impedance (Note 8) Common Mode
G=1
G=3
G=9
l
l
l
19
12.6
10.5
22.5
15
12.5
26
17.4
14.5
kΩ
kΩ
kΩ
Differential
G=1
G=3
G=9
l
l
l
38
12.6
4.2
45
15
5
52
17.4
5.8
kΩ
kΩ
kΩ
CMRR Common Mode Rejection Ratio,
MS16 Package G = 1, VCM = –28V to +26.5V
l
91
87 106 dB
dB
G = 3, VCM = –15V to +17.6V
l
90
86 99 dB
dB
G = 9, VCM = –15V to +14.7V
l
96
94 112 dB
dB
CMRR Common Mode Rejection Ratio,
DF14 Package G = 1, VCM = –28V to +26.5V
l
91
87 101 dB
dB
G = 1, VCM = –90V to +90V, +INB = –INB = 0V,
VS = ±25V
l
83
80 94 dB
dB
G = 1, VCM = –120V to +120V, +INC = –INC = 0V,
VS = ±25V, TA = –40°C to 125°C
l
81
77 91 dB
dB
G = 1, VCM = –160V to +160V, +INC = –INC = 0V,
VS = ±25V, TA = –40°C to 85°C
l
81
78 91 dB
dB
G = 3, VCM = –15V to +17.6V
l
90
86 98 dB
dB
G = 9, VCM = –15V to +14.7V
l
96
94 103 dB
dB
VCM Input Voltage Range (Note 7) +INA/–INA
+INA/–INA, +INC/–INC Connected to Ground
+INB/–INB
+INC/–INC
l
l
l
l
–30
–160
–15
–15
26.5
160
17.6
14.7
V
V
V
V
The l denotes the specifications which apply over the full operating
temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at
TA=25°C. Difference Amplifier Configuration, V+ = 15V, V– = –15V, VCM = VOUT = VREF = VREF1 = VREF2 = 0V. VCMOP is the common
mode voltage of the internal op amp.
LT1997-3
4
19973f
For more information www.linear.com/LT1997-3
elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
∆R/R Reference Divider Matching Error
∆R
R=
R
REF1
–R
REF2
RREF1+RREF2
2
⎛
⎝
⎜⎞
⎠
⎟
Available in MS16 Package Only
l
±0.001 ±0.006
±0.012 %
%
PSRR Power Supply Rejection Ratio VS=±1.65V to ±25V, VCM=VOUT=Mid-Supply
(Note 9)
l114 124 dB
eni Input Referred Noise Voltage Density f=1kHz
G=1
G=3
G=9
50
30
22
nV/√Hz
nV/√Hz
nV/√Hz
Input Referred Noise Voltage f=0.1Hz to 10Hz
G=1
G=3
G=9
1.4
1
0.8
µVP-P
µVP-P
µVP-P
VOL Output Voltage Swing Low (Referred
to V–)No Load
ISINK=5mA
l
l
100
280 150
500 mV
mV
VOH Output Voltage Swing High (Referred
to V+)No Load
ISOURCE=5mA
l
l
100
530 180
900 mV
mV
ISC Short-Circuit Output Current 50Ω to V+
50Ω to V–
l
l
10
10 28
30 mA
mA
SR Slew Rate ∆VOUT=±5V l0.45 0.75 V/µs
BW Small Signal –3dB Bandwidth G=1
G=3
G=9
1100
700
300
kHz
kHz
kHz
tSSettling Time G=1
0.1%, ∆VOUT=10V
0.01%, ∆VOUT=10V
14.6
95
µs
µs
G=3
0.1%, ∆VOUT=10V
0.01%, ∆VOUT=10V
13.6
29
µs
µs
G=9
0.1%, ∆VOUT=10V
0.01%, ∆VOUT=10V
13.8
29
µs
µs
VSSupply Voltage
l
3
3.3 50
50 V
V
tON Turn-On Time 16 µs
VIL SHDN Input Logic Low (Referred to V+) l–2.5 V
VIH SHDN Input Logic High (Referred to V+)l–1.2 V
ISHDN SHDN Pin Current l–10 –15 µA
ISSupply Current Active, VSHDN ≥ V+ – 1.2V
Active, VSHDN ≥ V+ – 1.2V
Shutdown, VSHDN ≤ V+ – 2.5V
Shutdown, VSHDN ≤ V+ – 2.5V
l
l
350
20
400
600
25
70
µA
µA
µA
µA
The l denotes the specifications which apply over the full operating
temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at
TA=25°C. Difference Amplifier Configuration, V+ = 15V, V– = –15V, VCM = VOUT = VREF = VREF1 = VREF2 = 0V. VCMOP is the common
mode voltage of the internal op amp.
LT1997-3
5
19973f
For more information www.linear.com/LT1997-3
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at
TA=25°C. Difference Amplifier Configuration, V+ = 5V, V– = 0V, VCM = VOUT = VREF = VREF1 = VREF2 = Mid-Supply. VCMOP is the
common mode voltage of the internal op amp.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
∆G Gain Error VOUT=1V to 4V
G=1
l
±0.001
±0.006
±0.012
%
%
G=3
l
±0.001 ±0.015
±0.02 %
%
G=9
l
±0.002 ±0.03
±0.04 %
%
∆G/∆T Gain Drift vs Temperature (Note 6) VOUT=1V to 4V l±0.2 ±1 ppm/°C
GNL Gain Nonlinearity VOUT=1V to 4V ±1 ppm
VOS Op Amp Offset Voltage (Note 9) V–<VCMOP<V+ – 1.75V
l
±20 ±60
±200 µV
µV
∆VOS/∆T Op Amp Offset Voltage Drift (Note 6) V–<VCMOP<V+ – 1.75V l±0.5 ±1.5 µV/°C
IBOp Amp Input Bias Current V– + 0.25V<VCMOP<V+ – 1.75V
l
–5
–15 ±2 5
15 nA
nA
IOS Op Amp Input Offset Current V– + 0.25V<VCMOP<V+ – 1.75V
l
–3
–10 ±0.5 3
10 nA
nA
RIN Input Impedance (Note 8) Common Mode
G=1
G=3
G=9
l
l
l
19
12.6
10.5
22.5
15
12.5
26
17.4
14.5
kΩ
kΩ
kΩ
Differential
G=1
G=3
G=9
l
l
l
l
38
12.6
4.2
45
15
5
52
17.4
5.8
kΩ
kΩ
kΩ
CMRR Common Mode Rejection Ratio,
MS16 Package G=1, VCM=–2.5V to +4.0V
l
90
88 100 dB
dB
G=3, VCM=0V to +3.5V
l
90
87 103 dB
dB
G=9, VCM=0V to +3.3V
l
96
94 108 dB
dB
CMRR Common Mode Rejection Ratio,
DF14 Package G=1, VCM=–2.5V to +4.0V
l
90
88 96 dB
dB
G=3, VCM=0V to +3.5V
l
90
87 101 dB
dB
G=9, VCM=0V to +3.3V
l
96
94 107 dB
dB
∆R/R Reference Divider Matching Error
∆R
R=
R
REF1
–R
REF2
RREF1+RREF2
2
⎛
⎝
⎜⎞
⎠
⎟
Available in MS16 Package Only
l
±0.001 ±0.006
±0.012 %
%
PSRR Power Supply Rejection Ratio VS=±1.65V to ±25V, VCM=VOUT=Mid-Supply
(Note 9)
l114 124 dB
eni Input Referred Noise Voltage Density f=1kHz
G=1
G=3
G=9
50
30
22
nV/√Hz
nV/√Hz
nV/√Hz
LT1997-3
6
19973f
For more information www.linear.com/LT1997-3
elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Referred Noise Voltage f=0.1Hz to 10Hz
G=1
G=3
G=9
1.4
1
0.8
µVP-P
µVP-P
µVP-P
VOL Output Voltage Swing Low (Referred to V–) No Load
ISINK=5mA
l
l
15
280 50
500 mV
mV
VOH Output Voltage Swing High (Referred to V+) No Load
ISOURCE=5mA
l
l
15
450 50
800 mV
mV
ISC Short-Circuit Output Current 50Ω to V+
50Ω to V–
l
l
10
10 27
25 mA
mA
SR Slew Rate ∆VOUT=3V l0.45 0.75 V/µs
BW Small signal –3dB Bandwidth G=1
G=3
G=9
1100
700
300
kHz
kHz
kHz
tSSettling Time G=1
0.1%, ∆VOUT=2V
0.01%, ∆VOUT=2V
5.4
91
µs
µs
G=3
0.1%, ∆VOUT=2V
0.01%, ∆VOUT=2V
6
21
µs
µs
G=9
0.1%, ∆VOUT=2V
0.01%, ∆VOUT=2V
7
36
µs
µs
VSSupply Voltage
l
3
3.3 50
50 V
V
tON Turn-On Time 22 µs
VIL SHDN Input Logic Low (Referred to V+) l–2.5 V
VIH SHDN Input Logic High (Referred to V+)l–1.2 V
ISHDN SHDN Pin Current l–10 –15 µA
ISSupply Current Active, VSHDN ≥ V+ – 1.2V
Active, VSHDN ≥ V+ –1.2V
Shutdown, VSHDN ≤ V+ – 2.5V
Shutdown, VSHDN ≤ V+ – 2.5V
l
l
330
15
370
525
20
40
µA
µA
µA
µA
The l denotes the specifications which apply over the full operating
temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at
TA=25°C. Difference Amplifier Configuration, V+ = 5V, V– = 0V, VCM = VOUT = VREF = VREF1 = VREF2 = Mid-Supply. VCMOP is the
common mode voltage of the internal op amp.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: See “Common Mode Voltage Range” and “High Common Mode
Voltage Difference Amplifiers” in the Applications Information section of
this data sheet for other considerations when taking +INA/–INA pins to
±160V and +INB/–INB/+INC/–INC pins to +80V.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum. This depends on the power supply, input
voltages and the output current.
Note 4: The LT1997I-3 is guaranteed functional over the operating
temperature range of –40°C to 85°C. The LT1997H-3 is guaranteed
functional over the operating temperature range of –40°C to 125°C.
Note 5: The LT1997I-3 is guaranteed to meet specified performance
from –40°C to 85°C. The LT1997H-3 is guaranteed to meet specified
performance from –40°C to 125°C.
Note 6: This parameter is not 100% tested.
Note 7: The Input Voltage Range numbers specified in the table guarantee
that the internal op amp operates in its normal operating region. The Input
voltage range can be significantly higher if the internal op amp operates in
its Over-The-Top
®
operating region. See “Common Mode Voltage Range”
in the Applications Information section to determine the valid input voltage
range under various operating conditions.
Note 8: Input impedance is tested by a combination of direct
measurements and correlation to the CMRR and gain error tests.
Note 9: Offset voltage, offset voltage drift and PSRR are defined as
referred to the internal op amp. You can calculate output offset as follows.
In the case of balanced source resistance, VOS,OUT = (VOS • NOISEGAIN)
+ (IOS • 22.5k) + (IB • 22.5k • (1– RP/RN)) where RP and RN are the total
resistance at the op amp positive and negative terminal, respectively.
LT1997-3
7
19973f
For more information www.linear.com/LT1997-3
Typical perForMance characTerisTics
Typical Distribution of CMRR
(G=1)
Typical Distribution of CMRR
(G=1)
Typical Distribution of CMRR
(G=3)
Typical Distribution of CMRR
(G=9)
Typical Distribution of Gain Error
(G=1)
Typical Distribution of Gain Error
(G=3)
TA = 25°C, VS=±15V, Difference Amplifier
configuration, unless otherwise noted.
VS = ±15V
VCM = –28V TO +26.5V
4625 UNITS
FROM 3 RUNS
–30
–20
–10
0
10
20
30
0
200
400
600
800
1000
1200
NUMBER OF UNITS
19973 G01
22.5k
22.5k
22.5k
+
–
22.5k 22.5k
22.5k
22.5k
22.5k
+
–
2.5k
2.5k
VS = ±25V
VCM = –160V TO +160V
+INC = –INC = 0V
2709 UNITS
FROM 2 RUNS
–100
–75
–50
–25
0
25
50
75
100
0
50
100
150
200
250
300
350
400
450
500
NUMBER OF UNITS
19973 G02
–30
–20
–10
0
10
20
30
0
200
400
600
800
1000
1200
1400
NUMBER OF UNITS
19973 G03
VS = ±15V
VCM = –15V TO +17.6V
4450 UNITS
FROM 3 RUNS
7.5k
7.5k
22.5k
+
–
22.5k
VS = ±15V
VCM = –15V TO +14.7V
4450 UNITS
FROM 3 RUNS
2.5k
2.5k
22.5k
22.5k
+
–
CMRR (µV/V=ppm)
–15
–10
–5
0
5
10
15
0
200
400
600
800
1000
1200
NUMBER OF UNITS
19973 G04
VS = ±15V
VOUT = ±10V
4864 UNITS
FROM 3 RUNS
GAIN ERROR (ppm)
–50
–40
–30
–20
–10
0
10
20
30
40
50
0
100
200
300
400
500
600
700
800
NUMBER OF UNITS
19973 G05
22.5k
22.5k
22.5k
+
–
22.5k
GAIN ERROR (ppm)
–150
–100
–50
0
50
100
150
0
100
200
300
400
500
600
700
800
NUMBER OF UNITS
19973 G06
VS = ±15V
VOUT = ±10V
4864 UNITS
FROM 3 RUNS
7.5k
7.5k
22.5k
+
–
22.5k
Typical Distribution of Gain Error
(G=9)
Typical Distribution of Gain
Nonlinearity
GAIN ERROR (ppm)
–300
–200
–100
0
100
200
300
0
100
200
300
400
500
600
700
800
NUMBER OF UNITS
19973 G07
VS = ±15V
VOUT = ±10V
4864 UNITS
FROM 3 RUNS
2.5k
2.5k
22.5k
+
–
22.5k
4864 UNITS
FROM 3 RUNS
GAIN NONLINEARITY (ppm)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2.0
0
200
400
600
800
1000
1200
NUMBER OF UNITS
19973 G08
VS = ±15V
VOUT = ±10V
G = 1
22.5k
22.5k
22.5k
22.5k
+
–
CMRR vs Frequency
FREQUENCY (Hz)
10
100
1k
10k
100k
1M
10M
0
20
40
60
80
100
120
140
COMMON–MODE REJECTION RATIO (dB)
19973 G09
G = 1
G = 3
G = 9
LT1997-3
8
19973f
For more information www.linear.com/LT1997-3
Typical perForMance characTerisTics
Typical Distribution of Op Amp
Offset Voltage
Typical Distribution of
Op Amp PSRR
Typical Gain Error for RL=10kΩ
G=1 (Curves Offset for Clarity)
Typical Gain Error for Low Supply
Voltages, G=1
(Curves Offset for Clarity)
Typical Gain Error for RL=5kΩ
G=1 (Curves Offset for Clarity)
Typical Gain Error for RL=10kΩ
G=3 (Curves Offset for Clarity)
Typical Gain Error for RL=2kΩ
G=1 (Curves Offset for Clarity)
Typical Gain Error for RL=5kΩ
G=3 (Curves Offset for Clarity)
TA = 25°C, VS=±15V, Difference Amplifier
configuration, unless otherwise noted.
6360 UNITS
FROM 3 RUNS
OFFSET VOLTAGE (µV)
–60
–40
–20
0
20
40
60
0
100
200
300
400
500
600
700
800
NUMBER OF UNITS
19973 G10
4864 UNITS
FROM 3 RUNS
V
S
= ±1.65V to ±25V
PSRR (µV/V)
–1.5
–1
–0.5
0
0.5
1
1.5
0
200
400
600
800
1000
1200
NUMBER OF UNITS
19973 G11
V
S
= ±18V
V
S
= ±15V
V
S
= ±12V
V
S
= ±10V
OUTPUT VOLTAGE (V)
–20
–16
–12
–8
–4
0
4
8
12
16
20
OUTPUT ERROR (2mV/DIV)
19973 G12
V
S
= ±5V, R
L
=10kΩ
V
S
= ±5V, R
L
=2kΩ
V
S
= ±5V, R
L
=1kΩ
V
S
= ±2.5V, R
L
=1kΩ
OUTPUT VOLTAGE (V)
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
19973 G15
OUTPUT ERROR (2mV/DIV)
V
S
= ±18V
V
S
= ±15V
V
S
= ±12V
V
S
= ±10V
OUTPUT VOLTAGE (V)
–20
–16
–12
–8
–4
0
4
8
12
16
20
19973 G13
OUTPUT ERROR (2mV/DIV)
V
S
= ±18V
V
S
= ±15V
V
S
= ±12V
V
S
= ±10V
OUTPUT VOLTAGE (V)
–20
–16
–12
–8
–4
0
4
8
12
16
20
19973 G16
OUTPUT ERROR (2mV/DIV)
V
S
= ±18V
V
S
= ±15V
V
S
= ±12V
V
S
= ±10V
OUTPUT VOLTAGE (V)
–20
–16
–12
–8
–4
0
4
8
12
16
20
19973 G14
OUTPUT ERROR (2mV/DIV)
V
S
= ±18V
V
S
= ±15V
V
S
= ±12V
V
S
= ±10V
OUTPUT VOLTAGE (V)
–20
–16
–12
–8
–4
0
4
8
12
16
20
19973 G17
OUTPUT ERROR (2mV/DIV)
Typical Gain Error for RL=2kΩ
G=3 (Curves Offset for Clarity)
V
S
= ±18V
V
S
= ±15V
V
S
= ±12V
V
S
= ±10V
OUTPUT VOLTAGE (V)
–20
–16
–12
–8
–4
0
4
8
12
16
20
19973 G18
OUTPUT ERROR (2mV/DIV)
LT1997-3
9
19973f
For more information www.linear.com/LT1997-3
Typical Gain Error for RL=10kΩ
G=9 (Curves Offset for Clarity)
Typical Gain Error for RL=5kΩ
G=9 (Curves Offset for Clarity)
Typical perForMance characTerisTics
Typical Gain Error for RL=2kΩ
G=9 (Curves Offset for Clarity)
Gain Error vs Temperature CMRR vs Temperature
TA = 25°C, VS=±15V, Difference Amplifier
configuration, unless otherwise noted.
V
S
= ±18V
V
S
= ±15V
V
S
= ±12V
V
S
= ±10V
OUTPUT VOLTAGE (V)
–20
–16
–12
–8
–4
0
4
8
12
16
20
19973 G20
OUTPUT ERROR (2mV/DIV)
V
S
= ±18V
V
S
= ±15V
V
S
= ±12V
V
S
= ±10V
OUTPUT VOLTAGE (V)
–20
–16
–12
–8
–4
0
4
8
12
16
20
19973 G21
OUTPUT ERROR (2mV/DIV)
V
S
= ±18V
V
S
= ±15V
V
S
= ±12V
V
S
= ±10V
OUTPUT VOLTAGE (V)
–20
–16
–12
–8
–4
0
4
8
12
16
20
OUTPUT ERROR (2mV/DIV)
19973 G19
V
S
= ±15V
V
OUT
= ±10V
R
L
= 10kΩ
10 UNITS
G=1
TEMPERATURE (°C)
–75
–50
–25
0
25
50
75
100
125
150
175
–100
–80
–60
–40
–20
0
20
40
60
80
100
–10
–8
–6
–4
–2
0
2
4
6
8
10
GAIN ERROR (ppm)
GAIN ERROR (m%)
19973 G22
Output Voltage vs Load Current
V
S
= ±15V
10 UNITS,
G=1
TEMPERATURE (°C)
–75
–50
–25
0
25
50
75
100
125
150
175
–50
–40
–30
–20
–10
0
10
20
30
40
50
CMRR (µV/V)
19973 G23
Maximum Power Dissipation vs
Temperature
130°C
85°C
25°C
–45°C
OUTPUT CURRENT (mA)
0
5
10
15
20
25
30
–20
–15
–10
–5
0
5
10
15
20
OUTPUT VOLTAGE (V)
19973 G24
DF14(12) θ
JA
= 45°C/W
MS16(12) θ
JA
= 130°C/W
AMBIENT TEMPERATURE (°C)
–60
–40
–20
0
20
40
60
80
100
120
140
160
0
1
2
3
4
5
MAXIMUM POWER DISSIPATION (W)
19973 G25
LT1997-3
10
19973f
For more information www.linear.com/LT1997-3
Typical perForMance characTerisTics
Op Amp Noise Density vs
Frequency 0.1Hz to 10Hz Noise
Positive PSRR vs Frequency Negative PSRR vs Frequency
Frequency Response vs
Capacitive Load (G = 9)
TA = 25°C, VS=±15V, Difference Amplifier
configuration, unless otherwise noted.
Frequency Response vs
Capacitive Load (G = 1)
Frequency Response vs
Capacitive Load (G = 3)
0pF
220pF
560pF
680pF
FREQUENCY (MHz)
0.001
0.01
0.1
1
10
–30
–20
–10
0
10
20
30
GAIN (dB)
19973 G27
0pF
220pF
560pF
680pF
1000pF
FREQUENCY (MHz)
0.001
0.01
0.1
1
10
–30
–20
–10
0
10
20
30
GAIN (dB)
19973 G28
0pF
220pF
560pF
680pF
1000pF
0pF
220pF
560pF
680pF
1000pF
FREQUENCY (MHz)
0.001
0.01
0.1
1
10
–30
–20
–10
0
10
20
30
GAIN (dB)
19973 G29
0pF
220pF
560pF
680pF
1000pF
MEASURED IN G = 13
REFERRED TO OP AMP INPUTS
FREQUENCY (Hz)
1
10
100
1k
10k
100k
0
5
10
15
20
25
30
35
40
VOLTAGE NOISE DENSITY (nV/√Hz)
19973 G30
MEASURED IN G = 13
REFERRED TO OP AMP INPUTS
TIME (10s/DIV)
NOISE VOLTAGE (200nV/DIV)
19973 G31
FREQUENCY (Hz)
10
100
1k
10k
100k
0
20
40
60
80
100
120
140
160
POWER SUPPLY REJECTION RATIO (dB)
19973 G32
G = 1
G = 3
G = 9
FREQUENCY (Hz)
10
100
1k
10k
100k
0
20
40
60
80
100
120
140
POWER SUPPLY REJECTION RATIO (dB)
19973 G33
G = 1
G = 3
G = 9
G = 9
G = 3
G = 1
FREQUENCY (MHz)
0.001
0.01
0.1
1
2
–10
–5
0
5
10
15
20
25
30
GAIN (dB)
19973 G26
Gain vs Frequency
LT1997-3
11
19973f
For more information www.linear.com/LT1997-3
Typical perForMance characTerisTics
Slew Rate vs Temperature Large-Signal Step Response Small-Signal Step Response
Small-Signal Step Response Small-Signal Step Response
TA = 25°C, VS=±15V, Difference Amplifier
configuration, unless otherwise noted.
R
L
= 10kΩ
RISING EDGE
FALLING EDGE
TEMPERATURE (°C)
–75
–50
–25
0
25
50
75
100
125
150
175
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
SLEW RATE (V/µs)
19973 G34
G = 1
R
L
= 10kΩ
C
L
= 560pF
TIME (10µs/DIV)
VOLTAGE (5V/DIV)
19973 G35
C
L
= 0pF
C
L
= 560pF
C
L
= 680pF
G = 1
R
L
=10kΩ
TIME (µs)
0
5
10
15
20
25
30
35
40
–100
–80
–60
–40
–20
0
20
40
60
80
100
120
140
VOLTAGE (mV)
19973 G36
C
L
= 0pF
C
L
= 560pF
C
L
= 680pF
G = 3
R
L
=10kΩ
C
L
= 1000pF
TIME (µs)
0
5
10
15
20
25
30
35
40
–100
–80
–60
–40
–20
0
20
40
60
80
100
120
140
VOLTAGE (mV)
19973 G37
C
L
= 0pF
C
L
= 560pF
C
L
= 680pF
G = 9
R
L
=10kΩ
C
L
= 1000pF
TIME (µs)
0
5
10
15
20
25
30
35
40
–100
–80
–60
–40
–20
0
20
40
60
80
100
120
140
VOLTAGE (mV)
19973 G38
Settling Time Settling Time
G = 1
OUTPUT VOLTAGE
ERROR VOLTAGE
TIME (20µs/DIV)
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
ERROR VOLTAGE (mV)
OUTPUT VOLTAGE (V)
19973 G39
G = 1
OUTPUT VOLTAGE
ERROR VOLTAGE
TIME (20µs/DIV)
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
ERROR VOLTAGE (mV)
OUTPUT VOLTAGE (V)
19973 G40
LT1997-3
12
19973f
For more information www.linear.com/LT1997-3
Typical perForMance characTerisTics
Op Amp Offset Voltage vs
Temperature Quiescent Current vs Temperature Thermal Shutdown vs Hysteresis
Quiescent Current vs Supply
Voltage
Shutdown Quiescent Current vs
Supply Voltage
Quiescent Current vs SHDN
Voltage Minimum Supply Voltage
TA = 25°C, VS=±15V, Difference Amplifier
configuration, unless otherwise noted.
20 UNITS
TEMPERATURE (°C)
–60
–40
–20
0
20
40
60
80
100
120
140
–200
–150
–100
–50
0
50
100
150
200
OP AMP OFFSET VOLTAGE (µV)
19973 G41
10 UNITS
TEMPERATURE (°C)
–75
–50
–25
0
25
50
75
100
125
150
175
200
250
300
350
400
450
500
550
QUIESCENT CURRENT (µA)
19973 G42
TEMPERATURE (°C)
145
150
155
160
165
170
0
100
200
300
400
500
600
SUPPLY CURRENT (µA)
19973 G43
T
A
= 150°C
T
A
= –55°C
PARAMETRIC SWEEP IN ~25°C
INCREMENTS
SUPPLY VOLTAGE (V)
0
10
20
30
40
50
0
100
200
300
400
500
600
QUIESCENT CURRENT (µA)
19973 G44
V
SHDN
= 0V
150°C
125°C
85°C
25°C
–40°C
–55°C
SUPPLY VOLTAGE (V)
0
10
20
30
40
50
0
10
20
30
40
50
QUIESCENT CURRENT (µA)
19973 G45
150°C
125°C
85°C
25°C
–40°C
–55°C
SHDN
VOLTAGE (V)
0
5
10
15
0
50
100
150
200
250
300
350
400
450
500
550
QUIESCENT CURRENT (µA)
19973 G46
V
S
= ±15V
T
A
= 125°C
T
A
= 25°C
T
A
= –45°C
TOTAL SUPPLY VOLTAGE (V)
0
1
2
3
4
5
–20
–15
–10
–5
0
5
10
15
20
CHANGE IN OP AMP OFFSET VOLTAGE (µV)
19973 G47
LT1997-3
13
19973f
For more information www.linear.com/LT1997-3
pin FuncTions
V+ (Pin 9/Pin 11): Positive Supply Pin.
V– (EXPOSED PAD Pin 15/Pin 8): Negative Supply Pin.
OUT (Pin 8/Pin 9): Output Pin.
+INA (Pin 1/Pin 1): Noninverting Gain-of-1 Input Pin.
Connects a 22.5k internal resistor to the internal op amp’s
noninverting input.
+INB (Pin 3/Pin 3): Noninverting Gain-of-3 Input Pin.
Connects a 7.5k internal resistor to the internal op amp’s
noninverting input.
+INC (Pin 5/Pin 5): Noninverting Gain-of-9 Input Pin.
Connects a 2.5k internal resistor to the internal op amp’s
noninverting input.
–INA (Pin 14/Pin 16): Inverting Gain-of-1 input Pin. Con-
nects a 22.5k internal resistor to the internal op amp’s
inverting input.
–INB (Pin 12/Pin 14): Inverting Gain-of-3 input Pin.
Connects a 7.5k internal resistor to the internal op amp’s
inverting input.
–INC (Pin 10/Pin 12): Inverting Gain-of-9 input Pin.
Connects a 2.5k internal resistor to the internal op amp’s
inverting input.
REF (Pin 7/NA): Reference Input Pin. Sets the output level
when the difference between the inputs is zero.
REF1 (NA/Pin 6): Reference 1 Input Pin. With REF2, sets
the output level when the difference between the inputs
is zero.
REF2 (NA/Pin 7): Reference 2 Input. Pin. With REF1, sets
the output level when the difference between the inputs
is zero.
SHDN (Pin 6/Pin 10): Shutdown Pin. Amplifier is active
when this pin is tied to V+ or left floating. Pulling the pin
>2.5V below V+ causes the amplifier to enter a low power
state.
(DFN/MSOP)
block DiagraM
22.5k
45k
2.5k
7.5k
22.5k
10µA
2.5k
7.5k
22.5k
45k
–INC
–INA
–INB
REF2
SHDN
+INA
+INC
+INB
V
+
V
–
OUT
V
+
REF1
19973 BD01
22.5k
22.5k
2.5k
7.5k
22.5k
10µA
2.5k
7.5k
22.5k
–INC
–INA
–INB
SHDN
+INA
+INC
+INB
V
+
V
–
OUT
V
+
REF
19973 BD02
DFNMSOP
LT1997-3
14
19973f
For more information www.linear.com/LT1997-3
applicaTions inForMaTion
Figure1. Difference Amplifier with Dual-Supply
Operation (Gain=1)
19973 F01
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
VS+
VS–
VOUT
VREF
V–IN
V+IN
–
+
LT1997-3
Introduction
The LT1997-3 is a precision, high voltage general purpose
op amp combined with a highly-matched resistor network.
It can easily be configured into many different classical gain
circuits without adding external components. The several
pages of simple circuits in this data sheet demonstrate
how easy the LT1997-3 is to use. It can be configured into
a difference amplifier (Figure1), as well as into inverting
(Figure7) and noninverting (Figure3) single ended ampli-
fiers. The LT1997-3 provides the resistors and op amp
together in a small package in order to save board space and
reduce complexity. Highly accurate measurement circuits
can be easily constructed with the LT1997-3. The circuits
can be tailored to specific measurement applications.
Common Mode Voltage Range
The common mode voltage range of the LT1997-3 is set
by the voltage range allowed on the LT1997-3’s input pins
and by the input voltage range of the internal op amp.
The internal op amp of LT1997-3 has 2 operating regions:
a) if the common-mode voltage at the inputs of the internal
op amp (VCMOP) is between V– and V+ – 1.75V, the op
amp operates in its normal region; b) If VCMOP is between
V+–1.75V and V– + 76V, the op amp continues to oper-
ate, but in its Over-The-Top (OTT) region with degraded
performance (see Over-The-Top Operation section of this
data sheet for more detail).
The LT1997-3 will not operate correctly if the common-
mode voltage at the inputs of the internal op amp (VCMOP)
is below V–, but the part will not be damaged as long as
VCMOP is greater than V––25V and the junction tempera-
ture of the LT1997-3 does not exceed 150ºC.
The allowed voltage range on LT1997-3’s input pins are as
follows: The voltages at +INA and –INA input pins should
never be higher than V–+160V or lower than V––160V
under any circumstances; The voltages at +INB, –INB,
+INC and –INC input pins should not go below V––0.3V
or above V– + 80V.
The common-mode voltage at the inputs of the internal op
amp (VCMOP) is determined by the voltages on pins +INA,
+INB, +INC and REF (see the “Calculating Input Voltage
Range” section). This condition is true provided that the
internal op amp’s output is not clipped and feedback
maintains the internal op amp’s inputs at the same voltage.
In addition to the limits mentioned above, the common
mode input voltage of the amplifier should be chosen so
that the input resistors do not dissipate too much power.
The power dissipated in a 22.5k resistor must be less than
1.5W. It must be less than 0.5W for the 7.5k resistor and
less than 0.165W for the 2.5k resistor. For most applica-
tions, the pin voltage limitations will be reached before
the resistor power limitation is reached.
Calculating Input Voltage Range
Figure2 shows the LT1997-3 in the generalized case of a
difference amplifier, with the inputs shorted for the common
mode calculation. The values of RF and RG are dictated
by how the positive inputs and REF pin are connected.
LT1997-3
15
19973f
For more information www.linear.com/LT1997-3
applicaTions inForMaTion
By superposition we can write:
VCMOP =VEXT •
R
F
RF+RG
+VREF •
R
G
RF+RG
Or, solving for VEXT:
VEXT =VCMOP •1+RG
RF
⎛
⎝
⎜⎞
⎠
⎟– VREF •RG
RF
But valid VCMOP voltages are limited to VS+ – 1.75V
(VS–+76V OTT) on the high side and VS– on the low
side, so:
MAX VEXT =VS+–1.75
( )
•1+RG
RF
⎛
⎝
⎜⎞
⎠
⎟– VREF •RG
RF
and:
MIN VEXT =VS–
( )
•1+RG
RF
⎛
⎝
⎜⎞
⎠
⎟– VREF •RG
RF
VREF
RG
RG
VS+
VS–
VCMOP
VOUT
VEXT
–
+
RF
RF
19973 F02
Figure2. Calculating the Common Mode Input Voltage Range
Exceeding the MAX VEXT limit will cause the amplifier to
transition into the Over-The-Top region. The maximum
input voltage for the Over-The-Top region is:
MAX VEXTOTT =VS–+76
( )
•1+RG
RF
⎛
⎝
⎜⎞
⎠
⎟– VREF •RG
RF
Keep in mind that the above MAX and MIN values for input
voltage range should not exceed the allowed voltage range
specified earlier for LT1997-3’s input pins.
The negative inputs are not limited by the internal op amp
common mode range (VCMOP) because they do not affect it.
They are limited by the output swing of the amplifier (and
obviously by the allowed voltage range for the input pins).
Over-The-Top Operation
When the input common mode voltage of the internal op
amp (VCMOP) in the LT1997-3 is biased near or above the
V+ supply, the op amp is operating in the Over-The-Top
(OTT) region. The op amp continues to operate with an
input common mode voltage of up to 76V above V– (re-
gardless of the positive power supply voltage V+), but its
performance is degraded. The op amp’s input bias currents
change from under ±2nA to 14µA. The op amp’s input
offset current rises to ±50nA, which adds ±1.1mV to the
output offset voltage.
In addition, when operating in the Over-The-Top region,
the differential input impedance decreases from 1MΩ in
normal operation to approximately 3.7kΩ in Over-The-Top
operation. This resistance appears across the summing
nodes of the internal op amp and boosts noise and offset
while decreasing speed. Noise and offset will increase by
between 75% and 450% depending on the gain setting. The
bandwidth will be reduced by 2X to 5.5X. For more detail
on Over-The-Top operation, consult the LT6015 data sheet.
The Classical Noninverting Amplifier: High Input Z
A common op amp configuration enabled by the LT1997-3
is the noninverting amplifier. Figure3 shows the textbook
representation of the circuit on the top. The LT1997-3 is
shown on the bottom configured in a precision gain of 5.5.
One of the benefits of the noninverting op amp configu-
ration is that the input impedance is extremely high. The
LT1997-3 maintains this benefit. A large number of gains
can be achieved with the LT1997-3 in the noninverting
configuration. The complete list of such Hi-Z input non-
inverting gain configuration is shown in Table1. Many of
these are also represented in Figure4 in schematic form.
Note that the positive inputs are connected such that the
source impedance seen by the positive and negative in-
puts of the internal op amp are equal. This minimizes the
offset voltage due to the input bias current of the op amp.
The noise gain and amplifier’s gain in the noninverting
configuration are identical.
LT1997-3
16
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19973 F03
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
VIN
RG
RF
+
–
VOUT
RG//RF
NONINVERTING OP AMP CONFIGURATION
NONINVERTING OP AMP CONFIGURATION
IMPLEMENTED WITH THE LT1997-3, RF = 11.25k, RG = 2.5k, GAIN = 5.5
GAIN IS ACHIEVED BY GROUNDING, FLOATING OR FEEDING BACK
THE AVAILABLE RESISTORS TO ARRIVE AT THE DESIRED RF AND RG
LT1997-3
VOUT = GAIN • VIN
GAIN = 1 + RF/RG
Figure3. The LT1997-3 Configured as a Noninverting Op Amp
Table1. Configuring the Negative Pins for Noninverting Gains.
The Positive Inputs Are Driven as Shown in the Examples in
Figure4
Negative Input Connections
Gain -INA -INB -INC
1 VOUT VOUT VOUT
1.077 GND VOUT VOUT
1.1 GND OPEN VOUT
1.25 GND VOUT OPEN
1.273 VOUT GND VOUT
1.3 OPEN GND VOUT
1.4 GND GND VOUT
2 GND OPEN OPEN
2.5 VOUT GND OPEN
2.8 VOUT VOUT GND
3.25 OPEN VOUT GND
3.5 GND VOUT GND
4 OPEN GND OPEN
5 GND GND OPEN
5.5 VOUT OPEN GND
7 VOUT GND GND
10 OPEN OPEN GND
11 GND OPEN GND
13 OPEN GND GND
14 GND GND GND
LT1997-3
17
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Figure4. Some Implementations of Classical Noninverting Gains Using the LT1997-3. High Input Z is Maintained
19973 F04
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 1
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 3.25
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 2
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 4
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 5.5
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 5
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 7
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 11
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 10
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 13
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = 14
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3
LT1997-3
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Attenuation
The positive input resistors can be configured to attenuate
the input signal (Figure5). This allows a trade-off to be
made between input range and precision. Attenuating the
input can prevent the op amp from entering the less precise
Over-the-Top operating region at the cost of decreasing
the output signal. The four positive resistors (R+INA, R+INB,
R+INC, RREF) can be arranged to make many precise input
attenuators. These are shown in Table2.
19973 F05
REF
22.5k
2.5k
7.5k 22.5k
+INA +INB +INC
–
+
VIN
UP TO +160V
ATTENUATOR ATTENUATING THE POSITIVE INPUT
BY GROUNDING AN UNUSED INPUT
RA = 22.5k, RG = 2.5k, A = 0.1
VIN
VCMOP
VCMOP = A • VIN
A = RG/(RA + RG)
LT1997-3
RA
RG
Figure5. The Input of the LT1997-3 Can Be Attenuated to Increase
the Usable Input Range. The +INA Input Can Be Taken to ±160V.
The attenuations and noninverting gains are set indepen-
dently and can be combined to produce even more gain
options. 346 unique gains between 0.0714 and14 (Figure6)
can be realized. When using the positive side resistors as
an attenuator, the benefit of canceling input bias current
effects on offset voltage reduces. The impedance seen by
the two op amp input nodes will not be identical.
COUNT
0
100
10
1
0.1
0.01 150
19973 F06
50 100 200 250 350
300
GAIN
Figure6. Many Unique Gains Can Be Achieved by
Combining Attenuation with Noninverting Gain
Table2. Configuring the Positive Pins for Various Attenuations
Positive Input Connections
Gain +INA +INB +INC REF
0.0714 VIN GND GND GND
0.0769 VIN GND GND OPEN
0.0909 VIN OPEN GND GND
0.1 VIN OPEN GND OPEN
0.143 VIN GND GND VIN
0.182 VIN OPEN GND VIN
0.2 VIN GND OPEN GND
0.214 GND VIN GND GND
0.231 OPEN VIN GND GND
0.25 VIN GND OPEN OPEN
0.286 VIN VIN GND GND
0.308 VIN VIN GND OPEN
0.357 VIN VIN GND VIN
0.4 VIN GND OPEN VIN
0.5 VIN OPEN OPEN GND
0.6 GND VIN OPEN GND
0.643 GND GND VIN GND
0.692 OPEN GND VIN GND
0.714 VIN GND VIN GND
0.75 OPEN VIN OPEN GND
0.769 VIN GND VIN OPEN
0.786 VIN GND VIN VIN
0.8 VIN VIN OPEN GND
0.818 GND OPEN VIN GND
0.857 GND VIN VIN GND
0.9 OPEN OPEN VIN GND
0.909 VIN OPEN VIN GND
0.923 OPEN VIN VIN GND
0.929 VIN VIN VIN GND
1 VIN VIN VIN VIN
LT1997-3
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The Inverting Configuration
The inverting amplifier, shown in Figure7, is another clas-
sical op amp configuration. The circuit is actually identical
to the noninverting amplifier of Figure3, except that VIN
and GND have been swapped. The list of available gains
is shown in Table3, and some of the circuits are shown
in Figure8. Noise gain is 1+|Gain|, as is the usual case for
inverting amplifiers. For the best DC precision, match the
source impedances seen by the op amp inputs.
19973 F07
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
INVERTING OP AMP CONFIGURATION
INVERTING OP AMP CONFIGURATION
IMPLEMENTED WITH THE LT1997-3, RF = 11.25k, RG = 2.5k, GAIN = –4.5
GAIN IS ACHIEVED BY GROUNDING, FLOATING OR FEEDING BACK
THE AVAILABLE RESISTORS TO ARRIVE AT THE DESIRED RF AND RG
VIN
RF
+
–
VOUT
VOUT = GAIN • VIN
GAIN = –RF/RG
RG
RG//RF
LT1997-3
Figure7. The LT1997-3 Configured as an Inverting Op Amp
Table3. Configuring the Negative Pins for Inverting Gains
Negative Input Connections
Gain -INA -INB -INC
–0.077 VIN VOUT VOUT
–0.1 VIN OPEN VOUT
–0.25 VIN VOUT OPEN
–0.273 VOUT VIN VOUT
–0.3 OPEN VIN VOUT
–0.4 VIN VIN VOUT
–1 VIN OPEN OPEN
–1.5 VOUT VIN OPEN
–1.8 VOUT VOUT VIN
–2.25 OPEN VOUT VIN
–2.5 VIN VOUT VIN
–3 OPEN VIN OPEN
–4 VIN VIN OPEN
–4.5 VOUT OPEN VIN
–6 VOUT VIN VIN
–9 OPEN OPEN VIN
–10 VIN OPEN VIN
–12 OPEN VIN VIN
–13 VIN VIN VIN
LT1997-3
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Figure8. Inverting Gains with Input Impedance that Varies from 1.73kΩ (Gain = –13) to 22.5kΩ (Gain = –1)
19973 F08
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –0.25
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –2.25
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –1
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –3
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –4.5
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –4
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –6
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –10
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –9
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –12
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VIN
GAIN = –13
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3
LT1997-3
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Difference Amplifiers
The LT1997-3 is ideally suited to be used as a difference
amplifier. Figure9 shows the basic 4-resistor difference
amplifier and the LT1997-3. A difference gain of 3 is shown,
but can be altered by additional dashed connections. By
connecting the 22.5k resistors in parallel, the gain is re-
duced by a factor of 2. Of course there are many possible
gains. Table4 shows the difference gains and how they
are achieved. Note that, as for inverting amplifiers, the
noise gain is equal to the signal gain plus 1.
19973 F09
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
V+IN
V–IN
V+IN
RG
R
F
+
–
VOUT
RG
RF
DIFFERENCE AMPLIFIER CONFIGURATION
DIFFERENCE AMPLIFIER CONFIGURATION
IMPLEMENTED WITH THE LT1997-3, RF = 22.5k, RG = 7.5k, GAIN = 3
ADDING THE DASHED CONNECTIONS CONNECT THE
TWO 22.5k RESISTORS IN PARALLEL, SO RF IS REDUCED TO 11.25k.
THE GAIN BECOMES 11.25k/7.5k = 1.5
VOUT = GAIN • (V+IN – V–IN)
GAIN = RF/RG
LT1997-3
Figure9. The LT1997-3 Configured as a Difference
Amplifier. Gain Is Set by Connecting the Correct
Resistors or Combinations of Resistors. Gain of 3 Is
Shown, with Dashed Lines Modifying It to a Gain of 1.5
The Common Mode Voltage at the inputs of the internal
op amp (VCMOP) is set by the voltages at pins +INA, +INB,
+INC and REF.
Table4. Difference Amplifier Gains
Gain V+IN V–IN OUT GND (REF)
0.077 +INA –INA –INB, –INC +INB, +INC
0.1 +INA –INA –INC +INC
0.25 +INA –INA –INB +INB
0.273 +INB –INB –INA, –INC +INA, +INC
0.3 +INB –INB –INC +INC
0.4 +INA, +INB –INA, –INB –INC +INC
1 +INA –INA
1.5 +INB –INB –INA +INA
1.8 +INC –INC –INA, –INB +INA, +INB
2.25 +INC –INC –INB +INB
2.5 +INA, +INC –INA, –INC –INB +INB
3 +INB –INB
4 +INA, +INB –INA, –INB
4.5 +INC –INC –INA +INA
6 +INB, +INC –INB, –INC –INA +INA
9 +INC –INC
10 +INA, +INC –INA, –INC
12 +INB, +INC –INB, –INC
13 +INA, +INB,
+INC –INA, –INB,
–INC
LT1997-3
22
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Figure10. Many Difference Amplifier Gains Can Be Achieved by Strapping Pins
19973 F10
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 0.25
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 2.25
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 1
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 3
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 4.5
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 4
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 6
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 10
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 9
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 12
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 13
V+IN V+IN
V+IN
V+IN V+IN
V+IN
V+IN V+IN
V+IN
V+IN V+IN
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3
LT1997-3
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Difference Amplifier: Additional Integer Gains Using
Cross-Coupling
Figure11 shows the basic difference amplifier as well as
the LT1997-3 with cross-coupled inputs. The additional
dashed connections reduce the differential gain from
3 to 2. Using this method, additional integer gains are
achievable, as shown in Table5, so that all integer gains
from 1 to 13 are achieved with the LT1997-3. Note that
the equations can be written by inspection from the V+IN
connections, and that the V–IN connections are simply the
opposite (swap + for – and – for +). Noise gain, bandwidth,
and input impedance specifications for the various cases
are also shown. Schematics of the difference amplifiers
using cross-coupling are shown in Figure12. Additional
non-integer gains produced with cross-coupling are listed
in Table6.
Table5. Connections Using Cross-Coupling. Note that Equations Can Be Written by Inspection of the V+IN Column
Gain V+IN V–IN Equation Noise Gain
–3dB BW
(kHz)
Differential
Input Impedance
(kΩ)
Common Mode
Input Impedance
(kΩ)
2 +INB, –INA –INB, +INA 3 – 1 5 540 11.25 14.1
5 +INC, –INB, –INA –INC, +INB, +INA 9 – 3 – 1 14 222 3.5 12.1
7 +INC, +INA, –INB –INC, –INA, +INB 9 + 1 – 3 14 222 3.5 12.1
8 +INC, –INA –INC, +INA 9 – 1 11 277 4.5 12.4
11 +INC, +INB, –INA –INC, –INB, +INA 9 + 3 – 1 14 222 3.5 12.1
Table6. Additional Non-Integer Gains that Can Be Achieved Using Cross-Coupling
Gain V+IN V–IN OUT GND (REF)
0.143 +INA –INA +INB, –INC –INB, +INC
0.2 –INA, +INB +INA, –INB –INC +INC
0.333 +INB –INB +INA, –INC –INA, +INC
19973 F12
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
V+IN
V–IN
V+IN
RG
R
F
+
–
VOUT
RG
RF
DIFFERENCE AMPLIFIER CONFIGURATION
DIFFERENCE AMPLIFIER CONFIGURATION
IMPLEMENTED WITH THE LT1997-3, RF = 22.5k, RG = 7.5k, GAIN = 3
GAIN CAN BE ADJUSTED BY CROSS-COUPLING THE INPUTS.
MAKING THE DASHED CONNECTIONS REDUCES THE GAIN FROM 3 TO 2
VOUT = GAIN • (V+IN – V–IN)
GAIN = RF/RG
LT1997-3
Figure11. Cross-Coupling the Inputs of the LT1997-3 Allows
Additional Integer Gains to Be Constructed. The LT1997-3
Provides All Integer Gains from 1 to 13
LT1997-3
24
19973f
For more information www.linear.com/LT1997-3
applicaTions inForMaTion
19973 F13
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 5
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V
–IN
GAIN = 2
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
V
OUT
V–IN
GAIN = 7
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 11
V+IN
V
+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
GAIN = 8
V+IN
V+IN
V+IN
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3
Figure12. Integer Gain Difference Amplifiers Using Cross-Coupling
High Common Mode Voltage Difference Amplifiers
The input range of a difference amplifier can be extended
by configuring the amplifier to divide the input common
mode voltage. Figure13 shows the basic circuit on the top.
The effective input voltage range of the circuit is extended
by the fact that resistors RT attenuate the common mode
(CM) voltage seen by the internal op amp inputs (VCMOP).
For the LT1997-3, the most useful resistors for RG are the
+INA and –INA 22.5kΩ resistors, because they do not have
diode clamps to the VS– supply and therefore can be taken
beyond both rails. +INB, –INB, +INC and –INC pins can be
taken 80V above VS–, but not below VS–. As before, the
input common mode of the internal op amp is the limiting
factor and is set by the voltage at the op amp’s positive
input (VCMOP). By superposition we can write:
VCMOP =VEXT •
R
F
R
T
RG+RFRT
+VREF •
R
G
R
T
RF+RGRT
+VTERM •RFRG
RT+RFR
G
Solving for VEXT:
VEXT =1+RG
RFRT
⎛
⎝
⎜⎞
⎠
⎟•
VCMOP – VREF •RGRT
RF+RGRT
–VTERM •RFRG
RT+RFRG
⎛
⎝
⎜
⎜
⎜
⎜
⎞
⎠
⎟
⎟
⎟
⎟
LT1997-3
25
19973f
For more information www.linear.com/LT1997-3
applicaTions inForMaTion
Given the values of the resistors in the LT1997-3, this
equation has been simplified and evaluated, and the
resulting equations are provided in Table7. Substituting
VS+–1.75V and VS– for VLIM will give the valid upper
and lower common mode extremes respectively for the
normal operating region of the op amp. Substituting
VS–+76V and VS– for VLIM will give the valid upper
and lower common mode extremes respectively for the
Over-The-Top region of the op amp (see Over-The-Top
Operation section of this data sheet for more detail).
Following are sample calculations for the case shown
in Figure13. Note that +INC and –INC are terminated so
row 3 of Table7 provides the equation:
MAX V
EXT =
11•V
S+
–1.75
( )
– V
REF
–9•V
TERM
=11•(10.25V)– 2.5 – 9 •12
=2.25V
and:
MIN VEXT =11•VS–
( )
– VREF –9•VTERM
=11•(0)– 2.5 – 9 •12
=–110.5V
If the calculated VEXT voltage exceeds the 160V absolute
maximum rating of the +INA, –INA pins, 160V or –160V
would become the de facto common mode limit. Several
more examples of high CM circuits are shown in Figure14,
Figure15 and Figure16 for various supplies.
19973 F14
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+ = 12V
VOUT
VTERM = 12V
VREF = 2.5V
V–IN
V+IN
VS+
VS–
V–IN
V+IN
(= VEXT)
VTERM VREF
RG
RF
VOUT
RGVCMOP
RF
RT
RT
HIGH COMMON MODE VOLTAGE DIFFERENCE AMPLIFIER
INPUT COMMON MODE VOLTAGE TO OP AMP IS
ATTENUATED BY RESISTORS RT CONNECTED TO VTERM
HIGH NEGATIVE COMMON MODE VOLTAGE DIFFERENCE AMPLIFIER
IMPLEMENTED WITH THE LT1997-3, RF = 22.5k, RG = 22.5k, RT = 2.5k, GAIN = 1
VTERM = VS+ = 12V, VREF = 2.5V, VS– = 0V
VOUT = GAIN • (V+IN – V–IN)
GAIN = RF/RG
–
+
LT1997-3
Figure13. Extending Common Mode Input Range
Table7. Input Common Mode Voltage Ranges for the LT1997-3 when Configured as a High Common Mode Voltage Difference Amplifier
Gain V+IN V–IN RTNoise Gain
Max, Min VEXT (Substitute VS+ – 1.75 (Normal Region)
or VS–+76 (OTT), and VS– for VLIM)
1 +INA –INA 2 2 • VLIM – VREF
1 +INA –INA R+INB, R–INB 5 5 • VLIM – VREF – 3 • VTERM
1 +INA –INA R+INC, R–INC 11 11•VLIM – VREF – 9•VTERM
1 +INA –INA R+INB||R+INC, R–INB||R–INC 14 14•VLIM – VREF – 12•VTERM
LT1997-3
26
19973f
For more information www.linear.com/LT1997-3
applicaTions inForMaTion
Figure14. Common Mode Ranges for Various LT1997-3 Configurations on VS = 5V, 0V, with Gain = 1.
These Ranges Guarantee that the Internal Op Amp Operates in Its Normal Operating Region
19973 F15
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
2.5V
V–IN
VCM = 4V TO –2.5V
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
VCM = 6.5V TO 0V
V–IN
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
5V
V–IN
VCM = 1.5V TO –5V
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
2.5V
V–IN
VCM = 6.25V TO –10V
V+IN 2.5V
2.5V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
2.5V
V–IN
VCM = 13.75V TO –2.5V
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V5V
5V
VOUT
2.5V
V–IN
VCM = –1.25V TO –17.5V
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
2.5V
V–IN
VCM = 10.75V TO –25V
V+IN 2.5V
2.5V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
2.5V
V–IN
VCM = 33.25V TO –2.5V
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
2.5V
V–IN
VCM = –11.75V TO –47.5V
V+IN
5V
5V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
2.5V
V–IN
VCM = 13V TO –32.5V
V+IN 2.5V
2.5V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
2.5V
V–IN
VCM = 43V TO –2.5V
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
5V
VOUT
2.5V
V–IN
VCM = –17V TO –62.5V
V+IN
5V
5V
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3
27
19973f
For more information www.linear.com/LT1997-3
applicaTions inForMaTion
Figure15. Common Mode Ranges for Various LT1997-3 Configurations on VS = ±15V, with Gain = 1.
These Ranges Guarantee that the Internal Op Amp Operates in Its Normal Operating Region
19973 F16
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V
VOUT
V–IN
VCM = 26.5V TO –30V
V+IN –15V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V
–15V
VOUT
–15V
VCM = 41.5V TO –15V
V–IN
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V
VOUT
15V
V–IN
VCM = 11.5V TO –45V
V+IN –15V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V
VOUT
V–IN
VCM = 66.25V TO –75V
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V
VOUT
V–IN
VCM = 111.25V TO –30V
V+IN
–15V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V15V
–15V –15V–15V –15V15V
VOUT
V–IN
VCM = 21.25V TO –120V
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V
VOUT
V–IN
VCM = 145.75V TO –160V
V+IN –15V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V–15V
VOUT
–15V
V–IN
VCM = 160V TO –30V
V+IN –15V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V
VOUT
V–IN
VCM = 10.75V TO –160V
V+IN
15V
15V –15V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V
VOUT
V–IN
VCM = 160V TO –160V
V+IN –15V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V
VOUT
V–IN
VCM = 160V TO –30V
V+IN
–15V
–15V
–15V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
15V
VOUT
V–IN
VCM = 5.5V TO –160V
V+IN
15V
15V 15V
–15V
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3
28
19973f
For more information www.linear.com/LT1997-3
applicaTions inForMaTion
Figure16. Common Mode Ranges for Various LT1997-3 Configurations on VS = ±25V, with Gain = 1.
These Ranges Guarantee that the Internal Op Amp Operates in Its Normal Operating Region
19973 F17
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V
VOUT
V–IN
VCM = 46.5V TO –50V
V+IN –25V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V
–25V
VOUT
–25V
VCM = 71.5V TO –25V
V–IN
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V
VOUT
25V
V–IN
VCM = 21.5V TO –75V
V+IN –25V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V
VOUT
V–IN
VCM = 116.25V TO –125V
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V
VOUT
V–IN
VCM = 160V TO –50V
V+IN
–25V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V25V
–25V –25V–25V –25V25V
VOUT
V–IN
VCM = 41.25V TO –160V
V+IN
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V
VOUT
V–IN
VCM = 160V TO –160V
V+IN –25V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V–25V
VOUT
–25V
V–IN
VCM = 160V TO –50V
V+IN –25V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V
VOUT
V–IN
VCM = 30.75V TO –160V
V+IN
25V
25V –25V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V
VOUT
V–IN
VCM = 160V TO –160V
V+IN –25V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V
VOUT
V–IN
VCM = 160V TO –50V
V+IN
–25V
–25V
–25V
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
25V
VOUT
V–IN
VCM = 25.5V TO –160V
V+IN
25V
25V 25V
–25V
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3 LT1997-3 LT1997-3
LT1997-3
29
19973f
For more information www.linear.com/LT1997-3
applicaTions inForMaTion
Reference Resistors
In the preceding discussions, the Reference resistor is
shown as a single 22.5k resistor. This is true in the DFN
package. In the MSOP package the reference resistor is
split into two 45k resistors (Figure17). Tying the REF1
and REF2 pins to the same voltage produces the same
reference voltage as tying the VREF pin in the DFN package
to that voltage. Connecting REF1 and REF2 to different
voltages produces an effective reference voltage that is
the average of VREF1 and VREF2. This is especially useful
when the desired reference voltage is half way between
the supplies. Tying REF1 to VS+ and REF2 to VS– produces
the desired mid-supply voltage without the help of another
external reference voltage (Figure17). The ratio of RREF1
to RREF2 is very precise:
∆R
R=RREF1 – RREF2
RREF1 +RREF2
2
⎛
⎝
⎜⎞
⎠
⎟
<60ppm
19973 F11
OUT
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
V–IN
V+IN
OUT
REF1
22.5k
22.5k
2.5k
7.5k 45k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
VS+
VS–
VOUT
VREF
VREF1
V–IN
V+IN
REF2
45k VREF2
LT1997-3 MSOP
LT1997-3 DFN
LT1997-3
LT1997-3
Figure17. The LT1997-3 Reference Resistors: Split Resistors in
the MSOP Package Above, Single Resistor in the DFN Package
Below
LT1997-3
30
19973f
For more information www.linear.com/LT1997-3
applicaTions inForMaTion
Shutdown
The LT1997-3 has a shutdown pin (SHDN). Under normal
operation this pin should be tied to V+ or allowed to float.
Tying this pin 2.5V or more below V+ will cause the part
to enter a low power state. The supply current is reduced
to less than 25µA and the op amp output becomes high
impedance. The voltages at the input pins can be still be
present even in shutdown mode.
Supply Voltage
The positive supply pin of the LT1997-3 should be bypassed
with a small capacitor (typically 0.1µF) as close to the supply
pins as possible. When driving heavy loads, an additional
4.7µF electrolytic capacitor should be added. When using
split supplies, the same is true for the V– supply pin.
Output
The output of the LT1997-3 can typically swing to within
100mV of either rail with no load and is capable of sourcing
and sinking approximately 25mA at 25°C. The LT1997-3 is
internally compensated to drive at least 1nF of capacitance
under any output loading conditions. For larger capacitive
loads, a 0.22µF capacitor in series with a 150Ω resistor
between the output and ground will compensate the
amplifier to drive capacitive loads greater than 1nF. Ad-
ditionally, the LT1997-3 has more gain and phase margin
as its gain is increased.
Distortion
The LT1997-3 features excellent distortion performance
when the internal op amp is operating in the normal op-
erating region. Operating the LT1997-3 with the internal
op amp in the over the top region will increase distortion
due to the lower loop gain of the op amp. Operating the
LT1997-3 with input common mode voltages that go from
the normal to Over-The-Top operation will significantly
degrade the LT1997-3’s linearity as the op amp must
transition between two different input stages. Driving
resistive loads significantly smaller than the 22.5k internal
feedback resistor will also degrade the amplifier’s linearity
performance.
Power Dissipation Considerations
Because of the ability of the LT1997-3 to operate on power
supplies up to ±25V, to withstand very high input volt-
ages and to drive heavy loads, there is a need to ensure
the die junction temperature does not exceed 150°C. The
LT1997-3 is housed in DF14 (θJA = 45°C/W, θJC = 3°C/W)
and MS16 (θJA = 130°C/W) packages.
In general, the die junction temperature (TJ) can be es-
timated from the ambient temperature (TA), the device’s
power dissipation (PD) and the thermal resistance of the
device and board (θJA).
TJ = TA + PD • θJA
The thermal resistance from the junction to the ambient
environment (θJA) is the sum of the thermal resistance
from the junction to the exposed pad (θJC) and the thermal
resistance from the exposed pad to the ambient environ-
ment (θCA). The θCA value depends on how much PCB
metal is connected to the exposed pad in the board. The
more PCB metal that is used, the lower θCA and θJA will be.
Power is dissipated by the amplifier’s quiescent current, by
the output current driving a resistive load, and by the input
current driving the LT1997-3’s internal resistor network.
P
D=VS+– VS–
( )
•IS
( )
+POD +P
RESD
For a given supply voltage, the worst-case output power
dissipation POD(MAX) occurs with the output voltage at half
of either supply voltage. POD(MAX) is given by:
POD(MAX) =VS2
( )
2
R
LOAD
The power dissipated in the internal resistors (PRESD)
depends on the manner the input resistors have been
configured as well as the input voltage, the output voltage
and the voltage on the REF pin. The following equations
and Figure18 show the different components of PRESD
corresponding to the different groups of the LT1997-3’s
internal resistors, assuming that the LT1997-3 is used with
a dual supply configuration with +INC, –INC, and REF pins
LT1997-3
31
19973f
For more information www.linear.com/LT1997-3
applicaTions inForMaTion
at ground (refer to Figure13 for resistor terminologies
used in equations below).
P
RESDA =V+IN
( )
2
RG+RFRT
P
RESDB =
V–IN – V+IN •RFRT
( )
RG+RFRT
⎛
⎝
⎜⎞
⎠
⎟
2
R
G
P
RESDC =
V+IN •RFRT
( )
RG+RFRT
⎛
⎝
⎜⎞
⎠
⎟
2
R
T
P
RESDD =
V+IN •RFRT
( )
RG+RFRT
– VOUT
⎛
⎝
⎜⎞
⎠
⎟
2
RF
PRESD = PRESDA + PRESDB + PRESDC + PRESDD
In general, PRESD increases with higher input voltage and
lower output and REF pin voltages.
19973 F18
OUT
REF
22.5k
22.5k
2.5k
7.5k
22.5k
7.5k
2.5k 22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
V
S
+
= 25V
VS–
= –25V
VOUT
=
12.5V
V
–IN = 160V – VOUT
= 147.5V
V+IN
= 160V
–
+
PRESDC
PRESDA
PRESDD
PRESDB
LT1997-3
Figure18. Power Dissipation Example
Example: For an LT1997-3 in a DFN package mounted on
a PC board with a thermal resistance of 45°C/W, operating
on ±25V supplies and driving a 2.5kΩ load to 12.5V with
V+IN=160V and +INC=–INC=REF=0V, the total power
dissipation is given by:
P
D=50 •0.6mA
( )
+12.52
2.5k +1602
24.75k
+
147.5 – 160
11
⎛
⎝
⎜⎞
⎠
⎟
2
22.5k +
160
11
⎛
⎝
⎜⎞
⎠
⎟
2
2.5k +
160
11 – 12.5
⎛
⎝
⎜⎞
⎠
⎟
2
22.5k
=2W
Assuming a thermal resistance of 45°C/W, the die tem-
perature will experience an 90°C rise above ambient.
This implies that the maximum ambient temperature the
LT1997-3 should operate under the above conditions is:
TA = 150°C – 90°C = 60°C
It is recommended that the exposed pad of the DFN pack-
age have as much PCB metal connected to it as reasonably
available. The more PCB metal connected to the exposed
pad, the lower the thermal resistance. Connecting a large
amount of PCB metal to the exposed pad can reduce the
θJA to even less than 45°C/W. Use multiple vias from the
exposed pad to the V– plane. The exposed pad is electrically
connected to the V– pin. In addition, a heat sink may be
necessary if operating near maximum junction temperature.
The MSOP package has no exposed pad and a higher
thermal resistance (θJA = 130°C/W). It should not be used
in applications which have a high ambient temperature,
require driving a heavy load, or require an extreme input
voltage.
Thermal Shutdown
For safety, the LT1997-3 will enter shutdown mode when
the die temperature rises to approximately 163°C. This
thermal shutdown has approximately 9°C of hysteresis
requiring the die temperature to cool 9°C before enabling
the amplifier again.
LT1997-3
32
19973f
For more information www.linear.com/LT1997-3
19973 TA02
OUT
REF
22.5k
22.5k
22.5k
2.5k
7.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
–
+
LT1997-3
V+OUT
VOCM
V–OUT
USE VOCM TO SET THE DESIRED
OUTPUT COMMON MODE LEVEL
10k
10k
–+
LT6015
VS+
VS–
V+IN
V–IN
Differential Input/Output Gain of 10 Amplifier
Typical applicaTions
ESD Protection
The LT1997-3 is protected by a number of ESD structures.
The structures are shown in Figure 19.
The ESD structures serve to protect the internal circuitry
but also limit signal swing on certain nodes. The structures
on the +INB, –INB, +INC, –INC pins and on the internal op
amp inputs limit the voltage on these nodes to 0.3V below
V– and 80V above V–. The voltage on the REF (DFN), REF1
(MSOP) and REF2 (MSOP) pins are limited to 0.3V below
V– and 60V above V–. The voltage on the SHDN pin is
limited to 0.3V below V– and 0.3V above V+.
Figure19. ESD Protection
19973 TA03
OUT
REF2
45k
REF1
22.5k
22.5k
2.5k
7.5k 45k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V–
V+
V+
SHDN
–
+
LT1997-3
V–
V–V–
V–V–
V–
V–
V–
19973 F19
10µA
LT1997-3
33
19973f
For more information www.linear.com/LT1997-3
19973 TA03
OUT
REF1
45k
REF2
22.5k
22.5k
2.5k
7.5k 45k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
VSOURCE = –0.3V TO 50V
VOUT = VREF + 26 • ILOAD • RSENSE
VREF
RC
–
+
RSENSE
LOAD
LT1997-3
ILOAD
VS+
19973 TA04
OUT
REF1
45k
REF2
22.5k
22.5k
2.5k
7.5k 45k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
VCM = –0.3V TO VBATTERY
V+IN
V–IN
–
+
LT1997-3
VCM
VBATTERY
VOUT =VBATTERY
2+9•V+IN – V–IN
( )
Bidirectional Current Sense Amplifier
Precision RRIO Single-Supply Difference Amplifier
Typical applicaTions
LT1997-3
34
19973f
For more information www.linear.com/LT1997-3
package DescripTion
Please refer to http://www.linear.com/product/LT1997-3#packaging for the most recent package drawings.
4.00 ±0.10
(4 SIDES)
NOTE:
1. PACKAGE OUTLINE DOES NOT CONFORM TO JEDEC MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ±0.10
17
148
BOTTOM VIEW—EXPOSED PAD
1.70 ±0.10
0.75 ±0.05
R = 0.115
TYP
0.25 ±0.05
0.50 BSC
3.00 REF
3.38 ±0.10
0.200 REF
0.00 – 0.05
(DF14)(12) DFN 1113 REV 0
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.70 ±0.05
0.25 ±0.05
0.50 BSC
3.10 ±0.05
4.50 ±0.05
PACKAGE OUTLINE
PIN 1 NOTCH
0.35 × 45°
CHAMFER
1.70 ±0.05
3.38 ±0.05
3.00 REF
1.00
BSC
1.00
BSC
DF Package
14(12)-Lead Plastic DFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1963 Rev Ø)
LT1997-3
35
19973f
For more information www.linear.com/LT1997-3
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
package DescripTion
Please refer to http://www.linear.com/product/LT1997-3#packaging for the most recent package drawings.
MSOP (MS12) 0213 REV B
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
1.0
(.0394)
BSC
0.50
(.0197)
BSC
16 14 121110
1 3 5 6 7 8
9
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
BSC
1.0
(.0394)
BSC
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
0.1016 ±0.0508
(.004 ±.002)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0.280 ±0.076
(.011 ±.003)
REF
4.90 ±0.152
(.193 ±.006)
MS Package
16 (12)-Lead Plastic MSOP with 4 Pins Removed
(Reference LTC DWG # 05-08-1847 Rev B)
LT1997-3
36
19973f
For more information www.linear.com/LT1997-3
LT 0317 • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2017
www.linear.com/LT1997-3
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LT6375 ±270V Common Mode Voltage Difference Amplifier 3.3V to 50V Operation, CMRR > 97dB, Input Voltage = ±270V
LT1990 ±250V Input Range Difference Amplifier 2.7V to 36V Operation, CMRR > 70dB, Input Voltage = ±250V
LT1991 Precision, 100µA Gain Selectable Amplifier 2.7V to 36V Operation, 50μV Offset, CMRR > 75dB, Input Voltage = ±60V
LT1996 Precision, 100µA Gain Selectable Amplifier Micropower, Pin Selectable Up to Gain = 118
LT1999 High Voltage, Bidirectional Current Sense Amplifier -5V to 80V, 750µV, CMRR 80dB at 100kHz, Gain: 10V/V, 20V/V, 50V/V
LT6015/LT6016/
LT6017 Single, Dual, and Quad Over-The-Top Precision Op Amp 3.2MHz, 0.8V/µs, 50µV VOS, 3V to 50V VS, 0.335mA IS, RRIO
LT6018 33V, Ultralow Noise, Precision Op Amp VOS: 50µV, GBW: 15MHz, SR: 30V/µs, en: 1.2nV/√Hz, IS: 7.2mA
LTC6090 140V Operational Amplifier 50pA IB, 1.6mV VOS, 9.5V to 140V VS, 4.5mA IS, RR Output
LT6108 High Side Current Sense Amplifier with Reference and
Comparator with Shutdown 2.7V to 60V, 125µV, Resistor Set Gain, ±1.25% Threshold Error
LT1787/LT1787HV Precision, Bidirectional High Side Current Sense Amplifier 2.7V to 60V Operation, 75μV Offset, 60μA Current Draw
LT6100 Gain-Selectable High Side Current Sense Amplifier 4.1V to 48V Operation,
Pin-Selectable Gain: 10V/V, 12.5V/V, 20V/V, 25V/V, 40V/V, 50V/V
LTC6101/
LTC6101HV High Voltage High Side Current Sense Amplifier 4V to 60V/5V to 100V Operation, External Resistor Set Gain, SOT23
LTC6102/
LTC6102HV Zero Drift High Side Current Sense Amplifier 4V to 60V/5V to 100V Operation, ±10μV Offset, 1μs Step Response,
MSOP8/DFN Packages
LTC6104 Bidirectional, High Side Current Sense 4V to 60V, Gain Configurable, 8-Pin MSOP Package
Low Noise, High CMRR Instrumentation Amplifier
Gain vs Frequency
19973 TA05a
OUT
VREF
REF
22.5k
22.5k
2.5k
7.5k 22.5k
7.5k
2.5k
22.5k
–INA –INB –INC
+INA +INB +INC V–
V+
SHDN
+15V
–15V
+15V
+15V
–15V
–15V
VOUT
–
+
LT1997-3
49.9Ω
1.91k
1.91k
–
+
–
+
LT6018
LT6018
V+IN
INPUT REFERRED NOISE = 2.1nV/√Hz
CMRR = 140dB
V–IN
FREQUENCY (kHz)
1
10
100
1000
0
10
20
30
40
50
60
70
GAIN (dB)
19973 TA05b